MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 4915 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_1_0_sh_mask.h #define MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 0x18 MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 3868 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_2_0_0_sh_mask.h #define MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 0x18 MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 4367 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_1_sh_mask.h #define MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 0x18 MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 4934 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_sh_mask.h #define MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 0x18 MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 10973 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_4_1_sh_mask.h #define MMEA0_SDP_VCC_RESERVE0__VC4_CREDITS__SHIFT 0x18