MMCR1_TD_CP_DBG3SEL_SH   51 arch/powerpc/perf/power5+-pmu.c #define MMCR1_TD_CP_DBG3SEL_SH	48
MMCR1_TD_CP_DBG3SEL_SH   51 arch/powerpc/perf/power5-pmu.c #define MMCR1_TD_CP_DBG3SEL_SH	48
MMCR1_TD_CP_DBG3SEL_SH   55 arch/powerpc/perf/ppc970-pmu.c #define MMCR1_TD_CP_DBG3SEL_SH	44