MMCR1_TD_CP_DBG1SEL_SH   49 arch/powerpc/perf/power5+-pmu.c #define MMCR1_TD_CP_DBG1SEL_SH	52
MMCR1_TD_CP_DBG1SEL_SH   49 arch/powerpc/perf/power5-pmu.c #define MMCR1_TD_CP_DBG1SEL_SH	52
MMCR1_TD_CP_DBG1SEL_SH   53 arch/powerpc/perf/ppc970-pmu.c #define MMCR1_TD_CP_DBG1SEL_SH	48