MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 1606 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10
MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 1554 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10
MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 1716 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10
MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 2731 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT                                                        0x10
MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 7760 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x00000010
MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 1570 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 0x10
MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT 2093 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT                                                        0x10
MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT  656 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT                                                        0x10
MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT  538 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define MICROSECOND_TIME_BASE_DIV__XTAL_REF_SEL__SHIFT                                                        0x10