1/*
2 * fireworks_command.c - a part of driver for Fireworks based devices
3 *
4 * Copyright (c) 2013-2014 Takashi Sakamoto
5 *
6 * Licensed under the terms of the GNU General Public License, version 2.
7 */
8
9#include "./fireworks.h"
10
11/*
12 * This driver uses transaction version 1 or later to use extended hardware
13 * information. Then too old devices are not available.
14 *
15 * Each commands are not required to have continuous sequence numbers. This
16 * number is just used to match command and response.
17 *
18 * This module support a part of commands. Please see FFADO if you want to see
19 * whole commands. But there are some commands which FFADO don't implement.
20 *
21 * Fireworks also supports AV/C general commands and AV/C Stream Format
22 * Information commands. But this module don't use them.
23 */
24
25#define KERNEL_SEQNUM_MIN	(SND_EFW_TRANSACTION_USER_SEQNUM_MAX + 2)
26#define KERNEL_SEQNUM_MAX	((u32)~0)
27
28/* for clock source and sampling rate */
29struct efc_clock {
30	u32 source;
31	u32 sampling_rate;
32	u32 index;
33};
34
35/* command categories */
36enum efc_category {
37	EFC_CAT_HWINFO		= 0,
38	EFC_CAT_TRANSPORT	= 2,
39	EFC_CAT_HWCTL		= 3,
40};
41
42/* hardware info category commands */
43enum efc_cmd_hwinfo {
44	EFC_CMD_HWINFO_GET_CAPS		= 0,
45	EFC_CMD_HWINFO_GET_POLLED	= 1,
46	EFC_CMD_HWINFO_SET_RESP_ADDR	= 2
47};
48
49enum efc_cmd_transport {
50	EFC_CMD_TRANSPORT_SET_TX_MODE	= 0
51};
52
53/* hardware control category commands */
54enum efc_cmd_hwctl {
55	EFC_CMD_HWCTL_SET_CLOCK		= 0,
56	EFC_CMD_HWCTL_GET_CLOCK		= 1,
57	EFC_CMD_HWCTL_IDENTIFY		= 5
58};
59
60/* return values in response */
61enum efr_status {
62	EFR_STATUS_OK			= 0,
63	EFR_STATUS_BAD			= 1,
64	EFR_STATUS_BAD_COMMAND		= 2,
65	EFR_STATUS_COMM_ERR		= 3,
66	EFR_STATUS_BAD_QUAD_COUNT	= 4,
67	EFR_STATUS_UNSUPPORTED		= 5,
68	EFR_STATUS_1394_TIMEOUT		= 6,
69	EFR_STATUS_DSP_TIMEOUT		= 7,
70	EFR_STATUS_BAD_RATE		= 8,
71	EFR_STATUS_BAD_CLOCK		= 9,
72	EFR_STATUS_BAD_CHANNEL		= 10,
73	EFR_STATUS_BAD_PAN		= 11,
74	EFR_STATUS_FLASH_BUSY		= 12,
75	EFR_STATUS_BAD_MIRROR		= 13,
76	EFR_STATUS_BAD_LED		= 14,
77	EFR_STATUS_BAD_PARAMETER	= 15,
78	EFR_STATUS_INCOMPLETE		= 0x80000000
79};
80
81static const char *const efr_status_names[] = {
82	[EFR_STATUS_OK]			= "OK",
83	[EFR_STATUS_BAD]		= "bad",
84	[EFR_STATUS_BAD_COMMAND]	= "bad command",
85	[EFR_STATUS_COMM_ERR]		= "comm err",
86	[EFR_STATUS_BAD_QUAD_COUNT]	= "bad quad count",
87	[EFR_STATUS_UNSUPPORTED]	= "unsupported",
88	[EFR_STATUS_1394_TIMEOUT]	= "1394 timeout",
89	[EFR_STATUS_DSP_TIMEOUT]	= "DSP timeout",
90	[EFR_STATUS_BAD_RATE]		= "bad rate",
91	[EFR_STATUS_BAD_CLOCK]		= "bad clock",
92	[EFR_STATUS_BAD_CHANNEL]	= "bad channel",
93	[EFR_STATUS_BAD_PAN]		= "bad pan",
94	[EFR_STATUS_FLASH_BUSY]		= "flash busy",
95	[EFR_STATUS_BAD_MIRROR]		= "bad mirror",
96	[EFR_STATUS_BAD_LED]		= "bad LED",
97	[EFR_STATUS_BAD_PARAMETER]	= "bad parameter",
98	[EFR_STATUS_BAD_PARAMETER + 1]	= "incomplete"
99};
100
101static int
102efw_transaction(struct snd_efw *efw, unsigned int category,
103		unsigned int command,
104		const __be32 *params, unsigned int param_bytes,
105		const __be32 *resp, unsigned int resp_bytes)
106{
107	struct snd_efw_transaction *header;
108	__be32 *buf;
109	u32 seqnum;
110	unsigned int buf_bytes, cmd_bytes;
111	int err;
112
113	/* calculate buffer size*/
114	buf_bytes = sizeof(struct snd_efw_transaction) +
115		    max(param_bytes, resp_bytes);
116
117	/* keep buffer */
118	buf = kzalloc(buf_bytes, GFP_KERNEL);
119	if (buf == NULL)
120		return -ENOMEM;
121
122	/* to keep consistency of sequence number */
123	spin_lock(&efw->lock);
124	if ((efw->seqnum < KERNEL_SEQNUM_MIN) ||
125	    (efw->seqnum >= KERNEL_SEQNUM_MAX - 2))
126		efw->seqnum = KERNEL_SEQNUM_MIN;
127	else
128		efw->seqnum += 2;
129	seqnum = efw->seqnum;
130	spin_unlock(&efw->lock);
131
132	/* fill transaction header fields */
133	cmd_bytes = sizeof(struct snd_efw_transaction) + param_bytes;
134	header = (struct snd_efw_transaction *)buf;
135	header->length	 = cpu_to_be32(cmd_bytes / sizeof(__be32));
136	header->version	 = cpu_to_be32(1);
137	header->seqnum	 = cpu_to_be32(seqnum);
138	header->category = cpu_to_be32(category);
139	header->command	 = cpu_to_be32(command);
140	header->status	 = 0;
141
142	/* fill transaction command parameters */
143	memcpy(header->params, params, param_bytes);
144
145	err = snd_efw_transaction_run(efw->unit, buf, cmd_bytes,
146				      buf, buf_bytes);
147	if (err < 0)
148		goto end;
149
150	/* check transaction header fields */
151	if ((be32_to_cpu(header->version) < 1) ||
152	    (be32_to_cpu(header->category) != category) ||
153	    (be32_to_cpu(header->command) != command) ||
154	    (be32_to_cpu(header->status) != EFR_STATUS_OK)) {
155		dev_err(&efw->unit->device, "EFW command failed [%u/%u]: %s\n",
156			be32_to_cpu(header->category),
157			be32_to_cpu(header->command),
158			efr_status_names[be32_to_cpu(header->status)]);
159		err = -EIO;
160		goto end;
161	}
162
163	if (resp == NULL)
164		goto end;
165
166	/* fill transaction response parameters */
167	memset((void *)resp, 0, resp_bytes);
168	resp_bytes = min_t(unsigned int, resp_bytes,
169			   be32_to_cpu(header->length) * sizeof(__be32) -
170				sizeof(struct snd_efw_transaction));
171	memcpy((void *)resp, &buf[6], resp_bytes);
172end:
173	kfree(buf);
174	return err;
175}
176
177/*
178 * The address in host system for transaction response is changable when the
179 * device supports. struct hwinfo.flags includes its flag. The default is
180 * MEMORY_SPACE_EFW_RESPONSE.
181 */
182int snd_efw_command_set_resp_addr(struct snd_efw *efw,
183				  u16 addr_high, u32 addr_low)
184{
185	__be32 addr[2];
186
187	addr[0] = cpu_to_be32(addr_high);
188	addr[1] = cpu_to_be32(addr_low);
189
190	if (!efw->resp_addr_changable)
191		return -ENOSYS;
192
193	return efw_transaction(efw, EFC_CAT_HWCTL,
194			       EFC_CMD_HWINFO_SET_RESP_ADDR,
195			       addr, sizeof(addr), NULL, 0);
196}
197
198/*
199 * This is for timestamp processing. In Windows mode, all 32bit fields of second
200 * CIP header in AMDTP transmit packet is used for 'presentation timestamp'. In
201 * 'no data' packet the value of this field is 0x90ffffff.
202 */
203int snd_efw_command_set_tx_mode(struct snd_efw *efw,
204				enum snd_efw_transport_mode mode)
205{
206	__be32 param = cpu_to_be32(mode);
207	return efw_transaction(efw, EFC_CAT_TRANSPORT,
208			       EFC_CMD_TRANSPORT_SET_TX_MODE,
209			       &param, sizeof(param), NULL, 0);
210}
211
212int snd_efw_command_get_hwinfo(struct snd_efw *efw,
213			       struct snd_efw_hwinfo *hwinfo)
214{
215	int err;
216
217	err  = efw_transaction(efw, EFC_CAT_HWINFO,
218			       EFC_CMD_HWINFO_GET_CAPS,
219			       NULL, 0, (__be32 *)hwinfo, sizeof(*hwinfo));
220	if (err < 0)
221		goto end;
222
223	be32_to_cpus(&hwinfo->flags);
224	be32_to_cpus(&hwinfo->guid_hi);
225	be32_to_cpus(&hwinfo->guid_lo);
226	be32_to_cpus(&hwinfo->type);
227	be32_to_cpus(&hwinfo->version);
228	be32_to_cpus(&hwinfo->supported_clocks);
229	be32_to_cpus(&hwinfo->amdtp_rx_pcm_channels);
230	be32_to_cpus(&hwinfo->amdtp_tx_pcm_channels);
231	be32_to_cpus(&hwinfo->phys_out);
232	be32_to_cpus(&hwinfo->phys_in);
233	be32_to_cpus(&hwinfo->phys_out_grp_count);
234	be32_to_cpus(&hwinfo->phys_in_grp_count);
235	be32_to_cpus(&hwinfo->midi_out_ports);
236	be32_to_cpus(&hwinfo->midi_in_ports);
237	be32_to_cpus(&hwinfo->max_sample_rate);
238	be32_to_cpus(&hwinfo->min_sample_rate);
239	be32_to_cpus(&hwinfo->dsp_version);
240	be32_to_cpus(&hwinfo->arm_version);
241	be32_to_cpus(&hwinfo->mixer_playback_channels);
242	be32_to_cpus(&hwinfo->mixer_capture_channels);
243	be32_to_cpus(&hwinfo->fpga_version);
244	be32_to_cpus(&hwinfo->amdtp_rx_pcm_channels_2x);
245	be32_to_cpus(&hwinfo->amdtp_tx_pcm_channels_2x);
246	be32_to_cpus(&hwinfo->amdtp_rx_pcm_channels_4x);
247	be32_to_cpus(&hwinfo->amdtp_tx_pcm_channels_4x);
248
249	/* ensure terminated */
250	hwinfo->vendor_name[HWINFO_NAME_SIZE_BYTES - 1] = '\0';
251	hwinfo->model_name[HWINFO_NAME_SIZE_BYTES  - 1] = '\0';
252end:
253	return err;
254}
255
256int snd_efw_command_get_phys_meters(struct snd_efw *efw,
257				    struct snd_efw_phys_meters *meters,
258				    unsigned int len)
259{
260	u32 *buf = (u32 *)meters;
261	unsigned int i;
262	int err;
263
264	err = efw_transaction(efw, EFC_CAT_HWINFO,
265			      EFC_CMD_HWINFO_GET_POLLED,
266			      NULL, 0, (__be32 *)meters, len);
267	if (err >= 0)
268		for (i = 0; i < len / sizeof(u32); i++)
269			be32_to_cpus(&buf[i]);
270
271	return err;
272}
273
274static int
275command_get_clock(struct snd_efw *efw, struct efc_clock *clock)
276{
277	int err;
278
279	err = efw_transaction(efw, EFC_CAT_HWCTL,
280			      EFC_CMD_HWCTL_GET_CLOCK,
281			      NULL, 0,
282			      (__be32 *)clock, sizeof(struct efc_clock));
283	if (err >= 0) {
284		be32_to_cpus(&clock->source);
285		be32_to_cpus(&clock->sampling_rate);
286		be32_to_cpus(&clock->index);
287	}
288
289	return err;
290}
291
292/* give UINT_MAX if set nothing */
293static int
294command_set_clock(struct snd_efw *efw,
295		  unsigned int source, unsigned int rate)
296{
297	struct efc_clock clock = {0};
298	int err;
299
300	/* check arguments */
301	if ((source == UINT_MAX) && (rate == UINT_MAX)) {
302		err = -EINVAL;
303		goto end;
304	}
305
306	/* get current status */
307	err = command_get_clock(efw, &clock);
308	if (err < 0)
309		goto end;
310
311	/* no need */
312	if ((clock.source == source) && (clock.sampling_rate == rate))
313		goto end;
314
315	/* set params */
316	if ((source != UINT_MAX) && (clock.source != source))
317		clock.source = source;
318	if ((rate != UINT_MAX) && (clock.sampling_rate != rate))
319		clock.sampling_rate = rate;
320	clock.index = 0;
321
322	cpu_to_be32s(&clock.source);
323	cpu_to_be32s(&clock.sampling_rate);
324	cpu_to_be32s(&clock.index);
325
326	err = efw_transaction(efw, EFC_CAT_HWCTL,
327			      EFC_CMD_HWCTL_SET_CLOCK,
328			      (__be32 *)&clock, sizeof(struct efc_clock),
329			      NULL, 0);
330	if (err < 0)
331		goto end;
332
333	/*
334	 * With firmware version 5.8, just after changing clock state, these
335	 * parameters are not immediately retrieved by get command. In my
336	 * trial, there needs to be 100msec to get changed parameters.
337	 */
338	msleep(150);
339end:
340	return err;
341}
342
343int snd_efw_command_get_clock_source(struct snd_efw *efw,
344				     enum snd_efw_clock_source *source)
345{
346	int err;
347	struct efc_clock clock = {0};
348
349	err = command_get_clock(efw, &clock);
350	if (err >= 0)
351		*source = clock.source;
352
353	return err;
354}
355
356int snd_efw_command_get_sampling_rate(struct snd_efw *efw, unsigned int *rate)
357{
358	int err;
359	struct efc_clock clock = {0};
360
361	err = command_get_clock(efw, &clock);
362	if (err >= 0)
363		*rate = clock.sampling_rate;
364
365	return err;
366}
367
368int snd_efw_command_set_sampling_rate(struct snd_efw *efw, unsigned int rate)
369{
370	return command_set_clock(efw, UINT_MAX, rate);
371}
372
373