1#ifndef __SH_INTC_H
2#define __SH_INTC_H
3
4#include <linux/ioport.h>
5
6#ifdef CONFIG_SUPERH
7#define INTC_NR_IRQS	512
8#else
9#define INTC_NR_IRQS	1024
10#endif
11
12/*
13 * Convert back and forth between INTEVT and IRQ values.
14 */
15#ifdef CONFIG_CPU_HAS_INTEVT
16#define evt2irq(evt)		(((evt) >> 5) - 16)
17#define irq2evt(irq)		(((irq) + 16) << 5)
18#else
19#define evt2irq(evt)		(evt)
20#define irq2evt(irq)		(irq)
21#endif
22
23typedef unsigned char intc_enum;
24
25struct intc_vect {
26	intc_enum enum_id;
27	unsigned short vect;
28};
29
30#define INTC_VECT(enum_id, vect) { enum_id, vect }
31#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
32
33struct intc_group {
34	intc_enum enum_id;
35	intc_enum enum_ids[32];
36};
37
38#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
39
40struct intc_subgroup {
41	unsigned long reg, reg_width;
42	intc_enum parent_id;
43	intc_enum enum_ids[32];
44};
45
46struct intc_mask_reg {
47	unsigned long set_reg, clr_reg, reg_width;
48	intc_enum enum_ids[32];
49#ifdef CONFIG_INTC_BALANCING
50	unsigned long dist_reg;
51#endif
52#ifdef CONFIG_SMP
53	unsigned long smp;
54#endif
55};
56
57struct intc_prio_reg {
58	unsigned long set_reg, clr_reg, reg_width, field_width;
59	intc_enum enum_ids[16];
60#ifdef CONFIG_SMP
61	unsigned long smp;
62#endif
63};
64
65struct intc_sense_reg {
66	unsigned long reg, reg_width, field_width;
67	intc_enum enum_ids[16];
68};
69
70#ifdef CONFIG_INTC_BALANCING
71#define INTC_SMP_BALANCING(reg)	.dist_reg = (reg)
72#else
73#define INTC_SMP_BALANCING(reg)
74#endif
75
76#ifdef CONFIG_SMP
77#define INTC_SMP(stride, nr)	.smp = (stride) | ((nr) << 8)
78#else
79#define INTC_SMP(stride, nr)
80#endif
81
82struct intc_hw_desc {
83	struct intc_vect *vectors;
84	unsigned int nr_vectors;
85	struct intc_group *groups;
86	unsigned int nr_groups;
87	struct intc_mask_reg *mask_regs;
88	unsigned int nr_mask_regs;
89	struct intc_prio_reg *prio_regs;
90	unsigned int nr_prio_regs;
91	struct intc_sense_reg *sense_regs;
92	unsigned int nr_sense_regs;
93	struct intc_mask_reg *ack_regs;
94	unsigned int nr_ack_regs;
95	struct intc_subgroup *subgroups;
96	unsigned int nr_subgroups;
97};
98
99#define _INTC_ARRAY(a) a, __same_type(a, NULL) ? 0 : sizeof(a)/sizeof(*a)
100
101#define INTC_HW_DESC(vectors, groups, mask_regs,	\
102		     prio_regs,	sense_regs, ack_regs)	\
103{							\
104	_INTC_ARRAY(vectors), _INTC_ARRAY(groups),	\
105	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),	\
106	_INTC_ARRAY(sense_regs), _INTC_ARRAY(ack_regs),	\
107}
108
109struct intc_desc {
110	char *name;
111	struct resource *resource;
112	unsigned int num_resources;
113	intc_enum force_enable;
114	intc_enum force_disable;
115	bool skip_syscore_suspend;
116	struct intc_hw_desc hw;
117};
118
119#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups,		\
120	mask_regs, prio_regs, sense_regs)				\
121struct intc_desc symbol __initdata = {					\
122	.name = chipname,						\
123	.hw = INTC_HW_DESC(vectors, groups, mask_regs,			\
124			   prio_regs, sense_regs, NULL),		\
125}
126
127#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups,	\
128	mask_regs, prio_regs, sense_regs, ack_regs)			\
129struct intc_desc symbol __initdata = {					\
130	.name = chipname,						\
131	.hw = INTC_HW_DESC(vectors, groups, mask_regs,			\
132			   prio_regs, sense_regs, ack_regs),		\
133}
134
135int register_intc_controller(struct intc_desc *desc);
136int intc_set_priority(unsigned int irq, unsigned int prio);
137int intc_irq_lookup(const char *chipname, intc_enum enum_id);
138void intc_finalize(void);
139
140#ifdef CONFIG_INTC_USERIMASK
141int register_intc_userimask(unsigned long addr);
142#else
143static inline int register_intc_userimask(unsigned long addr)
144{
145	return 0;
146}
147#endif
148
149#endif /* __SH_INTC_H */
150