1#ifndef __LINUX_SERIAL_SCI_H 2#define __LINUX_SERIAL_SCI_H 3 4#include <linux/bitops.h> 5#include <linux/serial_core.h> 6#include <linux/sh_dma.h> 7 8/* 9 * Generic header for SuperH (H)SCI(F) (used by sh/sh64 and related parts) 10 */ 11 12#define SCIx_NOT_SUPPORTED (-1) 13 14/* Serial Control Register (@ = not supported by all parts) */ 15#define SCSCR_TIE BIT(7) /* Transmit Interrupt Enable */ 16#define SCSCR_RIE BIT(6) /* Receive Interrupt Enable */ 17#define SCSCR_TE BIT(5) /* Transmit Enable */ 18#define SCSCR_RE BIT(4) /* Receive Enable */ 19#define SCSCR_REIE BIT(3) /* Receive Error Interrupt Enable @ */ 20#define SCSCR_TOIE BIT(2) /* Timeout Interrupt Enable @ */ 21#define SCSCR_CKE1 BIT(1) /* Clock Enable 1 */ 22#define SCSCR_CKE0 BIT(0) /* Clock Enable 0 */ 23 24 25enum { 26 SCIx_PROBE_REGTYPE, 27 28 SCIx_SCI_REGTYPE, 29 SCIx_IRDA_REGTYPE, 30 SCIx_SCIFA_REGTYPE, 31 SCIx_SCIFB_REGTYPE, 32 SCIx_SH2_SCIF_FIFODATA_REGTYPE, 33 SCIx_SH3_SCIF_REGTYPE, 34 SCIx_SH4_SCIF_REGTYPE, 35 SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, 36 SCIx_SH4_SCIF_FIFODATA_REGTYPE, 37 SCIx_SH7705_SCIF_REGTYPE, 38 SCIx_HSCIF_REGTYPE, 39 40 SCIx_NR_REGTYPES, 41}; 42 43struct device; 44 45struct plat_sci_port_ops { 46 void (*init_pins)(struct uart_port *, unsigned int cflag); 47}; 48 49/* 50 * Port-specific capabilities 51 */ 52#define SCIx_HAVE_RTSCTS BIT(0) 53 54/* 55 * Platform device specific platform_data struct 56 */ 57struct plat_sci_port { 58 unsigned int type; /* SCI / SCIF / IRDA / HSCIF */ 59 upf_t flags; /* UPF_* flags */ 60 unsigned long capabilities; /* Port features/capabilities */ 61 62 unsigned int sampling_rate; 63 unsigned int scscr; /* SCSCR initialization */ 64 65 /* 66 * Platform overrides if necessary, defaults otherwise. 67 */ 68 int port_reg; 69 unsigned char regshift; 70 unsigned char regtype; 71 72 struct plat_sci_port_ops *ops; 73 74 unsigned int dma_slave_tx; 75 unsigned int dma_slave_rx; 76}; 77 78#endif /* __LINUX_SERIAL_SCI_H */ 79