1/*
2 *	i6300esb:	Watchdog timer driver for Intel 6300ESB chipset
3 *
4 *	(c) Copyright 2004 Google Inc.
5 *	(c) Copyright 2005 David H��rdeman <david@2gen.com>
6 *
7 *	This program is free software; you can redistribute it and/or
8 *	modify it under the terms of the GNU General Public License
9 *	as published by the Free Software Foundation; either version
10 *	2 of the License, or (at your option) any later version.
11 *
12 *	based on i810-tco.c which is in turn based on softdog.c
13 *
14 *	The timer is implemented in the following I/O controller hubs:
15 *	(See the intel documentation on http://developer.intel.com.)
16 *	6300ESB chip : document number 300641-004
17 *
18 *  2004YYZZ Ross Biro
19 *	Initial version 0.01
20 *  2004YYZZ Ross Biro
21 *	Version 0.02
22 *  20050210 David H��rdeman <david@2gen.com>
23 *	Ported driver to kernel 2.6
24 */
25
26/*
27 *      Includes, defines, variables, module parameters, ...
28 */
29
30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32#include <linux/module.h>
33#include <linux/types.h>
34#include <linux/kernel.h>
35#include <linux/fs.h>
36#include <linux/mm.h>
37#include <linux/miscdevice.h>
38#include <linux/watchdog.h>
39#include <linux/pci.h>
40#include <linux/ioport.h>
41#include <linux/uaccess.h>
42#include <linux/io.h>
43
44/* Module and version information */
45#define ESB_VERSION "0.05"
46#define ESB_MODULE_NAME "i6300ESB timer"
47#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
48
49/* PCI configuration registers */
50#define ESB_CONFIG_REG  0x60            /* Config register                   */
51#define ESB_LOCK_REG    0x68            /* WDT lock register                 */
52
53/* Memory mapped registers */
54#define ESB_TIMER1_REG (BASEADDR + 0x00)/* Timer1 value after each reset     */
55#define ESB_TIMER2_REG (BASEADDR + 0x04)/* Timer2 value after each reset     */
56#define ESB_GINTSR_REG (BASEADDR + 0x08)/* General Interrupt Status Register */
57#define ESB_RELOAD_REG (BASEADDR + 0x0c)/* Reload register                   */
58
59/* Lock register bits */
60#define ESB_WDT_FUNC    (0x01 << 2)   /* Watchdog functionality            */
61#define ESB_WDT_ENABLE  (0x01 << 1)   /* Enable WDT                        */
62#define ESB_WDT_LOCK    (0x01 << 0)   /* Lock (nowayout)                   */
63
64/* Config register bits */
65#define ESB_WDT_REBOOT  (0x01 << 5)   /* Enable reboot on timeout          */
66#define ESB_WDT_FREQ    (0x01 << 2)   /* Decrement frequency               */
67#define ESB_WDT_INTTYPE (0x03 << 0)   /* Interrupt type on timer1 timeout  */
68
69/* Reload register bits */
70#define ESB_WDT_TIMEOUT (0x01 << 9)    /* Watchdog timed out                */
71#define ESB_WDT_RELOAD  (0x01 << 8)    /* prevent timeout                   */
72
73/* Magic constants */
74#define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */
75#define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */
76
77/* internal variables */
78static void __iomem *BASEADDR;
79static DEFINE_SPINLOCK(esb_lock); /* Guards the hardware */
80static unsigned long timer_alive;
81static struct pci_dev *esb_pci;
82static unsigned short triggered; /* The status of the watchdog upon boot */
83static char esb_expect_close;
84
85/* We can only use 1 card due to the /dev/watchdog restriction */
86static int cards_found;
87
88/* module parameters */
89/* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
90#define WATCHDOG_HEARTBEAT 30
91static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */
92module_param(heartbeat, int, 0);
93MODULE_PARM_DESC(heartbeat,
94		"Watchdog heartbeat in seconds. (1<heartbeat<2046, default="
95				__MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
96
97static bool nowayout = WATCHDOG_NOWAYOUT;
98module_param(nowayout, bool, 0);
99MODULE_PARM_DESC(nowayout,
100		"Watchdog cannot be stopped once started (default="
101				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
102
103/*
104 * Some i6300ESB specific functions
105 */
106
107/*
108 * Prepare for reloading the timer by unlocking the proper registers.
109 * This is performed by first writing 0x80 followed by 0x86 to the
110 * reload register. After this the appropriate registers can be written
111 * to once before they need to be unlocked again.
112 */
113static inline void esb_unlock_registers(void)
114{
115	writew(ESB_UNLOCK1, ESB_RELOAD_REG);
116	writew(ESB_UNLOCK2, ESB_RELOAD_REG);
117}
118
119static int esb_timer_start(void)
120{
121	u8 val;
122
123	spin_lock(&esb_lock);
124	esb_unlock_registers();
125	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
126	/* Enable or Enable + Lock? */
127	val = ESB_WDT_ENABLE | (nowayout ? ESB_WDT_LOCK : 0x00);
128	pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
129	spin_unlock(&esb_lock);
130	return 0;
131}
132
133static int esb_timer_stop(void)
134{
135	u8 val;
136
137	spin_lock(&esb_lock);
138	/* First, reset timers as suggested by the docs */
139	esb_unlock_registers();
140	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
141	/* Then disable the WDT */
142	pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
143	pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
144	spin_unlock(&esb_lock);
145
146	/* Returns 0 if the timer was disabled, non-zero otherwise */
147	return val & ESB_WDT_ENABLE;
148}
149
150static void esb_timer_keepalive(void)
151{
152	spin_lock(&esb_lock);
153	esb_unlock_registers();
154	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
155	/* FIXME: Do we need to flush anything here? */
156	spin_unlock(&esb_lock);
157}
158
159static int esb_timer_set_heartbeat(int time)
160{
161	u32 val;
162
163	if (time < 0x1 || time > (2 * 0x03ff))
164		return -EINVAL;
165
166	spin_lock(&esb_lock);
167
168	/* We shift by 9, so if we are passed a value of 1 sec,
169	 * val will be 1 << 9 = 512, then write that to two
170	 * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
171	 */
172	val = time << 9;
173
174	/* Write timer 1 */
175	esb_unlock_registers();
176	writel(val, ESB_TIMER1_REG);
177
178	/* Write timer 2 */
179	esb_unlock_registers();
180	writel(val, ESB_TIMER2_REG);
181
182	/* Reload */
183	esb_unlock_registers();
184	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
185
186	/* FIXME: Do we need to flush everything out? */
187
188	/* Done */
189	heartbeat = time;
190	spin_unlock(&esb_lock);
191	return 0;
192}
193
194/*
195 *	/dev/watchdog handling
196 */
197
198static int esb_open(struct inode *inode, struct file *file)
199{
200	/* /dev/watchdog can only be opened once */
201	if (test_and_set_bit(0, &timer_alive))
202		return -EBUSY;
203
204	/* Reload and activate timer */
205	esb_timer_start();
206
207	return nonseekable_open(inode, file);
208}
209
210static int esb_release(struct inode *inode, struct file *file)
211{
212	/* Shut off the timer. */
213	if (esb_expect_close == 42)
214		esb_timer_stop();
215	else {
216		pr_crit("Unexpected close, not stopping watchdog!\n");
217		esb_timer_keepalive();
218	}
219	clear_bit(0, &timer_alive);
220	esb_expect_close = 0;
221	return 0;
222}
223
224static ssize_t esb_write(struct file *file, const char __user *data,
225			  size_t len, loff_t *ppos)
226{
227	/* See if we got the magic character 'V' and reload the timer */
228	if (len) {
229		if (!nowayout) {
230			size_t i;
231
232			/* note: just in case someone wrote the magic character
233			 * five months ago... */
234			esb_expect_close = 0;
235
236			/* scan to see whether or not we got the
237			 * magic character */
238			for (i = 0; i != len; i++) {
239				char c;
240				if (get_user(c, data + i))
241					return -EFAULT;
242				if (c == 'V')
243					esb_expect_close = 42;
244			}
245		}
246
247		/* someone wrote to us, we should reload the timer */
248		esb_timer_keepalive();
249	}
250	return len;
251}
252
253static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
254{
255	int new_options, retval = -EINVAL;
256	int new_heartbeat;
257	void __user *argp = (void __user *)arg;
258	int __user *p = argp;
259	static const struct watchdog_info ident = {
260		.options =		WDIOF_SETTIMEOUT |
261					WDIOF_KEEPALIVEPING |
262					WDIOF_MAGICCLOSE,
263		.firmware_version =	0,
264		.identity =		ESB_MODULE_NAME,
265	};
266
267	switch (cmd) {
268	case WDIOC_GETSUPPORT:
269		return copy_to_user(argp, &ident,
270					sizeof(ident)) ? -EFAULT : 0;
271
272	case WDIOC_GETSTATUS:
273		return put_user(0, p);
274
275	case WDIOC_GETBOOTSTATUS:
276		return put_user(triggered, p);
277
278	case WDIOC_SETOPTIONS:
279	{
280		if (get_user(new_options, p))
281			return -EFAULT;
282
283		if (new_options & WDIOS_DISABLECARD) {
284			esb_timer_stop();
285			retval = 0;
286		}
287
288		if (new_options & WDIOS_ENABLECARD) {
289			esb_timer_start();
290			retval = 0;
291		}
292		return retval;
293	}
294	case WDIOC_KEEPALIVE:
295		esb_timer_keepalive();
296		return 0;
297
298	case WDIOC_SETTIMEOUT:
299	{
300		if (get_user(new_heartbeat, p))
301			return -EFAULT;
302		if (esb_timer_set_heartbeat(new_heartbeat))
303			return -EINVAL;
304		esb_timer_keepalive();
305		/* Fall */
306	}
307	case WDIOC_GETTIMEOUT:
308		return put_user(heartbeat, p);
309	default:
310		return -ENOTTY;
311	}
312}
313
314/*
315 *      Kernel Interfaces
316 */
317
318static const struct file_operations esb_fops = {
319	.owner = THIS_MODULE,
320	.llseek = no_llseek,
321	.write = esb_write,
322	.unlocked_ioctl = esb_ioctl,
323	.open = esb_open,
324	.release = esb_release,
325};
326
327static struct miscdevice esb_miscdev = {
328	.minor = WATCHDOG_MINOR,
329	.name = "watchdog",
330	.fops = &esb_fops,
331};
332
333/*
334 * Data for PCI driver interface
335 */
336static const struct pci_device_id esb_pci_tbl[] = {
337	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
338	{ 0, },                 /* End of list */
339};
340MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
341
342/*
343 *      Init & exit routines
344 */
345
346static unsigned char esb_getdevice(struct pci_dev *pdev)
347{
348	if (pci_enable_device(pdev)) {
349		pr_err("failed to enable device\n");
350		goto err_devput;
351	}
352
353	if (pci_request_region(pdev, 0, ESB_MODULE_NAME)) {
354		pr_err("failed to request region\n");
355		goto err_disable;
356	}
357
358	BASEADDR = pci_ioremap_bar(pdev, 0);
359	if (BASEADDR == NULL) {
360		/* Something's wrong here, BASEADDR has to be set */
361		pr_err("failed to get BASEADDR\n");
362		goto err_release;
363	}
364
365	/* Done */
366	esb_pci = pdev;
367	return 1;
368
369err_release:
370	pci_release_region(pdev, 0);
371err_disable:
372	pci_disable_device(pdev);
373err_devput:
374	return 0;
375}
376
377static void esb_initdevice(void)
378{
379	u8 val1;
380	u16 val2;
381
382	/*
383	 * Config register:
384	 * Bit    5 : 0 = Enable WDT_OUTPUT
385	 * Bit    2 : 0 = set the timer frequency to the PCI clock
386	 * divided by 2^15 (approx 1KHz).
387	 * Bits 1:0 : 11 = WDT_INT_TYPE Disabled.
388	 * The watchdog has two timers, it can be setup so that the
389	 * expiry of timer1 results in an interrupt and the expiry of
390	 * timer2 results in a reboot. We set it to not generate
391	 * any interrupts as there is not much we can do with it
392	 * right now.
393	 */
394	pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
395
396	/* Check that the WDT isn't already locked */
397	pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
398	if (val1 & ESB_WDT_LOCK)
399		pr_warn("nowayout already set\n");
400
401	/* Set the timer to watchdog mode and disable it for now */
402	pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
403
404	/* Check if the watchdog was previously triggered */
405	esb_unlock_registers();
406	val2 = readw(ESB_RELOAD_REG);
407	if (val2 & ESB_WDT_TIMEOUT)
408		triggered = WDIOF_CARDRESET;
409
410	/* Reset WDT_TIMEOUT flag and timers */
411	esb_unlock_registers();
412	writew((ESB_WDT_TIMEOUT | ESB_WDT_RELOAD), ESB_RELOAD_REG);
413
414	/* And set the correct timeout value */
415	esb_timer_set_heartbeat(heartbeat);
416}
417
418static int esb_probe(struct pci_dev *pdev,
419		const struct pci_device_id *ent)
420{
421	int ret;
422
423	cards_found++;
424	if (cards_found == 1)
425		pr_info("Intel 6300ESB WatchDog Timer Driver v%s\n",
426			ESB_VERSION);
427
428	if (cards_found > 1) {
429		pr_err("This driver only supports 1 device\n");
430		return -ENODEV;
431	}
432
433	/* Check whether or not the hardware watchdog is there */
434	if (!esb_getdevice(pdev) || esb_pci == NULL)
435		return -ENODEV;
436
437	/* Check that the heartbeat value is within it's range;
438	   if not reset to the default */
439	if (heartbeat < 0x1 || heartbeat > 2 * 0x03ff) {
440		heartbeat = WATCHDOG_HEARTBEAT;
441		pr_info("heartbeat value must be 1<heartbeat<2046, using %d\n",
442			heartbeat);
443	}
444
445	/* Initialize the watchdog and make sure it does not run */
446	esb_initdevice();
447
448	/* Register the watchdog so that userspace has access to it */
449	ret = misc_register(&esb_miscdev);
450	if (ret != 0) {
451		pr_err("cannot register miscdev on minor=%d (err=%d)\n",
452		       WATCHDOG_MINOR, ret);
453		goto err_unmap;
454	}
455	pr_info("initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
456		BASEADDR, heartbeat, nowayout);
457	return 0;
458
459err_unmap:
460	iounmap(BASEADDR);
461	pci_release_region(esb_pci, 0);
462	pci_disable_device(esb_pci);
463	esb_pci = NULL;
464	return ret;
465}
466
467static void esb_remove(struct pci_dev *pdev)
468{
469	/* Stop the timer before we leave */
470	if (!nowayout)
471		esb_timer_stop();
472
473	/* Deregister */
474	misc_deregister(&esb_miscdev);
475	iounmap(BASEADDR);
476	pci_release_region(esb_pci, 0);
477	pci_disable_device(esb_pci);
478	esb_pci = NULL;
479}
480
481static void esb_shutdown(struct pci_dev *pdev)
482{
483	esb_timer_stop();
484}
485
486static struct pci_driver esb_driver = {
487	.name		= ESB_MODULE_NAME,
488	.id_table	= esb_pci_tbl,
489	.probe          = esb_probe,
490	.remove         = esb_remove,
491	.shutdown       = esb_shutdown,
492};
493
494module_pci_driver(esb_driver);
495
496MODULE_AUTHOR("Ross Biro and David H��rdeman");
497MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
498MODULE_LICENSE("GPL");
499