1/*
2 * USB Peripheral Controller driver for Aeroflex Gaisler GRUSBDC.
3 *
4 * 2013 (c) Aeroflex Gaisler AB
5 *
6 * This driver supports GRUSBDC USB Device Controller cores available in the
7 * GRLIB VHDL IP core library.
8 *
9 * Full documentation of the GRUSBDC core can be found here:
10 * http://www.gaisler.com/products/grlib/grip.pdf
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * Contributors:
18 * - Andreas Larsson <andreas@gaisler.com>
19 * - Marko Isomaki
20 */
21
22/* Control registers on the AMBA bus */
23
24#define GR_MAXEP	16	/* Max # endpoints for *each* direction */
25
26struct gr_epregs {
27	u32 epctrl;
28	union {
29		struct { /* Slave mode*/
30			u32 slvctrl;
31			u32 slvdata;
32		};
33		struct { /* DMA mode*/
34			u32 dmactrl;
35			u32 dmaaddr;
36		};
37	};
38	u32 epstat;
39};
40
41struct gr_regs {
42	struct gr_epregs	epo[GR_MAXEP];	/* 0x000 - 0x0fc */
43	struct gr_epregs	epi[GR_MAXEP];	/* 0x100 - 0x1fc */
44	u32			control;	/* 0x200 */
45	u32			status;		/* 0x204 */
46};
47
48#define GR_EPCTRL_BUFSZ_SCALER	8
49#define GR_EPCTRL_BUFSZ_MASK	0xffe00000
50#define GR_EPCTRL_BUFSZ_POS	21
51#define GR_EPCTRL_PI		BIT(20)
52#define GR_EPCTRL_CB		BIT(19)
53#define GR_EPCTRL_CS		BIT(18)
54#define GR_EPCTRL_MAXPL_MASK	0x0003ff80
55#define GR_EPCTRL_MAXPL_POS	7
56#define GR_EPCTRL_NT_MASK	0x00000060
57#define GR_EPCTRL_NT_POS	5
58#define GR_EPCTRL_TT_MASK	0x00000018
59#define GR_EPCTRL_TT_POS	3
60#define GR_EPCTRL_EH		BIT(2)
61#define GR_EPCTRL_ED		BIT(1)
62#define GR_EPCTRL_EV		BIT(0)
63
64#define GR_DMACTRL_AE		BIT(10)
65#define GR_DMACTRL_AD		BIT(3)
66#define GR_DMACTRL_AI		BIT(2)
67#define GR_DMACTRL_IE		BIT(1)
68#define GR_DMACTRL_DA		BIT(0)
69
70#define GR_EPSTAT_PT		BIT(29)
71#define GR_EPSTAT_PR		BIT(29)
72#define GR_EPSTAT_B1CNT_MASK	0x1fff0000
73#define GR_EPSTAT_B1CNT_POS	16
74#define GR_EPSTAT_B0CNT_MASK	0x0000fff8
75#define GR_EPSTAT_B0CNT_POS	3
76#define GR_EPSTAT_B1		BIT(2)
77#define GR_EPSTAT_B0		BIT(1)
78#define GR_EPSTAT_BS		BIT(0)
79
80#define GR_CONTROL_SI		BIT(31)
81#define GR_CONTROL_UI		BIT(30)
82#define GR_CONTROL_VI		BIT(29)
83#define GR_CONTROL_SP		BIT(28)
84#define GR_CONTROL_FI		BIT(27)
85#define GR_CONTROL_EP		BIT(14)
86#define GR_CONTROL_DH		BIT(13)
87#define GR_CONTROL_RW		BIT(12)
88#define GR_CONTROL_TS_MASK	0x00000e00
89#define GR_CONTROL_TS_POS	9
90#define GR_CONTROL_TM		BIT(8)
91#define GR_CONTROL_UA_MASK	0x000000fe
92#define GR_CONTROL_UA_POS	1
93#define GR_CONTROL_SU		BIT(0)
94
95#define GR_STATUS_NEPI_MASK	0xf0000000
96#define GR_STATUS_NEPI_POS	28
97#define GR_STATUS_NEPO_MASK	0x0f000000
98#define GR_STATUS_NEPO_POS	24
99#define GR_STATUS_DM		BIT(23)
100#define GR_STATUS_SU		BIT(17)
101#define GR_STATUS_UR		BIT(16)
102#define GR_STATUS_VB		BIT(15)
103#define GR_STATUS_SP		BIT(14)
104#define GR_STATUS_AF_MASK	0x00003800
105#define GR_STATUS_AF_POS	11
106#define GR_STATUS_FN_MASK	0x000007ff
107#define GR_STATUS_FN_POS	0
108
109
110#define MAX_CTRL_PL_SIZE 64 /* As per USB standard for full and high speed */
111
112/*-------------------------------------------------------------------------*/
113
114/* Driver data structures and utilities */
115
116struct gr_dma_desc {
117	u32 ctrl;
118	u32 data;
119	u32 next;
120
121	/* These must be last because hw uses the previous three */
122	u32 paddr;
123	struct gr_dma_desc *next_desc;
124};
125
126#define GR_DESC_OUT_CTRL_SE		BIT(17)
127#define GR_DESC_OUT_CTRL_IE		BIT(15)
128#define GR_DESC_OUT_CTRL_NX		BIT(14)
129#define GR_DESC_OUT_CTRL_EN		BIT(13)
130#define GR_DESC_OUT_CTRL_LEN_MASK	0x00001fff
131
132#define GR_DESC_IN_CTRL_MO		BIT(18)
133#define GR_DESC_IN_CTRL_PI		BIT(17)
134#define GR_DESC_IN_CTRL_ML		BIT(16)
135#define GR_DESC_IN_CTRL_IE		BIT(15)
136#define GR_DESC_IN_CTRL_NX		BIT(14)
137#define GR_DESC_IN_CTRL_EN		BIT(13)
138#define GR_DESC_IN_CTRL_LEN_MASK	0x00001fff
139
140#define GR_DESC_DMAADDR_MASK		0xfffffffc
141
142struct gr_ep {
143	struct usb_ep ep;
144	struct gr_udc *dev;
145	u16 bytes_per_buffer;
146	unsigned int dma_start;
147	struct gr_epregs __iomem *regs;
148
149	unsigned num:8;
150	unsigned is_in:1;
151	unsigned stopped:1;
152	unsigned wedged:1;
153	unsigned callback:1;
154
155	/* analogous to a host-side qh */
156	struct list_head queue;
157
158	struct list_head ep_list;
159
160	/* Bounce buffer for end of "odd" sized OUT requests */
161	void *tailbuf;
162	dma_addr_t tailbuf_paddr;
163};
164
165struct gr_request {
166	struct usb_request req;
167	struct list_head queue;
168
169	/* Chain of dma descriptors */
170	struct gr_dma_desc *first_desc; /* First in the chain */
171	struct gr_dma_desc *curr_desc; /* Current descriptor */
172	struct gr_dma_desc *last_desc; /* Last in the chain */
173
174	u16 evenlen; /* Size of even length head (if oddlen != 0) */
175	u16 oddlen; /* Size of odd length tail if buffer length is "odd" */
176
177	u8 setup; /* Setup packet */
178};
179
180enum gr_ep0state {
181	GR_EP0_DISCONNECT = 0,	/* No host */
182	GR_EP0_SETUP,		/* Between STATUS ack and SETUP report */
183	GR_EP0_IDATA,		/* IN data stage */
184	GR_EP0_ODATA,		/* OUT data stage */
185	GR_EP0_ISTATUS,		/* Status stage after IN data stage */
186	GR_EP0_OSTATUS,		/* Status stage after OUT data stage */
187	GR_EP0_STALL,		/* Data or status stages */
188	GR_EP0_SUSPEND,		/* USB suspend */
189};
190
191struct gr_udc {
192	struct usb_gadget gadget;
193	struct gr_ep epi[GR_MAXEP];
194	struct gr_ep epo[GR_MAXEP];
195	struct usb_gadget_driver *driver;
196	struct dma_pool *desc_pool;
197	struct device *dev;
198
199	enum gr_ep0state ep0state;
200	struct gr_request *ep0reqo;
201	struct gr_request *ep0reqi;
202
203	struct gr_regs __iomem *regs;
204	int irq;
205	int irqi;
206	int irqo;
207
208	unsigned added:1;
209	unsigned irq_enabled:1;
210	unsigned remote_wakeup:1;
211
212	u8 test_mode;
213
214	enum usb_device_state suspended_from;
215
216	unsigned int nepi;
217	unsigned int nepo;
218
219	struct list_head ep_list;
220
221	spinlock_t lock; /* General lock, a.k.a. "dev->lock" in comments */
222
223	struct dentry *dfs_root;
224	struct dentry *dfs_state;
225};
226
227#define to_gr_udc(gadget)	(container_of((gadget), struct gr_udc, gadget))
228