1/* 2 * Marvell 88SE64xx/88SE94xx main function 3 * 4 * Copyright 2007 Red Hat, Inc. 5 * Copyright 2008 Marvell. <kewei@marvell.com> 6 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com> 7 * 8 * This file is licensed under GPLv2. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; version 2 of the 13 * License. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 23 * USA 24*/ 25 26#include "mv_sas.h" 27 28static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag) 29{ 30 if (task->lldd_task) { 31 struct mvs_slot_info *slot; 32 slot = task->lldd_task; 33 *tag = slot->slot_tag; 34 return 1; 35 } 36 return 0; 37} 38 39void mvs_tag_clear(struct mvs_info *mvi, u32 tag) 40{ 41 void *bitmap = mvi->tags; 42 clear_bit(tag, bitmap); 43} 44 45void mvs_tag_free(struct mvs_info *mvi, u32 tag) 46{ 47 mvs_tag_clear(mvi, tag); 48} 49 50void mvs_tag_set(struct mvs_info *mvi, unsigned int tag) 51{ 52 void *bitmap = mvi->tags; 53 set_bit(tag, bitmap); 54} 55 56inline int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out) 57{ 58 unsigned int index, tag; 59 void *bitmap = mvi->tags; 60 61 index = find_first_zero_bit(bitmap, mvi->tags_num); 62 tag = index; 63 if (tag >= mvi->tags_num) 64 return -SAS_QUEUE_FULL; 65 mvs_tag_set(mvi, tag); 66 *tag_out = tag; 67 return 0; 68} 69 70void mvs_tag_init(struct mvs_info *mvi) 71{ 72 int i; 73 for (i = 0; i < mvi->tags_num; ++i) 74 mvs_tag_clear(mvi, i); 75} 76 77struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev) 78{ 79 unsigned long i = 0, j = 0, hi = 0; 80 struct sas_ha_struct *sha = dev->port->ha; 81 struct mvs_info *mvi = NULL; 82 struct asd_sas_phy *phy; 83 84 while (sha->sas_port[i]) { 85 if (sha->sas_port[i] == dev->port) { 86 phy = container_of(sha->sas_port[i]->phy_list.next, 87 struct asd_sas_phy, port_phy_el); 88 j = 0; 89 while (sha->sas_phy[j]) { 90 if (sha->sas_phy[j] == phy) 91 break; 92 j++; 93 } 94 break; 95 } 96 i++; 97 } 98 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; 99 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; 100 101 return mvi; 102 103} 104 105int mvs_find_dev_phyno(struct domain_device *dev, int *phyno) 106{ 107 unsigned long i = 0, j = 0, n = 0, num = 0; 108 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 109 struct mvs_info *mvi = mvi_dev->mvi_info; 110 struct sas_ha_struct *sha = dev->port->ha; 111 112 while (sha->sas_port[i]) { 113 if (sha->sas_port[i] == dev->port) { 114 struct asd_sas_phy *phy; 115 list_for_each_entry(phy, 116 &sha->sas_port[i]->phy_list, port_phy_el) { 117 j = 0; 118 while (sha->sas_phy[j]) { 119 if (sha->sas_phy[j] == phy) 120 break; 121 j++; 122 } 123 phyno[n] = (j >= mvi->chip->n_phy) ? 124 (j - mvi->chip->n_phy) : j; 125 num++; 126 n++; 127 } 128 break; 129 } 130 i++; 131 } 132 return num; 133} 134 135struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi, 136 u8 reg_set) 137{ 138 u32 dev_no; 139 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) { 140 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED) 141 continue; 142 143 if (mvi->devices[dev_no].taskfileset == reg_set) 144 return &mvi->devices[dev_no]; 145 } 146 return NULL; 147} 148 149static inline void mvs_free_reg_set(struct mvs_info *mvi, 150 struct mvs_device *dev) 151{ 152 if (!dev) { 153 mv_printk("device has been free.\n"); 154 return; 155 } 156 if (dev->taskfileset == MVS_ID_NOT_MAPPED) 157 return; 158 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset); 159} 160 161static inline u8 mvs_assign_reg_set(struct mvs_info *mvi, 162 struct mvs_device *dev) 163{ 164 if (dev->taskfileset != MVS_ID_NOT_MAPPED) 165 return 0; 166 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset); 167} 168 169void mvs_phys_reset(struct mvs_info *mvi, u32 phy_mask, int hard) 170{ 171 u32 no; 172 for_each_phy(phy_mask, phy_mask, no) { 173 if (!(phy_mask & 1)) 174 continue; 175 MVS_CHIP_DISP->phy_reset(mvi, no, hard); 176 } 177} 178 179int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func, 180 void *funcdata) 181{ 182 int rc = 0, phy_id = sas_phy->id; 183 u32 tmp, i = 0, hi; 184 struct sas_ha_struct *sha = sas_phy->ha; 185 struct mvs_info *mvi = NULL; 186 187 while (sha->sas_phy[i]) { 188 if (sha->sas_phy[i] == sas_phy) 189 break; 190 i++; 191 } 192 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; 193 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi]; 194 195 switch (func) { 196 case PHY_FUNC_SET_LINK_RATE: 197 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata); 198 break; 199 200 case PHY_FUNC_HARD_RESET: 201 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id); 202 if (tmp & PHY_RST_HARD) 203 break; 204 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET); 205 break; 206 207 case PHY_FUNC_LINK_RESET: 208 MVS_CHIP_DISP->phy_enable(mvi, phy_id); 209 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET); 210 break; 211 212 case PHY_FUNC_DISABLE: 213 MVS_CHIP_DISP->phy_disable(mvi, phy_id); 214 break; 215 case PHY_FUNC_RELEASE_SPINUP_HOLD: 216 default: 217 rc = -ENOSYS; 218 } 219 msleep(200); 220 return rc; 221} 222 223void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo, 224 u32 off_hi, u64 sas_addr) 225{ 226 u32 lo = (u32)sas_addr; 227 u32 hi = (u32)(sas_addr>>32); 228 229 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo); 230 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo); 231 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi); 232 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi); 233} 234 235static void mvs_bytes_dmaed(struct mvs_info *mvi, int i) 236{ 237 struct mvs_phy *phy = &mvi->phy[i]; 238 struct asd_sas_phy *sas_phy = &phy->sas_phy; 239 struct sas_ha_struct *sas_ha; 240 if (!phy->phy_attached) 241 return; 242 243 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK) 244 && phy->phy_type & PORT_TYPE_SAS) { 245 return; 246 } 247 248 sas_ha = mvi->sas; 249 sas_ha->notify_phy_event(sas_phy, PHYE_OOB_DONE); 250 251 if (sas_phy->phy) { 252 struct sas_phy *sphy = sas_phy->phy; 253 254 sphy->negotiated_linkrate = sas_phy->linkrate; 255 sphy->minimum_linkrate = phy->minimum_linkrate; 256 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; 257 sphy->maximum_linkrate = phy->maximum_linkrate; 258 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate(); 259 } 260 261 if (phy->phy_type & PORT_TYPE_SAS) { 262 struct sas_identify_frame *id; 263 264 id = (struct sas_identify_frame *)phy->frame_rcvd; 265 id->dev_type = phy->identify.device_type; 266 id->initiator_bits = SAS_PROTOCOL_ALL; 267 id->target_bits = phy->identify.target_port_protocols; 268 269 /* direct attached SAS device */ 270 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { 271 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); 272 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00); 273 } 274 } else if (phy->phy_type & PORT_TYPE_SATA) { 275 /*Nothing*/ 276 } 277 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy); 278 279 sas_phy->frame_rcvd_size = phy->frame_rcvd_size; 280 281 mvi->sas->notify_port_event(sas_phy, 282 PORTE_BYTES_DMAED); 283} 284 285void mvs_scan_start(struct Scsi_Host *shost) 286{ 287 int i, j; 288 unsigned short core_nr; 289 struct mvs_info *mvi; 290 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 291 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 292 293 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host; 294 295 for (j = 0; j < core_nr; j++) { 296 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j]; 297 for (i = 0; i < mvi->chip->n_phy; ++i) 298 mvs_bytes_dmaed(mvi, i); 299 } 300 mvs_prv->scan_finished = 1; 301} 302 303int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time) 304{ 305 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost); 306 struct mvs_prv_info *mvs_prv = sha->lldd_ha; 307 308 if (mvs_prv->scan_finished == 0) 309 return 0; 310 311 sas_drain_work(sha); 312 return 1; 313} 314 315static int mvs_task_prep_smp(struct mvs_info *mvi, 316 struct mvs_task_exec_info *tei) 317{ 318 int elem, rc, i; 319 struct sas_ha_struct *sha = mvi->sas; 320 struct sas_task *task = tei->task; 321 struct mvs_cmd_hdr *hdr = tei->hdr; 322 struct domain_device *dev = task->dev; 323 struct asd_sas_port *sas_port = dev->port; 324 struct sas_phy *sphy = dev->phy; 325 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number]; 326 struct scatterlist *sg_req, *sg_resp; 327 u32 req_len, resp_len, tag = tei->tag; 328 void *buf_tmp; 329 u8 *buf_oaf; 330 dma_addr_t buf_tmp_dma; 331 void *buf_prd; 332 struct mvs_slot_info *slot = &mvi->slot_info[tag]; 333 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); 334 335 /* 336 * DMA-map SMP request, response buffers 337 */ 338 sg_req = &task->smp_task.smp_req; 339 elem = dma_map_sg(mvi->dev, sg_req, 1, PCI_DMA_TODEVICE); 340 if (!elem) 341 return -ENOMEM; 342 req_len = sg_dma_len(sg_req); 343 344 sg_resp = &task->smp_task.smp_resp; 345 elem = dma_map_sg(mvi->dev, sg_resp, 1, PCI_DMA_FROMDEVICE); 346 if (!elem) { 347 rc = -ENOMEM; 348 goto err_out; 349 } 350 resp_len = SB_RFB_MAX; 351 352 /* must be in dwords */ 353 if ((req_len & 0x3) || (resp_len & 0x3)) { 354 rc = -EINVAL; 355 goto err_out_2; 356 } 357 358 /* 359 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 360 */ 361 362 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */ 363 buf_tmp = slot->buf; 364 buf_tmp_dma = slot->buf_dma; 365 366 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req)); 367 368 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 369 buf_oaf = buf_tmp; 370 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 371 372 buf_tmp += MVS_OAF_SZ; 373 buf_tmp_dma += MVS_OAF_SZ; 374 375 /* region 3: PRD table *********************************** */ 376 buf_prd = buf_tmp; 377 if (tei->n_elem) 378 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 379 else 380 hdr->prd_tbl = 0; 381 382 i = MVS_CHIP_DISP->prd_size() * tei->n_elem; 383 buf_tmp += i; 384 buf_tmp_dma += i; 385 386 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 387 slot->response = buf_tmp; 388 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 389 if (mvi->flags & MVF_FLAG_SOC) 390 hdr->reserved[0] = 0; 391 392 /* 393 * Fill in TX ring and command slot header 394 */ 395 slot->tx = mvi->tx_prod; 396 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) | 397 TXQ_MODE_I | tag | 398 (MVS_PHY_ID << TXQ_PHY_SHIFT)); 399 400 hdr->flags |= flags; 401 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4)); 402 hdr->tags = cpu_to_le32(tag); 403 hdr->data_len = 0; 404 405 /* generate open address frame hdr (first 12 bytes) */ 406 /* initiator, SMP, ftype 1h */ 407 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01; 408 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 409 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */ 410 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 411 412 /* fill in PRD (scatter/gather) table, if any */ 413 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 414 415 return 0; 416 417err_out_2: 418 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1, 419 PCI_DMA_FROMDEVICE); 420err_out: 421 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1, 422 PCI_DMA_TODEVICE); 423 return rc; 424} 425 426static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag) 427{ 428 struct ata_queued_cmd *qc = task->uldd_task; 429 430 if (qc) { 431 if (qc->tf.command == ATA_CMD_FPDMA_WRITE || 432 qc->tf.command == ATA_CMD_FPDMA_READ) { 433 *tag = qc->tag; 434 return 1; 435 } 436 } 437 438 return 0; 439} 440 441static int mvs_task_prep_ata(struct mvs_info *mvi, 442 struct mvs_task_exec_info *tei) 443{ 444 struct sas_task *task = tei->task; 445 struct domain_device *dev = task->dev; 446 struct mvs_device *mvi_dev = dev->lldd_dev; 447 struct mvs_cmd_hdr *hdr = tei->hdr; 448 struct asd_sas_port *sas_port = dev->port; 449 struct mvs_slot_info *slot; 450 void *buf_prd; 451 u32 tag = tei->tag, hdr_tag; 452 u32 flags, del_q; 453 void *buf_tmp; 454 u8 *buf_cmd, *buf_oaf; 455 dma_addr_t buf_tmp_dma; 456 u32 i, req_len, resp_len; 457 const u32 max_resp_len = SB_RFB_MAX; 458 459 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) { 460 mv_dprintk("Have not enough regiset for dev %d.\n", 461 mvi_dev->device_id); 462 return -EBUSY; 463 } 464 slot = &mvi->slot_info[tag]; 465 slot->tx = mvi->tx_prod; 466 del_q = TXQ_MODE_I | tag | 467 (TXQ_CMD_STP << TXQ_CMD_SHIFT) | 468 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) | 469 (mvi_dev->taskfileset << TXQ_SRS_SHIFT); 470 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q); 471 472 if (task->data_dir == DMA_FROM_DEVICE) 473 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT); 474 else 475 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT); 476 477 if (task->ata_task.use_ncq) 478 flags |= MCH_FPDMA; 479 if (dev->sata_dev.class == ATA_DEV_ATAPI) { 480 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI) 481 flags |= MCH_ATAPI; 482 } 483 484 hdr->flags = cpu_to_le32(flags); 485 486 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag)) 487 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 488 else 489 hdr_tag = tag; 490 491 hdr->tags = cpu_to_le32(hdr_tag); 492 493 hdr->data_len = cpu_to_le32(task->total_xfer_len); 494 495 /* 496 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 497 */ 498 499 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */ 500 buf_cmd = buf_tmp = slot->buf; 501 buf_tmp_dma = slot->buf_dma; 502 503 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); 504 505 buf_tmp += MVS_ATA_CMD_SZ; 506 buf_tmp_dma += MVS_ATA_CMD_SZ; 507 508 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 509 /* used for STP. unused for SATA? */ 510 buf_oaf = buf_tmp; 511 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 512 513 buf_tmp += MVS_OAF_SZ; 514 buf_tmp_dma += MVS_OAF_SZ; 515 516 /* region 3: PRD table ********************************************* */ 517 buf_prd = buf_tmp; 518 519 if (tei->n_elem) 520 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 521 else 522 hdr->prd_tbl = 0; 523 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count(); 524 525 buf_tmp += i; 526 buf_tmp_dma += i; 527 528 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 529 slot->response = buf_tmp; 530 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 531 if (mvi->flags & MVF_FLAG_SOC) 532 hdr->reserved[0] = 0; 533 534 req_len = sizeof(struct host_to_dev_fis); 535 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ - 536 sizeof(struct mvs_err_info) - i; 537 538 /* request, response lengths */ 539 resp_len = min(resp_len, max_resp_len); 540 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); 541 542 if (likely(!task->ata_task.device_control_reg_update)) 543 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */ 544 /* fill in command FIS and ATAPI CDB */ 545 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis)); 546 if (dev->sata_dev.class == ATA_DEV_ATAPI) 547 memcpy(buf_cmd + STP_ATAPI_CMD, 548 task->ata_task.atapi_packet, 16); 549 550 /* generate open address frame hdr (first 12 bytes) */ 551 /* initiator, STP, ftype 1h */ 552 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1; 553 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 554 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); 555 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 556 557 /* fill in PRD (scatter/gather) table, if any */ 558 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 559 560 if (task->data_dir == DMA_FROM_DEVICE) 561 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask, 562 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd); 563 564 return 0; 565} 566 567static int mvs_task_prep_ssp(struct mvs_info *mvi, 568 struct mvs_task_exec_info *tei, int is_tmf, 569 struct mvs_tmf_task *tmf) 570{ 571 struct sas_task *task = tei->task; 572 struct mvs_cmd_hdr *hdr = tei->hdr; 573 struct mvs_port *port = tei->port; 574 struct domain_device *dev = task->dev; 575 struct mvs_device *mvi_dev = dev->lldd_dev; 576 struct asd_sas_port *sas_port = dev->port; 577 struct mvs_slot_info *slot; 578 void *buf_prd; 579 struct ssp_frame_hdr *ssp_hdr; 580 void *buf_tmp; 581 u8 *buf_cmd, *buf_oaf, fburst = 0; 582 dma_addr_t buf_tmp_dma; 583 u32 flags; 584 u32 resp_len, req_len, i, tag = tei->tag; 585 const u32 max_resp_len = SB_RFB_MAX; 586 u32 phy_mask; 587 588 slot = &mvi->slot_info[tag]; 589 590 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap : 591 sas_port->phy_mask) & TXQ_PHY_MASK; 592 593 slot->tx = mvi->tx_prod; 594 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag | 595 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) | 596 (phy_mask << TXQ_PHY_SHIFT)); 597 598 flags = MCH_RETRY; 599 if (task->ssp_task.enable_first_burst) { 600 flags |= MCH_FBURST; 601 fburst = (1 << 7); 602 } 603 if (is_tmf) 604 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT); 605 else 606 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT); 607 608 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT)); 609 hdr->tags = cpu_to_le32(tag); 610 hdr->data_len = cpu_to_le32(task->total_xfer_len); 611 612 /* 613 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs 614 */ 615 616 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */ 617 buf_cmd = buf_tmp = slot->buf; 618 buf_tmp_dma = slot->buf_dma; 619 620 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma); 621 622 buf_tmp += MVS_SSP_CMD_SZ; 623 buf_tmp_dma += MVS_SSP_CMD_SZ; 624 625 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */ 626 buf_oaf = buf_tmp; 627 hdr->open_frame = cpu_to_le64(buf_tmp_dma); 628 629 buf_tmp += MVS_OAF_SZ; 630 buf_tmp_dma += MVS_OAF_SZ; 631 632 /* region 3: PRD table ********************************************* */ 633 buf_prd = buf_tmp; 634 if (tei->n_elem) 635 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma); 636 else 637 hdr->prd_tbl = 0; 638 639 i = MVS_CHIP_DISP->prd_size() * tei->n_elem; 640 buf_tmp += i; 641 buf_tmp_dma += i; 642 643 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */ 644 slot->response = buf_tmp; 645 hdr->status_buf = cpu_to_le64(buf_tmp_dma); 646 if (mvi->flags & MVF_FLAG_SOC) 647 hdr->reserved[0] = 0; 648 649 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ - 650 sizeof(struct mvs_err_info) - i; 651 resp_len = min(resp_len, max_resp_len); 652 653 req_len = sizeof(struct ssp_frame_hdr) + 28; 654 655 /* request, response lengths */ 656 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4)); 657 658 /* generate open address frame hdr (first 12 bytes) */ 659 /* initiator, SSP, ftype 1h */ 660 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1; 661 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf; 662 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1); 663 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE); 664 665 /* fill in SSP frame header (Command Table.SSP frame header) */ 666 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd; 667 668 if (is_tmf) 669 ssp_hdr->frame_type = SSP_TASK; 670 else 671 ssp_hdr->frame_type = SSP_COMMAND; 672 673 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr, 674 HASHED_SAS_ADDR_SIZE); 675 memcpy(ssp_hdr->hashed_src_addr, 676 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE); 677 ssp_hdr->tag = cpu_to_be16(tag); 678 679 /* fill in IU for TASK and Command Frame */ 680 buf_cmd += sizeof(*ssp_hdr); 681 memcpy(buf_cmd, &task->ssp_task.LUN, 8); 682 683 if (ssp_hdr->frame_type != SSP_TASK) { 684 buf_cmd[9] = fburst | task->ssp_task.task_attr | 685 (task->ssp_task.task_prio << 3); 686 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd, 687 task->ssp_task.cmd->cmd_len); 688 } else{ 689 buf_cmd[10] = tmf->tmf; 690 switch (tmf->tmf) { 691 case TMF_ABORT_TASK: 692 case TMF_QUERY_TASK: 693 buf_cmd[12] = 694 (tmf->tag_of_task_to_be_managed >> 8) & 0xff; 695 buf_cmd[13] = 696 tmf->tag_of_task_to_be_managed & 0xff; 697 break; 698 default: 699 break; 700 } 701 } 702 /* fill in PRD (scatter/gather) table, if any */ 703 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd); 704 return 0; 705} 706 707#define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED))) 708static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf, 709 struct mvs_tmf_task *tmf, int *pass) 710{ 711 struct domain_device *dev = task->dev; 712 struct mvs_device *mvi_dev = dev->lldd_dev; 713 struct mvs_task_exec_info tei; 714 struct mvs_slot_info *slot; 715 u32 tag = 0xdeadbeef, n_elem = 0; 716 int rc = 0; 717 718 if (!dev->port) { 719 struct task_status_struct *tsm = &task->task_status; 720 721 tsm->resp = SAS_TASK_UNDELIVERED; 722 tsm->stat = SAS_PHY_DOWN; 723 /* 724 * libsas will use dev->port, should 725 * not call task_done for sata 726 */ 727 if (dev->dev_type != SAS_SATA_DEV) 728 task->task_done(task); 729 return rc; 730 } 731 732 if (DEV_IS_GONE(mvi_dev)) { 733 if (mvi_dev) 734 mv_dprintk("device %d not ready.\n", 735 mvi_dev->device_id); 736 else 737 mv_dprintk("device %016llx not ready.\n", 738 SAS_ADDR(dev->sas_addr)); 739 740 rc = SAS_PHY_DOWN; 741 return rc; 742 } 743 tei.port = dev->port->lldd_port; 744 if (tei.port && !tei.port->port_attached && !tmf) { 745 if (sas_protocol_ata(task->task_proto)) { 746 struct task_status_struct *ts = &task->task_status; 747 mv_dprintk("SATA/STP port %d does not attach" 748 "device.\n", dev->port->id); 749 ts->resp = SAS_TASK_COMPLETE; 750 ts->stat = SAS_PHY_DOWN; 751 752 task->task_done(task); 753 754 } else { 755 struct task_status_struct *ts = &task->task_status; 756 mv_dprintk("SAS port %d does not attach" 757 "device.\n", dev->port->id); 758 ts->resp = SAS_TASK_UNDELIVERED; 759 ts->stat = SAS_PHY_DOWN; 760 task->task_done(task); 761 } 762 return rc; 763 } 764 765 if (!sas_protocol_ata(task->task_proto)) { 766 if (task->num_scatter) { 767 n_elem = dma_map_sg(mvi->dev, 768 task->scatter, 769 task->num_scatter, 770 task->data_dir); 771 if (!n_elem) { 772 rc = -ENOMEM; 773 goto prep_out; 774 } 775 } 776 } else { 777 n_elem = task->num_scatter; 778 } 779 780 rc = mvs_tag_alloc(mvi, &tag); 781 if (rc) 782 goto err_out; 783 784 slot = &mvi->slot_info[tag]; 785 786 task->lldd_task = NULL; 787 slot->n_elem = n_elem; 788 slot->slot_tag = tag; 789 790 slot->buf = pci_pool_alloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma); 791 if (!slot->buf) 792 goto err_out_tag; 793 memset(slot->buf, 0, MVS_SLOT_BUF_SZ); 794 795 tei.task = task; 796 tei.hdr = &mvi->slot[tag]; 797 tei.tag = tag; 798 tei.n_elem = n_elem; 799 switch (task->task_proto) { 800 case SAS_PROTOCOL_SMP: 801 rc = mvs_task_prep_smp(mvi, &tei); 802 break; 803 case SAS_PROTOCOL_SSP: 804 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf); 805 break; 806 case SAS_PROTOCOL_SATA: 807 case SAS_PROTOCOL_STP: 808 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: 809 rc = mvs_task_prep_ata(mvi, &tei); 810 break; 811 default: 812 dev_printk(KERN_ERR, mvi->dev, 813 "unknown sas_task proto: 0x%x\n", 814 task->task_proto); 815 rc = -EINVAL; 816 break; 817 } 818 819 if (rc) { 820 mv_dprintk("rc is %x\n", rc); 821 goto err_out_slot_buf; 822 } 823 slot->task = task; 824 slot->port = tei.port; 825 task->lldd_task = slot; 826 list_add_tail(&slot->entry, &tei.port->list); 827 spin_lock(&task->task_state_lock); 828 task->task_state_flags |= SAS_TASK_AT_INITIATOR; 829 spin_unlock(&task->task_state_lock); 830 831 mvi_dev->running_req++; 832 ++(*pass); 833 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1); 834 835 return rc; 836 837err_out_slot_buf: 838 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); 839err_out_tag: 840 mvs_tag_free(mvi, tag); 841err_out: 842 843 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc); 844 if (!sas_protocol_ata(task->task_proto)) 845 if (n_elem) 846 dma_unmap_sg(mvi->dev, task->scatter, n_elem, 847 task->data_dir); 848prep_out: 849 return rc; 850} 851 852static int mvs_task_exec(struct sas_task *task, gfp_t gfp_flags, 853 struct completion *completion, int is_tmf, 854 struct mvs_tmf_task *tmf) 855{ 856 struct mvs_info *mvi = NULL; 857 u32 rc = 0; 858 u32 pass = 0; 859 unsigned long flags = 0; 860 861 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info; 862 863 spin_lock_irqsave(&mvi->lock, flags); 864 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass); 865 if (rc) 866 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc); 867 868 if (likely(pass)) 869 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) & 870 (MVS_CHIP_SLOT_SZ - 1)); 871 spin_unlock_irqrestore(&mvi->lock, flags); 872 873 return rc; 874} 875 876int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags) 877{ 878 return mvs_task_exec(task, gfp_flags, NULL, 0, NULL); 879} 880 881static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc) 882{ 883 u32 slot_idx = rx_desc & RXQ_SLOT_MASK; 884 mvs_tag_clear(mvi, slot_idx); 885} 886 887static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task, 888 struct mvs_slot_info *slot, u32 slot_idx) 889{ 890 if (!slot) 891 return; 892 if (!slot->task) 893 return; 894 if (!sas_protocol_ata(task->task_proto)) 895 if (slot->n_elem) 896 dma_unmap_sg(mvi->dev, task->scatter, 897 slot->n_elem, task->data_dir); 898 899 switch (task->task_proto) { 900 case SAS_PROTOCOL_SMP: 901 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1, 902 PCI_DMA_FROMDEVICE); 903 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1, 904 PCI_DMA_TODEVICE); 905 break; 906 907 case SAS_PROTOCOL_SATA: 908 case SAS_PROTOCOL_STP: 909 case SAS_PROTOCOL_SSP: 910 default: 911 /* do nothing */ 912 break; 913 } 914 915 if (slot->buf) { 916 pci_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma); 917 slot->buf = NULL; 918 } 919 list_del_init(&slot->entry); 920 task->lldd_task = NULL; 921 slot->task = NULL; 922 slot->port = NULL; 923 slot->slot_tag = 0xFFFFFFFF; 924 mvs_slot_free(mvi, slot_idx); 925} 926 927static void mvs_update_wideport(struct mvs_info *mvi, int phy_no) 928{ 929 struct mvs_phy *phy = &mvi->phy[phy_no]; 930 struct mvs_port *port = phy->port; 931 int j, no; 932 933 for_each_phy(port->wide_port_phymap, j, no) { 934 if (j & 1) { 935 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, 936 PHYR_WIDE_PORT); 937 MVS_CHIP_DISP->write_port_cfg_data(mvi, no, 938 port->wide_port_phymap); 939 } else { 940 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no, 941 PHYR_WIDE_PORT); 942 MVS_CHIP_DISP->write_port_cfg_data(mvi, no, 943 0); 944 } 945 } 946} 947 948static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i) 949{ 950 u32 tmp; 951 struct mvs_phy *phy = &mvi->phy[i]; 952 struct mvs_port *port = phy->port; 953 954 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i); 955 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) { 956 if (!port) 957 phy->phy_attached = 1; 958 return tmp; 959 } 960 961 if (port) { 962 if (phy->phy_type & PORT_TYPE_SAS) { 963 port->wide_port_phymap &= ~(1U << i); 964 if (!port->wide_port_phymap) 965 port->port_attached = 0; 966 mvs_update_wideport(mvi, i); 967 } else if (phy->phy_type & PORT_TYPE_SATA) 968 port->port_attached = 0; 969 phy->port = NULL; 970 phy->phy_attached = 0; 971 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA); 972 } 973 return 0; 974} 975 976static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf) 977{ 978 u32 *s = (u32 *) buf; 979 980 if (!s) 981 return NULL; 982 983 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3); 984 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 985 986 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2); 987 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 988 989 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1); 990 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 991 992 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0); 993 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i)); 994 995 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01)) 996 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10); 997 998 return s; 999} 1000 1001static u32 mvs_is_sig_fis_received(u32 irq_status) 1002{ 1003 return irq_status & PHYEV_SIG_FIS; 1004} 1005 1006static void mvs_sig_remove_timer(struct mvs_phy *phy) 1007{ 1008 if (phy->timer.function) 1009 del_timer(&phy->timer); 1010 phy->timer.function = NULL; 1011} 1012 1013void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st) 1014{ 1015 struct mvs_phy *phy = &mvi->phy[i]; 1016 struct sas_identify_frame *id; 1017 1018 id = (struct sas_identify_frame *)phy->frame_rcvd; 1019 1020 if (get_st) { 1021 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i); 1022 phy->phy_status = mvs_is_phy_ready(mvi, i); 1023 } 1024 1025 if (phy->phy_status) { 1026 int oob_done = 0; 1027 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy; 1028 1029 oob_done = MVS_CHIP_DISP->oob_done(mvi, i); 1030 1031 MVS_CHIP_DISP->fix_phy_info(mvi, i, id); 1032 if (phy->phy_type & PORT_TYPE_SATA) { 1033 phy->identify.target_port_protocols = SAS_PROTOCOL_STP; 1034 if (mvs_is_sig_fis_received(phy->irq_status)) { 1035 mvs_sig_remove_timer(phy); 1036 phy->phy_attached = 1; 1037 phy->att_dev_sas_addr = 1038 i + mvi->id * mvi->chip->n_phy; 1039 if (oob_done) 1040 sas_phy->oob_mode = SATA_OOB_MODE; 1041 phy->frame_rcvd_size = 1042 sizeof(struct dev_to_host_fis); 1043 mvs_get_d2h_reg(mvi, i, id); 1044 } else { 1045 u32 tmp; 1046 dev_printk(KERN_DEBUG, mvi->dev, 1047 "Phy%d : No sig fis\n", i); 1048 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i); 1049 MVS_CHIP_DISP->write_port_irq_mask(mvi, i, 1050 tmp | PHYEV_SIG_FIS); 1051 phy->phy_attached = 0; 1052 phy->phy_type &= ~PORT_TYPE_SATA; 1053 goto out_done; 1054 } 1055 } else if (phy->phy_type & PORT_TYPE_SAS 1056 || phy->att_dev_info & PORT_SSP_INIT_MASK) { 1057 phy->phy_attached = 1; 1058 phy->identify.device_type = 1059 phy->att_dev_info & PORT_DEV_TYPE_MASK; 1060 1061 if (phy->identify.device_type == SAS_END_DEVICE) 1062 phy->identify.target_port_protocols = 1063 SAS_PROTOCOL_SSP; 1064 else if (phy->identify.device_type != SAS_PHY_UNUSED) 1065 phy->identify.target_port_protocols = 1066 SAS_PROTOCOL_SMP; 1067 if (oob_done) 1068 sas_phy->oob_mode = SAS_OOB_MODE; 1069 phy->frame_rcvd_size = 1070 sizeof(struct sas_identify_frame); 1071 } 1072 memcpy(sas_phy->attached_sas_addr, 1073 &phy->att_dev_sas_addr, SAS_ADDR_SIZE); 1074 1075 if (MVS_CHIP_DISP->phy_work_around) 1076 MVS_CHIP_DISP->phy_work_around(mvi, i); 1077 } 1078 mv_dprintk("phy %d attach dev info is %x\n", 1079 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info); 1080 mv_dprintk("phy %d attach sas addr is %llx\n", 1081 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr); 1082out_done: 1083 if (get_st) 1084 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status); 1085} 1086 1087static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock) 1088{ 1089 struct sas_ha_struct *sas_ha = sas_phy->ha; 1090 struct mvs_info *mvi = NULL; int i = 0, hi; 1091 struct mvs_phy *phy = sas_phy->lldd_phy; 1092 struct asd_sas_port *sas_port = sas_phy->port; 1093 struct mvs_port *port; 1094 unsigned long flags = 0; 1095 if (!sas_port) 1096 return; 1097 1098 while (sas_ha->sas_phy[i]) { 1099 if (sas_ha->sas_phy[i] == sas_phy) 1100 break; 1101 i++; 1102 } 1103 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy; 1104 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi]; 1105 if (i >= mvi->chip->n_phy) 1106 port = &mvi->port[i - mvi->chip->n_phy]; 1107 else 1108 port = &mvi->port[i]; 1109 if (lock) 1110 spin_lock_irqsave(&mvi->lock, flags); 1111 port->port_attached = 1; 1112 phy->port = port; 1113 sas_port->lldd_port = port; 1114 if (phy->phy_type & PORT_TYPE_SAS) { 1115 port->wide_port_phymap = sas_port->phy_mask; 1116 mv_printk("set wide port phy map %x\n", sas_port->phy_mask); 1117 mvs_update_wideport(mvi, sas_phy->id); 1118 1119 /* direct attached SAS device */ 1120 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) { 1121 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT); 1122 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04); 1123 } 1124 } 1125 if (lock) 1126 spin_unlock_irqrestore(&mvi->lock, flags); 1127} 1128 1129static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock) 1130{ 1131 struct domain_device *dev; 1132 struct mvs_phy *phy = sas_phy->lldd_phy; 1133 struct mvs_info *mvi = phy->mvi; 1134 struct asd_sas_port *port = sas_phy->port; 1135 int phy_no = 0; 1136 1137 while (phy != &mvi->phy[phy_no]) { 1138 phy_no++; 1139 if (phy_no >= MVS_MAX_PHYS) 1140 return; 1141 } 1142 list_for_each_entry(dev, &port->dev_list, dev_list_node) 1143 mvs_do_release_task(phy->mvi, phy_no, dev); 1144 1145} 1146 1147 1148void mvs_port_formed(struct asd_sas_phy *sas_phy) 1149{ 1150 mvs_port_notify_formed(sas_phy, 1); 1151} 1152 1153void mvs_port_deformed(struct asd_sas_phy *sas_phy) 1154{ 1155 mvs_port_notify_deformed(sas_phy, 1); 1156} 1157 1158struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi) 1159{ 1160 u32 dev; 1161 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) { 1162 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) { 1163 mvi->devices[dev].device_id = dev; 1164 return &mvi->devices[dev]; 1165 } 1166 } 1167 1168 if (dev == MVS_MAX_DEVICES) 1169 mv_printk("max support %d devices, ignore ..\n", 1170 MVS_MAX_DEVICES); 1171 1172 return NULL; 1173} 1174 1175void mvs_free_dev(struct mvs_device *mvi_dev) 1176{ 1177 u32 id = mvi_dev->device_id; 1178 memset(mvi_dev, 0, sizeof(*mvi_dev)); 1179 mvi_dev->device_id = id; 1180 mvi_dev->dev_type = SAS_PHY_UNUSED; 1181 mvi_dev->dev_status = MVS_DEV_NORMAL; 1182 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED; 1183} 1184 1185int mvs_dev_found_notify(struct domain_device *dev, int lock) 1186{ 1187 unsigned long flags = 0; 1188 int res = 0; 1189 struct mvs_info *mvi = NULL; 1190 struct domain_device *parent_dev = dev->parent; 1191 struct mvs_device *mvi_device; 1192 1193 mvi = mvs_find_dev_mvi(dev); 1194 1195 if (lock) 1196 spin_lock_irqsave(&mvi->lock, flags); 1197 1198 mvi_device = mvs_alloc_dev(mvi); 1199 if (!mvi_device) { 1200 res = -1; 1201 goto found_out; 1202 } 1203 dev->lldd_dev = mvi_device; 1204 mvi_device->dev_status = MVS_DEV_NORMAL; 1205 mvi_device->dev_type = dev->dev_type; 1206 mvi_device->mvi_info = mvi; 1207 mvi_device->sas_device = dev; 1208 if (parent_dev && DEV_IS_EXPANDER(parent_dev->dev_type)) { 1209 int phy_id; 1210 u8 phy_num = parent_dev->ex_dev.num_phys; 1211 struct ex_phy *phy; 1212 for (phy_id = 0; phy_id < phy_num; phy_id++) { 1213 phy = &parent_dev->ex_dev.ex_phy[phy_id]; 1214 if (SAS_ADDR(phy->attached_sas_addr) == 1215 SAS_ADDR(dev->sas_addr)) { 1216 mvi_device->attached_phy = phy_id; 1217 break; 1218 } 1219 } 1220 1221 if (phy_id == phy_num) { 1222 mv_printk("Error: no attached dev:%016llx" 1223 "at ex:%016llx.\n", 1224 SAS_ADDR(dev->sas_addr), 1225 SAS_ADDR(parent_dev->sas_addr)); 1226 res = -1; 1227 } 1228 } 1229 1230found_out: 1231 if (lock) 1232 spin_unlock_irqrestore(&mvi->lock, flags); 1233 return res; 1234} 1235 1236int mvs_dev_found(struct domain_device *dev) 1237{ 1238 return mvs_dev_found_notify(dev, 1); 1239} 1240 1241void mvs_dev_gone_notify(struct domain_device *dev) 1242{ 1243 unsigned long flags = 0; 1244 struct mvs_device *mvi_dev = dev->lldd_dev; 1245 struct mvs_info *mvi; 1246 1247 if (!mvi_dev) { 1248 mv_dprintk("found dev has gone.\n"); 1249 return; 1250 } 1251 1252 mvi = mvi_dev->mvi_info; 1253 1254 spin_lock_irqsave(&mvi->lock, flags); 1255 1256 mv_dprintk("found dev[%d:%x] is gone.\n", 1257 mvi_dev->device_id, mvi_dev->dev_type); 1258 mvs_release_task(mvi, dev); 1259 mvs_free_reg_set(mvi, mvi_dev); 1260 mvs_free_dev(mvi_dev); 1261 1262 dev->lldd_dev = NULL; 1263 mvi_dev->sas_device = NULL; 1264 1265 spin_unlock_irqrestore(&mvi->lock, flags); 1266} 1267 1268 1269void mvs_dev_gone(struct domain_device *dev) 1270{ 1271 mvs_dev_gone_notify(dev); 1272} 1273 1274static void mvs_task_done(struct sas_task *task) 1275{ 1276 if (!del_timer(&task->slow_task->timer)) 1277 return; 1278 complete(&task->slow_task->completion); 1279} 1280 1281static void mvs_tmf_timedout(unsigned long data) 1282{ 1283 struct sas_task *task = (struct sas_task *)data; 1284 1285 task->task_state_flags |= SAS_TASK_STATE_ABORTED; 1286 complete(&task->slow_task->completion); 1287} 1288 1289#define MVS_TASK_TIMEOUT 20 1290static int mvs_exec_internal_tmf_task(struct domain_device *dev, 1291 void *parameter, u32 para_len, struct mvs_tmf_task *tmf) 1292{ 1293 int res, retry; 1294 struct sas_task *task = NULL; 1295 1296 for (retry = 0; retry < 3; retry++) { 1297 task = sas_alloc_slow_task(GFP_KERNEL); 1298 if (!task) 1299 return -ENOMEM; 1300 1301 task->dev = dev; 1302 task->task_proto = dev->tproto; 1303 1304 memcpy(&task->ssp_task, parameter, para_len); 1305 task->task_done = mvs_task_done; 1306 1307 task->slow_task->timer.data = (unsigned long) task; 1308 task->slow_task->timer.function = mvs_tmf_timedout; 1309 task->slow_task->timer.expires = jiffies + MVS_TASK_TIMEOUT*HZ; 1310 add_timer(&task->slow_task->timer); 1311 1312 res = mvs_task_exec(task, GFP_KERNEL, NULL, 1, tmf); 1313 1314 if (res) { 1315 del_timer(&task->slow_task->timer); 1316 mv_printk("executing internal task failed:%d\n", res); 1317 goto ex_err; 1318 } 1319 1320 wait_for_completion(&task->slow_task->completion); 1321 res = TMF_RESP_FUNC_FAILED; 1322 /* Even TMF timed out, return direct. */ 1323 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) { 1324 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) { 1325 mv_printk("TMF task[%x] timeout.\n", tmf->tmf); 1326 goto ex_err; 1327 } 1328 } 1329 1330 if (task->task_status.resp == SAS_TASK_COMPLETE && 1331 task->task_status.stat == SAM_STAT_GOOD) { 1332 res = TMF_RESP_FUNC_COMPLETE; 1333 break; 1334 } 1335 1336 if (task->task_status.resp == SAS_TASK_COMPLETE && 1337 task->task_status.stat == SAS_DATA_UNDERRUN) { 1338 /* no error, but return the number of bytes of 1339 * underrun */ 1340 res = task->task_status.residual; 1341 break; 1342 } 1343 1344 if (task->task_status.resp == SAS_TASK_COMPLETE && 1345 task->task_status.stat == SAS_DATA_OVERRUN) { 1346 mv_dprintk("blocked task error.\n"); 1347 res = -EMSGSIZE; 1348 break; 1349 } else { 1350 mv_dprintk(" task to dev %016llx response: 0x%x " 1351 "status 0x%x\n", 1352 SAS_ADDR(dev->sas_addr), 1353 task->task_status.resp, 1354 task->task_status.stat); 1355 sas_free_task(task); 1356 task = NULL; 1357 1358 } 1359 } 1360ex_err: 1361 BUG_ON(retry == 3 && task != NULL); 1362 sas_free_task(task); 1363 return res; 1364} 1365 1366static int mvs_debug_issue_ssp_tmf(struct domain_device *dev, 1367 u8 *lun, struct mvs_tmf_task *tmf) 1368{ 1369 struct sas_ssp_task ssp_task; 1370 if (!(dev->tproto & SAS_PROTOCOL_SSP)) 1371 return TMF_RESP_FUNC_ESUPP; 1372 1373 memcpy(ssp_task.LUN, lun, 8); 1374 1375 return mvs_exec_internal_tmf_task(dev, &ssp_task, 1376 sizeof(ssp_task), tmf); 1377} 1378 1379 1380/* Standard mandates link reset for ATA (type 0) 1381 and hard reset for SSP (type 1) , only for RECOVERY */ 1382static int mvs_debug_I_T_nexus_reset(struct domain_device *dev) 1383{ 1384 int rc; 1385 struct sas_phy *phy = sas_get_local_phy(dev); 1386 int reset_type = (dev->dev_type == SAS_SATA_DEV || 1387 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1; 1388 rc = sas_phy_reset(phy, reset_type); 1389 sas_put_local_phy(phy); 1390 msleep(2000); 1391 return rc; 1392} 1393 1394/* mandatory SAM-3 */ 1395int mvs_lu_reset(struct domain_device *dev, u8 *lun) 1396{ 1397 unsigned long flags; 1398 int rc = TMF_RESP_FUNC_FAILED; 1399 struct mvs_tmf_task tmf_task; 1400 struct mvs_device * mvi_dev = dev->lldd_dev; 1401 struct mvs_info *mvi = mvi_dev->mvi_info; 1402 1403 tmf_task.tmf = TMF_LU_RESET; 1404 mvi_dev->dev_status = MVS_DEV_EH; 1405 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); 1406 if (rc == TMF_RESP_FUNC_COMPLETE) { 1407 spin_lock_irqsave(&mvi->lock, flags); 1408 mvs_release_task(mvi, dev); 1409 spin_unlock_irqrestore(&mvi->lock, flags); 1410 } 1411 /* If failed, fall-through I_T_Nexus reset */ 1412 mv_printk("%s for device[%x]:rc= %d\n", __func__, 1413 mvi_dev->device_id, rc); 1414 return rc; 1415} 1416 1417int mvs_I_T_nexus_reset(struct domain_device *dev) 1418{ 1419 unsigned long flags; 1420 int rc = TMF_RESP_FUNC_FAILED; 1421 struct mvs_device * mvi_dev = (struct mvs_device *)dev->lldd_dev; 1422 struct mvs_info *mvi = mvi_dev->mvi_info; 1423 1424 if (mvi_dev->dev_status != MVS_DEV_EH) 1425 return TMF_RESP_FUNC_COMPLETE; 1426 else 1427 mvi_dev->dev_status = MVS_DEV_NORMAL; 1428 rc = mvs_debug_I_T_nexus_reset(dev); 1429 mv_printk("%s for device[%x]:rc= %d\n", 1430 __func__, mvi_dev->device_id, rc); 1431 1432 spin_lock_irqsave(&mvi->lock, flags); 1433 mvs_release_task(mvi, dev); 1434 spin_unlock_irqrestore(&mvi->lock, flags); 1435 1436 return rc; 1437} 1438/* optional SAM-3 */ 1439int mvs_query_task(struct sas_task *task) 1440{ 1441 u32 tag; 1442 struct scsi_lun lun; 1443 struct mvs_tmf_task tmf_task; 1444 int rc = TMF_RESP_FUNC_FAILED; 1445 1446 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { 1447 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task; 1448 struct domain_device *dev = task->dev; 1449 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1450 struct mvs_info *mvi = mvi_dev->mvi_info; 1451 1452 int_to_scsilun(cmnd->device->lun, &lun); 1453 rc = mvs_find_tag(mvi, task, &tag); 1454 if (rc == 0) { 1455 rc = TMF_RESP_FUNC_FAILED; 1456 return rc; 1457 } 1458 1459 tmf_task.tmf = TMF_QUERY_TASK; 1460 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag); 1461 1462 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task); 1463 switch (rc) { 1464 /* The task is still in Lun, release it then */ 1465 case TMF_RESP_FUNC_SUCC: 1466 /* The task is not in Lun or failed, reset the phy */ 1467 case TMF_RESP_FUNC_FAILED: 1468 case TMF_RESP_FUNC_COMPLETE: 1469 break; 1470 } 1471 } 1472 mv_printk("%s:rc= %d\n", __func__, rc); 1473 return rc; 1474} 1475 1476/* mandatory SAM-3, still need free task/slot info */ 1477int mvs_abort_task(struct sas_task *task) 1478{ 1479 struct scsi_lun lun; 1480 struct mvs_tmf_task tmf_task; 1481 struct domain_device *dev = task->dev; 1482 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev; 1483 struct mvs_info *mvi; 1484 int rc = TMF_RESP_FUNC_FAILED; 1485 unsigned long flags; 1486 u32 tag; 1487 1488 if (!mvi_dev) { 1489 mv_printk("Device has removed\n"); 1490 return TMF_RESP_FUNC_FAILED; 1491 } 1492 1493 mvi = mvi_dev->mvi_info; 1494 1495 spin_lock_irqsave(&task->task_state_lock, flags); 1496 if (task->task_state_flags & SAS_TASK_STATE_DONE) { 1497 spin_unlock_irqrestore(&task->task_state_lock, flags); 1498 rc = TMF_RESP_FUNC_COMPLETE; 1499 goto out; 1500 } 1501 spin_unlock_irqrestore(&task->task_state_lock, flags); 1502 mvi_dev->dev_status = MVS_DEV_EH; 1503 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) { 1504 struct scsi_cmnd * cmnd = (struct scsi_cmnd *)task->uldd_task; 1505 1506 int_to_scsilun(cmnd->device->lun, &lun); 1507 rc = mvs_find_tag(mvi, task, &tag); 1508 if (rc == 0) { 1509 mv_printk("No such tag in %s\n", __func__); 1510 rc = TMF_RESP_FUNC_FAILED; 1511 return rc; 1512 } 1513 1514 tmf_task.tmf = TMF_ABORT_TASK; 1515 tmf_task.tag_of_task_to_be_managed = cpu_to_le16(tag); 1516 1517 rc = mvs_debug_issue_ssp_tmf(dev, lun.scsi_lun, &tmf_task); 1518 1519 /* if successful, clear the task and callback forwards.*/ 1520 if (rc == TMF_RESP_FUNC_COMPLETE) { 1521 u32 slot_no; 1522 struct mvs_slot_info *slot; 1523 1524 if (task->lldd_task) { 1525 slot = task->lldd_task; 1526 slot_no = (u32) (slot - mvi->slot_info); 1527 spin_lock_irqsave(&mvi->lock, flags); 1528 mvs_slot_complete(mvi, slot_no, 1); 1529 spin_unlock_irqrestore(&mvi->lock, flags); 1530 } 1531 } 1532 1533 } else if (task->task_proto & SAS_PROTOCOL_SATA || 1534 task->task_proto & SAS_PROTOCOL_STP) { 1535 if (SAS_SATA_DEV == dev->dev_type) { 1536 struct mvs_slot_info *slot = task->lldd_task; 1537 u32 slot_idx = (u32)(slot - mvi->slot_info); 1538 mv_dprintk("mvs_abort_task() mvi=%p task=%p " 1539 "slot=%p slot_idx=x%x\n", 1540 mvi, task, slot, slot_idx); 1541 task->task_state_flags |= SAS_TASK_STATE_ABORTED; 1542 mvs_slot_task_free(mvi, task, slot, slot_idx); 1543 rc = TMF_RESP_FUNC_COMPLETE; 1544 goto out; 1545 } 1546 1547 } 1548out: 1549 if (rc != TMF_RESP_FUNC_COMPLETE) 1550 mv_printk("%s:rc= %d\n", __func__, rc); 1551 return rc; 1552} 1553 1554int mvs_abort_task_set(struct domain_device *dev, u8 *lun) 1555{ 1556 int rc = TMF_RESP_FUNC_FAILED; 1557 struct mvs_tmf_task tmf_task; 1558 1559 tmf_task.tmf = TMF_ABORT_TASK_SET; 1560 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); 1561 1562 return rc; 1563} 1564 1565int mvs_clear_aca(struct domain_device *dev, u8 *lun) 1566{ 1567 int rc = TMF_RESP_FUNC_FAILED; 1568 struct mvs_tmf_task tmf_task; 1569 1570 tmf_task.tmf = TMF_CLEAR_ACA; 1571 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); 1572 1573 return rc; 1574} 1575 1576int mvs_clear_task_set(struct domain_device *dev, u8 *lun) 1577{ 1578 int rc = TMF_RESP_FUNC_FAILED; 1579 struct mvs_tmf_task tmf_task; 1580 1581 tmf_task.tmf = TMF_CLEAR_TASK_SET; 1582 rc = mvs_debug_issue_ssp_tmf(dev, lun, &tmf_task); 1583 1584 return rc; 1585} 1586 1587static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task, 1588 u32 slot_idx, int err) 1589{ 1590 struct mvs_device *mvi_dev = task->dev->lldd_dev; 1591 struct task_status_struct *tstat = &task->task_status; 1592 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf; 1593 int stat = SAM_STAT_GOOD; 1594 1595 1596 resp->frame_len = sizeof(struct dev_to_host_fis); 1597 memcpy(&resp->ending_fis[0], 1598 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset), 1599 sizeof(struct dev_to_host_fis)); 1600 tstat->buf_valid_size = sizeof(*resp); 1601 if (unlikely(err)) { 1602 if (unlikely(err & CMD_ISS_STPD)) 1603 stat = SAS_OPEN_REJECT; 1604 else 1605 stat = SAS_PROTO_RESPONSE; 1606 } 1607 1608 return stat; 1609} 1610 1611void mvs_set_sense(u8 *buffer, int len, int d_sense, 1612 int key, int asc, int ascq) 1613{ 1614 memset(buffer, 0, len); 1615 1616 if (d_sense) { 1617 /* Descriptor format */ 1618 if (len < 4) { 1619 mv_printk("Length %d of sense buffer too small to " 1620 "fit sense %x:%x:%x", len, key, asc, ascq); 1621 } 1622 1623 buffer[0] = 0x72; /* Response Code */ 1624 if (len > 1) 1625 buffer[1] = key; /* Sense Key */ 1626 if (len > 2) 1627 buffer[2] = asc; /* ASC */ 1628 if (len > 3) 1629 buffer[3] = ascq; /* ASCQ */ 1630 } else { 1631 if (len < 14) { 1632 mv_printk("Length %d of sense buffer too small to " 1633 "fit sense %x:%x:%x", len, key, asc, ascq); 1634 } 1635 1636 buffer[0] = 0x70; /* Response Code */ 1637 if (len > 2) 1638 buffer[2] = key; /* Sense Key */ 1639 if (len > 7) 1640 buffer[7] = 0x0a; /* Additional Sense Length */ 1641 if (len > 12) 1642 buffer[12] = asc; /* ASC */ 1643 if (len > 13) 1644 buffer[13] = ascq; /* ASCQ */ 1645 } 1646 1647 return; 1648} 1649 1650void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu, 1651 u8 key, u8 asc, u8 asc_q) 1652{ 1653 iu->datapres = 2; 1654 iu->response_data_len = 0; 1655 iu->sense_data_len = 17; 1656 iu->status = 02; 1657 mvs_set_sense(iu->sense_data, 17, 0, 1658 key, asc, asc_q); 1659} 1660 1661static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task, 1662 u32 slot_idx) 1663{ 1664 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; 1665 int stat; 1666 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response); 1667 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1)); 1668 u32 tfs = 0; 1669 enum mvs_port_type type = PORT_TYPE_SAS; 1670 1671 if (err_dw0 & CMD_ISS_STPD) 1672 MVS_CHIP_DISP->issue_stop(mvi, type, tfs); 1673 1674 MVS_CHIP_DISP->command_active(mvi, slot_idx); 1675 1676 stat = SAM_STAT_CHECK_CONDITION; 1677 switch (task->task_proto) { 1678 case SAS_PROTOCOL_SSP: 1679 { 1680 stat = SAS_ABORTED_TASK; 1681 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) { 1682 struct ssp_response_iu *iu = slot->response + 1683 sizeof(struct mvs_err_info); 1684 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01); 1685 sas_ssp_task_response(mvi->dev, task, iu); 1686 stat = SAM_STAT_CHECK_CONDITION; 1687 } 1688 if (err_dw1 & bit(31)) 1689 mv_printk("reuse same slot, retry command.\n"); 1690 break; 1691 } 1692 case SAS_PROTOCOL_SMP: 1693 stat = SAM_STAT_CHECK_CONDITION; 1694 break; 1695 1696 case SAS_PROTOCOL_SATA: 1697 case SAS_PROTOCOL_STP: 1698 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: 1699 { 1700 task->ata_task.use_ncq = 0; 1701 stat = SAS_PROTO_RESPONSE; 1702 mvs_sata_done(mvi, task, slot_idx, err_dw0); 1703 } 1704 break; 1705 default: 1706 break; 1707 } 1708 1709 return stat; 1710} 1711 1712int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags) 1713{ 1714 u32 slot_idx = rx_desc & RXQ_SLOT_MASK; 1715 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx]; 1716 struct sas_task *task = slot->task; 1717 struct mvs_device *mvi_dev = NULL; 1718 struct task_status_struct *tstat; 1719 struct domain_device *dev; 1720 u32 aborted; 1721 1722 void *to; 1723 enum exec_status sts; 1724 1725 if (unlikely(!task || !task->lldd_task || !task->dev)) 1726 return -1; 1727 1728 tstat = &task->task_status; 1729 dev = task->dev; 1730 mvi_dev = dev->lldd_dev; 1731 1732 spin_lock(&task->task_state_lock); 1733 task->task_state_flags &= 1734 ~(SAS_TASK_STATE_PENDING | SAS_TASK_AT_INITIATOR); 1735 task->task_state_flags |= SAS_TASK_STATE_DONE; 1736 /* race condition*/ 1737 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED; 1738 spin_unlock(&task->task_state_lock); 1739 1740 memset(tstat, 0, sizeof(*tstat)); 1741 tstat->resp = SAS_TASK_COMPLETE; 1742 1743 if (unlikely(aborted)) { 1744 tstat->stat = SAS_ABORTED_TASK; 1745 if (mvi_dev && mvi_dev->running_req) 1746 mvi_dev->running_req--; 1747 if (sas_protocol_ata(task->task_proto)) 1748 mvs_free_reg_set(mvi, mvi_dev); 1749 1750 mvs_slot_task_free(mvi, task, slot, slot_idx); 1751 return -1; 1752 } 1753 1754 /* when no device attaching, go ahead and complete by error handling*/ 1755 if (unlikely(!mvi_dev || flags)) { 1756 if (!mvi_dev) 1757 mv_dprintk("port has not device.\n"); 1758 tstat->stat = SAS_PHY_DOWN; 1759 goto out; 1760 } 1761 1762 /* 1763 * error info record present; slot->response is 32 bit aligned but may 1764 * not be 64 bit aligned, so check for zero in two 32 bit reads 1765 */ 1766 if (unlikely((rx_desc & RXQ_ERR) 1767 && (*((u32 *)slot->response) 1768 || *(((u32 *)slot->response) + 1)))) { 1769 mv_dprintk("port %d slot %d rx_desc %X has error info" 1770 "%016llX.\n", slot->port->sas_port.id, slot_idx, 1771 rx_desc, get_unaligned_le64(slot->response)); 1772 tstat->stat = mvs_slot_err(mvi, task, slot_idx); 1773 tstat->resp = SAS_TASK_COMPLETE; 1774 goto out; 1775 } 1776 1777 switch (task->task_proto) { 1778 case SAS_PROTOCOL_SSP: 1779 /* hw says status == 0, datapres == 0 */ 1780 if (rx_desc & RXQ_GOOD) { 1781 tstat->stat = SAM_STAT_GOOD; 1782 tstat->resp = SAS_TASK_COMPLETE; 1783 } 1784 /* response frame present */ 1785 else if (rx_desc & RXQ_RSP) { 1786 struct ssp_response_iu *iu = slot->response + 1787 sizeof(struct mvs_err_info); 1788 sas_ssp_task_response(mvi->dev, task, iu); 1789 } else 1790 tstat->stat = SAM_STAT_CHECK_CONDITION; 1791 break; 1792 1793 case SAS_PROTOCOL_SMP: { 1794 struct scatterlist *sg_resp = &task->smp_task.smp_resp; 1795 tstat->stat = SAM_STAT_GOOD; 1796 to = kmap_atomic(sg_page(sg_resp)); 1797 memcpy(to + sg_resp->offset, 1798 slot->response + sizeof(struct mvs_err_info), 1799 sg_dma_len(sg_resp)); 1800 kunmap_atomic(to); 1801 break; 1802 } 1803 1804 case SAS_PROTOCOL_SATA: 1805 case SAS_PROTOCOL_STP: 1806 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: { 1807 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0); 1808 break; 1809 } 1810 1811 default: 1812 tstat->stat = SAM_STAT_CHECK_CONDITION; 1813 break; 1814 } 1815 if (!slot->port->port_attached) { 1816 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id); 1817 tstat->stat = SAS_PHY_DOWN; 1818 } 1819 1820 1821out: 1822 if (mvi_dev && mvi_dev->running_req) { 1823 mvi_dev->running_req--; 1824 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req) 1825 mvs_free_reg_set(mvi, mvi_dev); 1826 } 1827 mvs_slot_task_free(mvi, task, slot, slot_idx); 1828 sts = tstat->stat; 1829 1830 spin_unlock(&mvi->lock); 1831 if (task->task_done) 1832 task->task_done(task); 1833 1834 spin_lock(&mvi->lock); 1835 1836 return sts; 1837} 1838 1839void mvs_do_release_task(struct mvs_info *mvi, 1840 int phy_no, struct domain_device *dev) 1841{ 1842 u32 slot_idx; 1843 struct mvs_phy *phy; 1844 struct mvs_port *port; 1845 struct mvs_slot_info *slot, *slot2; 1846 1847 phy = &mvi->phy[phy_no]; 1848 port = phy->port; 1849 if (!port) 1850 return; 1851 /* clean cmpl queue in case request is already finished */ 1852 mvs_int_rx(mvi, false); 1853 1854 1855 1856 list_for_each_entry_safe(slot, slot2, &port->list, entry) { 1857 struct sas_task *task; 1858 slot_idx = (u32) (slot - mvi->slot_info); 1859 task = slot->task; 1860 1861 if (dev && task->dev != dev) 1862 continue; 1863 1864 mv_printk("Release slot [%x] tag[%x], task [%p]:\n", 1865 slot_idx, slot->slot_tag, task); 1866 MVS_CHIP_DISP->command_active(mvi, slot_idx); 1867 1868 mvs_slot_complete(mvi, slot_idx, 1); 1869 } 1870} 1871 1872void mvs_release_task(struct mvs_info *mvi, 1873 struct domain_device *dev) 1874{ 1875 int i, phyno[WIDE_PORT_MAX_PHY], num; 1876 num = mvs_find_dev_phyno(dev, phyno); 1877 for (i = 0; i < num; i++) 1878 mvs_do_release_task(mvi, phyno[i], dev); 1879} 1880 1881static void mvs_phy_disconnected(struct mvs_phy *phy) 1882{ 1883 phy->phy_attached = 0; 1884 phy->att_dev_info = 0; 1885 phy->att_dev_sas_addr = 0; 1886} 1887 1888static void mvs_work_queue(struct work_struct *work) 1889{ 1890 struct delayed_work *dw = container_of(work, struct delayed_work, work); 1891 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q); 1892 struct mvs_info *mvi = mwq->mvi; 1893 unsigned long flags; 1894 u32 phy_no = (unsigned long) mwq->data; 1895 struct sas_ha_struct *sas_ha = mvi->sas; 1896 struct mvs_phy *phy = &mvi->phy[phy_no]; 1897 struct asd_sas_phy *sas_phy = &phy->sas_phy; 1898 1899 spin_lock_irqsave(&mvi->lock, flags); 1900 if (mwq->handler & PHY_PLUG_EVENT) { 1901 1902 if (phy->phy_event & PHY_PLUG_OUT) { 1903 u32 tmp; 1904 struct sas_identify_frame *id; 1905 id = (struct sas_identify_frame *)phy->frame_rcvd; 1906 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no); 1907 phy->phy_event &= ~PHY_PLUG_OUT; 1908 if (!(tmp & PHY_READY_MASK)) { 1909 sas_phy_disconnected(sas_phy); 1910 mvs_phy_disconnected(phy); 1911 sas_ha->notify_phy_event(sas_phy, 1912 PHYE_LOSS_OF_SIGNAL); 1913 mv_dprintk("phy%d Removed Device\n", phy_no); 1914 } else { 1915 MVS_CHIP_DISP->detect_porttype(mvi, phy_no); 1916 mvs_update_phyinfo(mvi, phy_no, 1); 1917 mvs_bytes_dmaed(mvi, phy_no); 1918 mvs_port_notify_formed(sas_phy, 0); 1919 mv_dprintk("phy%d Attached Device\n", phy_no); 1920 } 1921 } 1922 } else if (mwq->handler & EXP_BRCT_CHG) { 1923 phy->phy_event &= ~EXP_BRCT_CHG; 1924 sas_ha->notify_port_event(sas_phy, 1925 PORTE_BROADCAST_RCVD); 1926 mv_dprintk("phy%d Got Broadcast Change\n", phy_no); 1927 } 1928 list_del(&mwq->entry); 1929 spin_unlock_irqrestore(&mvi->lock, flags); 1930 kfree(mwq); 1931} 1932 1933static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler) 1934{ 1935 struct mvs_wq *mwq; 1936 int ret = 0; 1937 1938 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC); 1939 if (mwq) { 1940 mwq->mvi = mvi; 1941 mwq->data = data; 1942 mwq->handler = handler; 1943 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq); 1944 list_add_tail(&mwq->entry, &mvi->wq_list); 1945 schedule_delayed_work(&mwq->work_q, HZ * 2); 1946 } else 1947 ret = -ENOMEM; 1948 1949 return ret; 1950} 1951 1952static void mvs_sig_time_out(unsigned long tphy) 1953{ 1954 struct mvs_phy *phy = (struct mvs_phy *)tphy; 1955 struct mvs_info *mvi = phy->mvi; 1956 u8 phy_no; 1957 1958 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) { 1959 if (&mvi->phy[phy_no] == phy) { 1960 mv_dprintk("Get signature time out, reset phy %d\n", 1961 phy_no+mvi->id*mvi->chip->n_phy); 1962 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET); 1963 } 1964 } 1965} 1966 1967void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events) 1968{ 1969 u32 tmp; 1970 struct mvs_phy *phy = &mvi->phy[phy_no]; 1971 1972 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no); 1973 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status); 1974 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy, 1975 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no)); 1976 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy, 1977 phy->irq_status); 1978 1979 /* 1980 * events is port event now , 1981 * we need check the interrupt status which belongs to per port. 1982 */ 1983 1984 if (phy->irq_status & PHYEV_DCDR_ERR) { 1985 mv_dprintk("phy %d STP decoding error.\n", 1986 phy_no + mvi->id*mvi->chip->n_phy); 1987 } 1988 1989 if (phy->irq_status & PHYEV_POOF) { 1990 mdelay(500); 1991 if (!(phy->phy_event & PHY_PLUG_OUT)) { 1992 int dev_sata = phy->phy_type & PORT_TYPE_SATA; 1993 int ready; 1994 mvs_do_release_task(mvi, phy_no, NULL); 1995 phy->phy_event |= PHY_PLUG_OUT; 1996 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1); 1997 mvs_handle_event(mvi, 1998 (void *)(unsigned long)phy_no, 1999 PHY_PLUG_EVENT); 2000 ready = mvs_is_phy_ready(mvi, phy_no); 2001 if (ready || dev_sata) { 2002 if (MVS_CHIP_DISP->stp_reset) 2003 MVS_CHIP_DISP->stp_reset(mvi, 2004 phy_no); 2005 else 2006 MVS_CHIP_DISP->phy_reset(mvi, 2007 phy_no, MVS_SOFT_RESET); 2008 return; 2009 } 2010 } 2011 } 2012 2013 if (phy->irq_status & PHYEV_COMWAKE) { 2014 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no); 2015 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no, 2016 tmp | PHYEV_SIG_FIS); 2017 if (phy->timer.function == NULL) { 2018 phy->timer.data = (unsigned long)phy; 2019 phy->timer.function = mvs_sig_time_out; 2020 phy->timer.expires = jiffies + 5*HZ; 2021 add_timer(&phy->timer); 2022 } 2023 } 2024 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) { 2025 phy->phy_status = mvs_is_phy_ready(mvi, phy_no); 2026 mv_dprintk("notify plug in on phy[%d]\n", phy_no); 2027 if (phy->phy_status) { 2028 mdelay(10); 2029 MVS_CHIP_DISP->detect_porttype(mvi, phy_no); 2030 if (phy->phy_type & PORT_TYPE_SATA) { 2031 tmp = MVS_CHIP_DISP->read_port_irq_mask( 2032 mvi, phy_no); 2033 tmp &= ~PHYEV_SIG_FIS; 2034 MVS_CHIP_DISP->write_port_irq_mask(mvi, 2035 phy_no, tmp); 2036 } 2037 mvs_update_phyinfo(mvi, phy_no, 0); 2038 if (phy->phy_type & PORT_TYPE_SAS) { 2039 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE); 2040 mdelay(10); 2041 } 2042 2043 mvs_bytes_dmaed(mvi, phy_no); 2044 /* whether driver is going to handle hot plug */ 2045 if (phy->phy_event & PHY_PLUG_OUT) { 2046 mvs_port_notify_formed(&phy->sas_phy, 0); 2047 phy->phy_event &= ~PHY_PLUG_OUT; 2048 } 2049 } else { 2050 mv_dprintk("plugin interrupt but phy%d is gone\n", 2051 phy_no + mvi->id*mvi->chip->n_phy); 2052 } 2053 } else if (phy->irq_status & PHYEV_BROAD_CH) { 2054 mv_dprintk("phy %d broadcast change.\n", 2055 phy_no + mvi->id*mvi->chip->n_phy); 2056 mvs_handle_event(mvi, (void *)(unsigned long)phy_no, 2057 EXP_BRCT_CHG); 2058 } 2059} 2060 2061int mvs_int_rx(struct mvs_info *mvi, bool self_clear) 2062{ 2063 u32 rx_prod_idx, rx_desc; 2064 bool attn = false; 2065 2066 /* the first dword in the RX ring is special: it contains 2067 * a mirror of the hardware's RX producer index, so that 2068 * we don't have to stall the CPU reading that register. 2069 * The actual RX ring is offset by one dword, due to this. 2070 */ 2071 rx_prod_idx = mvi->rx_cons; 2072 mvi->rx_cons = le32_to_cpu(mvi->rx[0]); 2073 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */ 2074 return 0; 2075 2076 /* The CMPL_Q may come late, read from register and try again 2077 * note: if coalescing is enabled, 2078 * it will need to read from register every time for sure 2079 */ 2080 if (unlikely(mvi->rx_cons == rx_prod_idx)) 2081 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK; 2082 2083 if (mvi->rx_cons == rx_prod_idx) 2084 return 0; 2085 2086 while (mvi->rx_cons != rx_prod_idx) { 2087 /* increment our internal RX consumer pointer */ 2088 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1); 2089 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]); 2090 2091 if (likely(rx_desc & RXQ_DONE)) 2092 mvs_slot_complete(mvi, rx_desc, 0); 2093 if (rx_desc & RXQ_ATTN) { 2094 attn = true; 2095 } else if (rx_desc & RXQ_ERR) { 2096 if (!(rx_desc & RXQ_DONE)) 2097 mvs_slot_complete(mvi, rx_desc, 0); 2098 } else if (rx_desc & RXQ_SLOT_RESET) { 2099 mvs_slot_free(mvi, rx_desc); 2100 } 2101 } 2102 2103 if (attn && self_clear) 2104 MVS_CHIP_DISP->int_full(mvi); 2105 return 0; 2106} 2107 2108