1 /*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef ATH9K_H
18 #define ATH9K_H
19
20 #include <linux/etherdevice.h>
21 #include <linux/device.h>
22 #include <linux/interrupt.h>
23 #include <linux/leds.h>
24 #include <linux/completion.h>
25 #include <linux/time.h>
26
27 #include "common.h"
28 #include "debug.h"
29 #include "mci.h"
30 #include "dfs.h"
31
32 struct ath_node;
33 struct ath_vif;
34
35 extern struct ieee80211_ops ath9k_ops;
36 extern int ath9k_modparam_nohwcrypt;
37 extern int ath9k_led_blink;
38 extern bool is_ath9k_unloaded;
39 extern int ath9k_use_chanctx;
40
41 /*************************/
42 /* Descriptor Management */
43 /*************************/
44
45 #define ATH_TXSTATUS_RING_SIZE 512
46
47 /* Macro to expand scalars to 64-bit objects */
48 #define ito64(x) (sizeof(x) == 1) ? \
49 (((unsigned long long int)(x)) & (0xff)) : \
50 (sizeof(x) == 2) ? \
51 (((unsigned long long int)(x)) & 0xffff) : \
52 ((sizeof(x) == 4) ? \
53 (((unsigned long long int)(x)) & 0xffffffff) : \
54 (unsigned long long int)(x))
55
56 #define ATH_TXBUF_RESET(_bf) do { \
57 (_bf)->bf_lastbf = NULL; \
58 (_bf)->bf_next = NULL; \
59 memset(&((_bf)->bf_state), 0, \
60 sizeof(struct ath_buf_state)); \
61 } while (0)
62
63 #define DS2PHYS(_dd, _ds) \
64 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
65 #define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
66 #define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
67
68 struct ath_descdma {
69 void *dd_desc;
70 dma_addr_t dd_desc_paddr;
71 u32 dd_desc_len;
72 };
73
74 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
75 struct list_head *head, const char *name,
76 int nbuf, int ndesc, bool is_tx);
77
78 /***********/
79 /* RX / TX */
80 /***********/
81
82 #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
83
84 /* increment with wrap-around */
85 #define INCR(_l, _sz) do { \
86 (_l)++; \
87 (_l) &= ((_sz) - 1); \
88 } while (0)
89
90 #define ATH_RXBUF 512
91 #define ATH_TXBUF 512
92 #define ATH_TXBUF_RESERVE 5
93 #define ATH_MAX_QDEPTH (ATH_TXBUF / 4 - ATH_TXBUF_RESERVE)
94 #define ATH_TXMAXTRY 13
95 #define ATH_MAX_SW_RETRIES 30
96
97 #define TID_TO_WME_AC(_tid) \
98 ((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE : \
99 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK : \
100 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI : \
101 IEEE80211_AC_VO)
102
103 #define ATH_AGGR_DELIM_SZ 4
104 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
105 /* number of delimiters for encryption padding */
106 #define ATH_AGGR_ENCRYPTDELIM 10
107 /* minimum h/w qdepth to be sustained to maximize aggregation */
108 #define ATH_AGGR_MIN_QDEPTH 2
109 /* minimum h/w qdepth for non-aggregated traffic */
110 #define ATH_NON_AGGR_MIN_QDEPTH 8
111 #define ATH_TX_COMPLETE_POLL_INT 1000
112 #define ATH_TXFIFO_DEPTH 8
113 #define ATH_TX_ERROR 0x01
114
115 /* Stop tx traffic 1ms before the GO goes away */
116 #define ATH_P2P_PS_STOP_TIME 1000
117
118 #define IEEE80211_SEQ_SEQ_SHIFT 4
119 #define IEEE80211_SEQ_MAX 4096
120 #define IEEE80211_WEP_IVLEN 3
121 #define IEEE80211_WEP_KIDLEN 1
122 #define IEEE80211_WEP_CRCLEN 4
123 #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \
124 (IEEE80211_WEP_IVLEN + \
125 IEEE80211_WEP_KIDLEN + \
126 IEEE80211_WEP_CRCLEN))
127
128 /* return whether a bit at index _n in bitmap _bm is set
129 * _sz is the size of the bitmap */
130 #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \
131 ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
132
133 /* return block-ack bitmap index given sequence and starting sequence */
134 #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1))
135
136 /* return the seqno for _start + _offset */
137 #define ATH_BA_INDEX2SEQ(_seq, _offset) (((_seq) + (_offset)) & (IEEE80211_SEQ_MAX - 1))
138
139 /* returns delimiter padding required given the packet length */
140 #define ATH_AGGR_GET_NDELIM(_len) \
141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
143
144 #define BAW_WITHIN(_start, _bawsz, _seqno) \
145 ((((_seqno) - (_start)) & 4095) < (_bawsz))
146
147 #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
148
149 #define IS_HT_RATE(rate) (rate & 0x80)
150 #define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
151 #define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
152
153 enum {
154 WLAN_RC_PHY_OFDM,
155 WLAN_RC_PHY_CCK,
156 };
157
158 struct ath_txq {
159 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
160 u32 axq_qnum; /* ath9k hardware queue number */
161 void *axq_link;
162 struct list_head axq_q;
163 spinlock_t axq_lock;
164 u32 axq_depth;
165 u32 axq_ampdu_depth;
166 bool stopped;
167 bool axq_tx_inprogress;
168 struct list_head txq_fifo[ATH_TXFIFO_DEPTH];
169 u8 txq_headidx;
170 u8 txq_tailidx;
171 int pending_frames;
172 struct sk_buff_head complete_q;
173 };
174
175 struct ath_frame_info {
176 struct ath_buf *bf;
177 u16 framelen;
178 s8 txq;
179 u8 keyix;
180 u8 rtscts_rate;
181 u8 retries : 7;
182 u8 baw_tracked : 1;
183 u8 tx_power;
184 enum ath9k_key_type keytype:2;
185 };
186
187 struct ath_rxbuf {
188 struct list_head list;
189 struct sk_buff *bf_mpdu;
190 void *bf_desc;
191 dma_addr_t bf_daddr;
192 dma_addr_t bf_buf_addr;
193 };
194
195 /**
196 * enum buffer_type - Buffer type flags
197 *
198 * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
199 * @BUF_AGGR: Indicates whether the buffer can be aggregated
200 * (used in aggregation scheduling)
201 */
202 enum buffer_type {
203 BUF_AMPDU = BIT(0),
204 BUF_AGGR = BIT(1),
205 };
206
207 #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
208 #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
209
210 struct ath_buf_state {
211 u8 bf_type;
212 u8 bfs_paprd;
213 u8 ndelim;
214 bool stale;
215 u16 seqno;
216 unsigned long bfs_paprd_timestamp;
217 };
218
219 struct ath_buf {
220 struct list_head list;
221 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
222 an aggregate) */
223 struct ath_buf *bf_next; /* next subframe in the aggregate */
224 struct sk_buff *bf_mpdu; /* enclosing frame structure */
225 void *bf_desc; /* virtual addr of desc */
226 dma_addr_t bf_daddr; /* physical addr of desc */
227 dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
228 struct ieee80211_tx_rate rates[4];
229 struct ath_buf_state bf_state;
230 };
231
232 struct ath_atx_tid {
233 struct list_head list;
234 struct sk_buff_head buf_q;
235 struct sk_buff_head retry_q;
236 struct ath_node *an;
237 struct ath_txq *txq;
238 unsigned long tx_buf[BITS_TO_LONGS(ATH_TID_MAX_BUFS)];
239 u16 seq_start;
240 u16 seq_next;
241 u16 baw_size;
242 u8 tidno;
243 int baw_head; /* first un-acked tx buffer */
244 int baw_tail; /* next unused tx buffer slot */
245
246 s8 bar_index;
247 bool active;
248 bool clear_ps_filter;
249 };
250
251 struct ath_node {
252 struct ath_softc *sc;
253 struct ieee80211_sta *sta; /* station struct we're part of */
254 struct ieee80211_vif *vif; /* interface with which we're associated */
255 struct ath_atx_tid tid[IEEE80211_NUM_TIDS];
256
257 u16 maxampdu;
258 u8 mpdudensity;
259 s8 ps_key;
260
261 bool sleeping;
262 bool no_ps_filter;
263
264 #ifdef CONFIG_ATH9K_STATION_STATISTICS
265 struct ath_rx_rate_stats rx_rate_stats;
266 #endif
267 u8 key_idx[4];
268
269 u32 ackto;
270 struct list_head list;
271 };
272
273 struct ath_tx_control {
274 struct ath_txq *txq;
275 struct ath_node *an;
276 struct ieee80211_sta *sta;
277 u8 paprd;
278 bool force_channel;
279 };
280
281
282 /**
283 * @txq_map: Index is mac80211 queue number. This is
284 * not necessarily the same as the hardware queue number
285 * (axq_qnum).
286 */
287 struct ath_tx {
288 u32 txqsetup;
289 spinlock_t txbuflock;
290 struct list_head txbuf;
291 struct ath_txq txq[ATH9K_NUM_TX_QUEUES];
292 struct ath_descdma txdma;
293 struct ath_txq *txq_map[IEEE80211_NUM_ACS];
294 struct ath_txq *uapsdq;
295 u32 txq_max_pending[IEEE80211_NUM_ACS];
296 u16 max_aggr_framelen[IEEE80211_NUM_ACS][4][32];
297 };
298
299 struct ath_rx_edma {
300 struct sk_buff_head rx_fifo;
301 u32 rx_fifo_hwsize;
302 };
303
304 struct ath_rx {
305 u8 defant;
306 u8 rxotherant;
307 bool discard_next;
308 u32 *rxlink;
309 u32 num_pkts;
310 struct list_head rxbuf;
311 struct ath_descdma rxdma;
312 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
313
314 struct ath_rxbuf *buf_hold;
315 struct sk_buff *frag;
316
317 u32 ampdu_ref;
318 };
319
320 /*******************/
321 /* Channel Context */
322 /*******************/
323
324 struct ath_chanctx {
325 struct cfg80211_chan_def chandef;
326 struct list_head vifs;
327 struct list_head acq[IEEE80211_NUM_ACS];
328 int hw_queue_base;
329
330 /* do not dereference, use for comparison only */
331 struct ieee80211_vif *primary_sta;
332
333 struct ath_beacon_config beacon;
334 struct ath9k_hw_cal_data caldata;
335 struct timespec tsf_ts;
336 u64 tsf_val;
337 u32 last_beacon;
338
339 int flush_timeout;
340 u16 txpower;
341 u16 cur_txpower;
342 bool offchannel;
343 bool stopped;
344 bool active;
345 bool assigned;
346 bool switch_after_beacon;
347
348 short nvifs;
349 short nvifs_assigned;
350 unsigned int rxfilter;
351 };
352
353 enum ath_chanctx_event {
354 ATH_CHANCTX_EVENT_BEACON_PREPARE,
355 ATH_CHANCTX_EVENT_BEACON_SENT,
356 ATH_CHANCTX_EVENT_TSF_TIMER,
357 ATH_CHANCTX_EVENT_BEACON_RECEIVED,
358 ATH_CHANCTX_EVENT_AUTHORIZED,
359 ATH_CHANCTX_EVENT_SWITCH,
360 ATH_CHANCTX_EVENT_ASSIGN,
361 ATH_CHANCTX_EVENT_UNASSIGN,
362 ATH_CHANCTX_EVENT_CHANGE,
363 ATH_CHANCTX_EVENT_ENABLE_MULTICHANNEL,
364 };
365
366 enum ath_chanctx_state {
367 ATH_CHANCTX_STATE_IDLE,
368 ATH_CHANCTX_STATE_WAIT_FOR_BEACON,
369 ATH_CHANCTX_STATE_WAIT_FOR_TIMER,
370 ATH_CHANCTX_STATE_SWITCH,
371 ATH_CHANCTX_STATE_FORCE_ACTIVE,
372 };
373
374 struct ath_chanctx_sched {
375 bool beacon_pending;
376 bool beacon_adjust;
377 bool offchannel_pending;
378 bool wait_switch;
379 bool force_noa_update;
380 bool extend_absence;
381 bool mgd_prepare_tx;
382 enum ath_chanctx_state state;
383 u8 beacon_miss;
384
385 u32 next_tbtt;
386 u32 switch_start_time;
387 unsigned int offchannel_duration;
388 unsigned int channel_switch_time;
389
390 /* backup, in case the hardware timer fails */
391 struct timer_list timer;
392 };
393
394 enum ath_offchannel_state {
395 ATH_OFFCHANNEL_IDLE,
396 ATH_OFFCHANNEL_PROBE_SEND,
397 ATH_OFFCHANNEL_PROBE_WAIT,
398 ATH_OFFCHANNEL_SUSPEND,
399 ATH_OFFCHANNEL_ROC_START,
400 ATH_OFFCHANNEL_ROC_WAIT,
401 ATH_OFFCHANNEL_ROC_DONE,
402 };
403
404 enum ath_roc_complete_reason {
405 ATH_ROC_COMPLETE_EXPIRE,
406 ATH_ROC_COMPLETE_ABORT,
407 ATH_ROC_COMPLETE_CANCEL,
408 };
409
410 struct ath_offchannel {
411 struct ath_chanctx chan;
412 struct timer_list timer;
413 struct cfg80211_scan_request *scan_req;
414 struct ieee80211_vif *scan_vif;
415 int scan_idx;
416 enum ath_offchannel_state state;
417 struct ieee80211_channel *roc_chan;
418 struct ieee80211_vif *roc_vif;
419 int roc_duration;
420 int duration;
421 };
422
423 #define case_rtn_string(val) case val: return #val
424
425 #define ath_for_each_chanctx(_sc, _ctx) \
426 for (ctx = &sc->chanctx[0]; \
427 ctx <= &sc->chanctx[ARRAY_SIZE(sc->chanctx) - 1]; \
428 ctx++)
429
430 void ath_chanctx_init(struct ath_softc *sc);
431 void ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
432 struct cfg80211_chan_def *chandef);
433
434 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
435
436 static inline struct ath_chanctx *
ath_chanctx_get(struct ieee80211_chanctx_conf * ctx)437 ath_chanctx_get(struct ieee80211_chanctx_conf *ctx)
438 {
439 struct ath_chanctx **ptr = (void *) ctx->drv_priv;
440 return *ptr;
441 }
442
443 bool ath9k_is_chanctx_enabled(void);
444 void ath9k_fill_chanctx_ops(void);
445 void ath9k_init_channel_context(struct ath_softc *sc);
446 void ath9k_offchannel_init(struct ath_softc *sc);
447 void ath9k_deinit_channel_context(struct ath_softc *sc);
448 int ath9k_init_p2p(struct ath_softc *sc);
449 void ath9k_deinit_p2p(struct ath_softc *sc);
450 void ath9k_p2p_remove_vif(struct ath_softc *sc,
451 struct ieee80211_vif *vif);
452 void ath9k_p2p_beacon_sync(struct ath_softc *sc);
453 void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
454 struct ieee80211_vif *vif);
455 void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
456 struct sk_buff *skb);
457 void ath9k_p2p_ps_timer(void *priv);
458 void ath9k_chanctx_wake_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
459 void ath9k_chanctx_stop_queues(struct ath_softc *sc, struct ath_chanctx *ctx);
460 void ath_chanctx_check_active(struct ath_softc *sc, struct ath_chanctx *ctx);
461
462 void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
463 enum ath_chanctx_event ev);
464 void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
465 enum ath_chanctx_event ev);
466 void ath_chanctx_event(struct ath_softc *sc, struct ieee80211_vif *vif,
467 enum ath_chanctx_event ev);
468 void ath_chanctx_set_next(struct ath_softc *sc, bool force);
469 void ath_offchannel_next(struct ath_softc *sc);
470 void ath_scan_complete(struct ath_softc *sc, bool abort);
471 void ath_roc_complete(struct ath_softc *sc,
472 enum ath_roc_complete_reason reason);
473 struct ath_chanctx* ath_is_go_chanctx_present(struct ath_softc *sc);
474
475 #else
476
ath9k_is_chanctx_enabled(void)477 static inline bool ath9k_is_chanctx_enabled(void)
478 {
479 return false;
480 }
ath9k_fill_chanctx_ops(void)481 static inline void ath9k_fill_chanctx_ops(void)
482 {
483 }
ath9k_init_channel_context(struct ath_softc * sc)484 static inline void ath9k_init_channel_context(struct ath_softc *sc)
485 {
486 }
ath9k_offchannel_init(struct ath_softc * sc)487 static inline void ath9k_offchannel_init(struct ath_softc *sc)
488 {
489 }
ath9k_deinit_channel_context(struct ath_softc * sc)490 static inline void ath9k_deinit_channel_context(struct ath_softc *sc)
491 {
492 }
ath_chanctx_beacon_recv_ev(struct ath_softc * sc,enum ath_chanctx_event ev)493 static inline void ath_chanctx_beacon_recv_ev(struct ath_softc *sc,
494 enum ath_chanctx_event ev)
495 {
496 }
ath_chanctx_beacon_sent_ev(struct ath_softc * sc,enum ath_chanctx_event ev)497 static inline void ath_chanctx_beacon_sent_ev(struct ath_softc *sc,
498 enum ath_chanctx_event ev)
499 {
500 }
ath_chanctx_event(struct ath_softc * sc,struct ieee80211_vif * vif,enum ath_chanctx_event ev)501 static inline void ath_chanctx_event(struct ath_softc *sc,
502 struct ieee80211_vif *vif,
503 enum ath_chanctx_event ev)
504 {
505 }
ath9k_init_p2p(struct ath_softc * sc)506 static inline int ath9k_init_p2p(struct ath_softc *sc)
507 {
508 return 0;
509 }
ath9k_deinit_p2p(struct ath_softc * sc)510 static inline void ath9k_deinit_p2p(struct ath_softc *sc)
511 {
512 }
ath9k_p2p_remove_vif(struct ath_softc * sc,struct ieee80211_vif * vif)513 static inline void ath9k_p2p_remove_vif(struct ath_softc *sc,
514 struct ieee80211_vif *vif)
515 {
516 }
ath9k_p2p_beacon_sync(struct ath_softc * sc)517 static inline void ath9k_p2p_beacon_sync(struct ath_softc *sc)
518 {
519 }
ath9k_p2p_bss_info_changed(struct ath_softc * sc,struct ieee80211_vif * vif)520 static inline void ath9k_p2p_bss_info_changed(struct ath_softc *sc,
521 struct ieee80211_vif *vif)
522 {
523 }
ath9k_beacon_add_noa(struct ath_softc * sc,struct ath_vif * avp,struct sk_buff * skb)524 static inline void ath9k_beacon_add_noa(struct ath_softc *sc, struct ath_vif *avp,
525 struct sk_buff *skb)
526 {
527 }
ath9k_p2p_ps_timer(struct ath_softc * sc)528 static inline void ath9k_p2p_ps_timer(struct ath_softc *sc)
529 {
530 }
ath9k_chanctx_wake_queues(struct ath_softc * sc,struct ath_chanctx * ctx)531 static inline void ath9k_chanctx_wake_queues(struct ath_softc *sc,
532 struct ath_chanctx *ctx)
533 {
534 }
ath9k_chanctx_stop_queues(struct ath_softc * sc,struct ath_chanctx * ctx)535 static inline void ath9k_chanctx_stop_queues(struct ath_softc *sc,
536 struct ath_chanctx *ctx)
537 {
538 }
ath_chanctx_check_active(struct ath_softc * sc,struct ath_chanctx * ctx)539 static inline void ath_chanctx_check_active(struct ath_softc *sc,
540 struct ath_chanctx *ctx)
541 {
542 }
543
544 #endif /* CONFIG_ATH9K_CHANNEL_CONTEXT */
545
546 void ath_startrecv(struct ath_softc *sc);
547 bool ath_stoprecv(struct ath_softc *sc);
548 u32 ath_calcrxfilter(struct ath_softc *sc);
549 int ath_rx_init(struct ath_softc *sc, int nbufs);
550 void ath_rx_cleanup(struct ath_softc *sc);
551 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp);
552 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype);
553 void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
554 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
555 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
556 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
557 bool ath_drain_all_txq(struct ath_softc *sc);
558 void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
559 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
560 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
561 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
562 void ath_txq_schedule_all(struct ath_softc *sc);
563 int ath_tx_init(struct ath_softc *sc, int nbufs);
564 int ath_txq_update(struct ath_softc *sc, int qnum,
565 struct ath9k_tx_queue_info *q);
566 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
567 void ath_assign_seq(struct ath_common *common, struct sk_buff *skb);
568 int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
569 struct ath_tx_control *txctl);
570 void ath_tx_cabq(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
571 struct sk_buff *skb);
572 void ath_tx_tasklet(struct ath_softc *sc);
573 void ath_tx_edma_tasklet(struct ath_softc *sc);
574 int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
575 u16 tid, u16 *ssn);
576 void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
577 void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
578
579 void ath_tx_aggr_wakeup(struct ath_softc *sc, struct ath_node *an);
580 void ath_tx_aggr_sleep(struct ieee80211_sta *sta, struct ath_softc *sc,
581 struct ath_node *an);
582 void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
583 struct ieee80211_sta *sta,
584 u16 tids, int nframes,
585 enum ieee80211_frame_release_type reason,
586 bool more_data);
587
588 /********/
589 /* VIFs */
590 /********/
591
592 #define P2P_DEFAULT_CTWIN 10
593
594 struct ath_vif {
595 struct list_head list;
596
597 u16 seq_no;
598
599 /* BSS info */
600 u8 bssid[ETH_ALEN] __aligned(2);
601 u16 aid;
602 bool assoc;
603
604 struct ieee80211_vif *vif;
605 struct ath_node mcast_node;
606 int av_bslot;
607 __le64 tsf_adjust; /* TSF adjustment for staggered beacons */
608 struct ath_buf *av_bcbuf;
609 struct ath_chanctx *chanctx;
610
611 /* P2P Client */
612 struct ieee80211_noa_data noa;
613
614 /* P2P GO */
615 u8 noa_index;
616 u32 offchannel_start;
617 u32 offchannel_duration;
618
619 /* These are used for both periodic and one-shot */
620 u32 noa_start;
621 u32 noa_duration;
622 bool periodic_noa;
623 bool oneshot_noa;
624 };
625
626 struct ath9k_vif_iter_data {
627 u8 hw_macaddr[ETH_ALEN]; /* address of the first vif */
628 u8 mask[ETH_ALEN]; /* bssid mask */
629 bool has_hw_macaddr;
630 u8 slottime;
631 bool beacons;
632
633 int naps; /* number of AP vifs */
634 int nmeshes; /* number of mesh vifs */
635 int nstations; /* number of station vifs */
636 int nwds; /* number of WDS vifs */
637 int nadhocs; /* number of adhoc vifs */
638 int nocbs; /* number of OCB vifs */
639 struct ieee80211_vif *primary_sta;
640 };
641
642 void ath9k_calculate_iter_data(struct ath_softc *sc,
643 struct ath_chanctx *ctx,
644 struct ath9k_vif_iter_data *iter_data);
645 void ath9k_calculate_summary_state(struct ath_softc *sc,
646 struct ath_chanctx *ctx);
647 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif);
648
649 /*******************/
650 /* Beacon Handling */
651 /*******************/
652
653 /*
654 * Regardless of the number of beacons we stagger, (i.e. regardless of the
655 * number of BSSIDs) if a given beacon does not go out even after waiting this
656 * number of beacon intervals, the game's up.
657 */
658 #define BSTUCK_THRESH 9
659 #define ATH_BCBUF 8
660 #define ATH_DEFAULT_BINTVAL 100 /* TU */
661 #define ATH_DEFAULT_BMISS_LIMIT 10
662
663 #define TSF_TO_TU(_h,_l) \
664 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
665
666 struct ath_beacon {
667 enum {
668 OK, /* no change needed */
669 UPDATE, /* update pending */
670 COMMIT /* beacon sent, commit change */
671 } updateslot; /* slot time update fsm */
672
673 u32 beaconq;
674 u32 bmisscnt;
675 struct ieee80211_vif *bslot[ATH_BCBUF];
676 int slottime;
677 int slotupdate;
678 struct ath_descdma bdma;
679 struct ath_txq *cabq;
680 struct list_head bbuf;
681
682 bool tx_processed;
683 bool tx_last;
684 };
685
686 void ath9k_beacon_tasklet(unsigned long data);
687 void ath9k_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif,
688 u32 changed);
689 void ath9k_beacon_assign_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
690 void ath9k_beacon_remove_slot(struct ath_softc *sc, struct ieee80211_vif *vif);
691 void ath9k_set_beacon(struct ath_softc *sc);
692 bool ath9k_csa_is_finished(struct ath_softc *sc, struct ieee80211_vif *vif);
693 void ath9k_csa_update(struct ath_softc *sc);
694
695 /*******************/
696 /* Link Monitoring */
697 /*******************/
698
699 #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */
700 #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */
701 #define ATH_ANI_POLLINTERVAL_OLD 100 /* 100 ms */
702 #define ATH_ANI_POLLINTERVAL_NEW 1000 /* 1000 ms */
703 #define ATH_LONG_CALINTERVAL_INT 1000 /* 1000 ms */
704 #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
705 #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
706 #define ATH_ANI_MAX_SKIP_COUNT 10
707 #define ATH_PAPRD_TIMEOUT 100 /* msecs */
708 #define ATH_PLL_WORK_INTERVAL 100
709
710 void ath_tx_complete_poll_work(struct work_struct *work);
711 void ath_reset_work(struct work_struct *work);
712 bool ath_hw_check(struct ath_softc *sc);
713 void ath_hw_pll_work(struct work_struct *work);
714 void ath_paprd_calibrate(struct work_struct *work);
715 void ath_ani_calibrate(unsigned long data);
716 void ath_start_ani(struct ath_softc *sc);
717 void ath_stop_ani(struct ath_softc *sc);
718 void ath_check_ani(struct ath_softc *sc);
719 int ath_update_survey_stats(struct ath_softc *sc);
720 void ath_update_survey_nf(struct ath_softc *sc, int channel);
721 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
722 void ath_ps_full_sleep(unsigned long data);
723 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
724 bool sw_pending, bool timeout_override);
725
726 /**********/
727 /* BTCOEX */
728 /**********/
729
730 #define ATH_DUMP_BTCOEX(_s, _val) \
731 do { \
732 len += scnprintf(buf + len, size - len, \
733 "%20s : %10d\n", _s, (_val)); \
734 } while (0)
735
736 enum bt_op_flags {
737 BT_OP_PRIORITY_DETECTED,
738 BT_OP_SCAN,
739 };
740
741 struct ath_btcoex {
742 spinlock_t btcoex_lock;
743 struct timer_list period_timer; /* Timer for BT period */
744 struct timer_list no_stomp_timer;
745 u32 bt_priority_cnt;
746 unsigned long bt_priority_time;
747 unsigned long op_flags;
748 int bt_stomp_type; /* Types of BT stomping */
749 u32 btcoex_no_stomp; /* in msec */
750 u32 btcoex_period; /* in msec */
751 u32 btscan_no_stomp; /* in msec */
752 u32 duty_cycle;
753 u32 bt_wait_time;
754 int rssi_count;
755 struct ath_mci_profile mci;
756 u8 stomp_audio;
757 };
758
759 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
760 int ath9k_init_btcoex(struct ath_softc *sc);
761 void ath9k_deinit_btcoex(struct ath_softc *sc);
762 void ath9k_start_btcoex(struct ath_softc *sc);
763 void ath9k_stop_btcoex(struct ath_softc *sc);
764 void ath9k_btcoex_timer_resume(struct ath_softc *sc);
765 void ath9k_btcoex_timer_pause(struct ath_softc *sc);
766 void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status);
767 u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen);
768 void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc);
769 int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size);
770 #else
ath9k_init_btcoex(struct ath_softc * sc)771 static inline int ath9k_init_btcoex(struct ath_softc *sc)
772 {
773 return 0;
774 }
ath9k_deinit_btcoex(struct ath_softc * sc)775 static inline void ath9k_deinit_btcoex(struct ath_softc *sc)
776 {
777 }
ath9k_start_btcoex(struct ath_softc * sc)778 static inline void ath9k_start_btcoex(struct ath_softc *sc)
779 {
780 }
ath9k_stop_btcoex(struct ath_softc * sc)781 static inline void ath9k_stop_btcoex(struct ath_softc *sc)
782 {
783 }
ath9k_btcoex_handle_interrupt(struct ath_softc * sc,u32 status)784 static inline void ath9k_btcoex_handle_interrupt(struct ath_softc *sc,
785 u32 status)
786 {
787 }
ath9k_btcoex_aggr_limit(struct ath_softc * sc,u32 max_4ms_framelen)788 static inline u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc,
789 u32 max_4ms_framelen)
790 {
791 return 0;
792 }
ath9k_btcoex_stop_gen_timer(struct ath_softc * sc)793 static inline void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
794 {
795 }
ath9k_dump_btcoex(struct ath_softc * sc,u8 * buf,u32 size)796 static inline int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
797 {
798 return 0;
799 }
800 #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
801
802 /********************/
803 /* LED Control */
804 /********************/
805
806 #define ATH_LED_PIN_DEF 1
807 #define ATH_LED_PIN_9287 8
808 #define ATH_LED_PIN_9300 10
809 #define ATH_LED_PIN_9485 6
810 #define ATH_LED_PIN_9462 4
811
812 #ifdef CONFIG_MAC80211_LEDS
813 void ath_init_leds(struct ath_softc *sc);
814 void ath_deinit_leds(struct ath_softc *sc);
815 void ath_fill_led_pin(struct ath_softc *sc);
816 #else
ath_init_leds(struct ath_softc * sc)817 static inline void ath_init_leds(struct ath_softc *sc)
818 {
819 }
820
ath_deinit_leds(struct ath_softc * sc)821 static inline void ath_deinit_leds(struct ath_softc *sc)
822 {
823 }
ath_fill_led_pin(struct ath_softc * sc)824 static inline void ath_fill_led_pin(struct ath_softc *sc)
825 {
826 }
827 #endif
828
829 /************************/
830 /* Wake on Wireless LAN */
831 /************************/
832
833 #ifdef CONFIG_ATH9K_WOW
834 void ath9k_init_wow(struct ieee80211_hw *hw);
835 void ath9k_deinit_wow(struct ieee80211_hw *hw);
836 int ath9k_suspend(struct ieee80211_hw *hw,
837 struct cfg80211_wowlan *wowlan);
838 int ath9k_resume(struct ieee80211_hw *hw);
839 void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
840 #else
ath9k_init_wow(struct ieee80211_hw * hw)841 static inline void ath9k_init_wow(struct ieee80211_hw *hw)
842 {
843 }
ath9k_deinit_wow(struct ieee80211_hw * hw)844 static inline void ath9k_deinit_wow(struct ieee80211_hw *hw)
845 {
846 }
ath9k_suspend(struct ieee80211_hw * hw,struct cfg80211_wowlan * wowlan)847 static inline int ath9k_suspend(struct ieee80211_hw *hw,
848 struct cfg80211_wowlan *wowlan)
849 {
850 return 0;
851 }
ath9k_resume(struct ieee80211_hw * hw)852 static inline int ath9k_resume(struct ieee80211_hw *hw)
853 {
854 return 0;
855 }
ath9k_set_wakeup(struct ieee80211_hw * hw,bool enabled)856 static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
857 {
858 }
859 #endif /* CONFIG_ATH9K_WOW */
860
861 /*******************************/
862 /* Antenna diversity/combining */
863 /*******************************/
864
865 #define ATH_ANT_RX_CURRENT_SHIFT 4
866 #define ATH_ANT_RX_MAIN_SHIFT 2
867 #define ATH_ANT_RX_MASK 0x3
868
869 #define ATH_ANT_DIV_COMB_SHORT_SCAN_INTR 50
870 #define ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT 0x100
871 #define ATH_ANT_DIV_COMB_MAX_PKTCOUNT 0x200
872 #define ATH_ANT_DIV_COMB_INIT_COUNT 95
873 #define ATH_ANT_DIV_COMB_MAX_COUNT 100
874 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO 30
875 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2 20
876 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
877 #define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
878
879 #define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
880 #define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
881 #define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
882
883 struct ath_ant_comb {
884 u16 count;
885 u16 total_pkt_count;
886 bool scan;
887 bool scan_not_start;
888 int main_total_rssi;
889 int alt_total_rssi;
890 int alt_recv_cnt;
891 int main_recv_cnt;
892 int rssi_lna1;
893 int rssi_lna2;
894 int rssi_add;
895 int rssi_sub;
896 int rssi_first;
897 int rssi_second;
898 int rssi_third;
899 int ant_ratio;
900 int ant_ratio2;
901 bool alt_good;
902 int quick_scan_cnt;
903 enum ath9k_ant_div_comb_lna_conf main_conf;
904 enum ath9k_ant_div_comb_lna_conf first_quick_scan_conf;
905 enum ath9k_ant_div_comb_lna_conf second_quick_scan_conf;
906 bool first_ratio;
907 bool second_ratio;
908 unsigned long scan_start_time;
909
910 /*
911 * Card-specific config values.
912 */
913 int low_rssi_thresh;
914 int fast_div_bias;
915 };
916
917 void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
918
919 /********************/
920 /* Main driver core */
921 /********************/
922
923 #define ATH9K_PCI_CUS198 0x0001
924 #define ATH9K_PCI_CUS230 0x0002
925 #define ATH9K_PCI_CUS217 0x0004
926 #define ATH9K_PCI_CUS252 0x0008
927 #define ATH9K_PCI_WOW 0x0010
928 #define ATH9K_PCI_BT_ANT_DIV 0x0020
929 #define ATH9K_PCI_D3_L1_WAR 0x0040
930 #define ATH9K_PCI_AR9565_1ANT 0x0080
931 #define ATH9K_PCI_AR9565_2ANT 0x0100
932 #define ATH9K_PCI_NO_PLL_PWRSAVE 0x0200
933 #define ATH9K_PCI_KILLER 0x0400
934 #define ATH9K_PCI_LED_ACT_HI 0x0800
935
936 /*
937 * Default cache line size, in bytes.
938 * Used when PCI device not fully initialized by bootrom/BIOS
939 */
940 #define DEFAULT_CACHELINE 32
941 #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
942 #define ATH_TXPOWER_MAX 100 /* .5 dBm units */
943 #define MAX_GTT_CNT 5
944
945 /* Powersave flags */
946 #define PS_WAIT_FOR_BEACON BIT(0)
947 #define PS_WAIT_FOR_CAB BIT(1)
948 #define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
949 #define PS_WAIT_FOR_TX_ACK BIT(3)
950 #define PS_BEACON_SYNC BIT(4)
951 #define PS_WAIT_FOR_ANI BIT(5)
952
953 #define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */
954
955 struct ath_softc {
956 struct ieee80211_hw *hw;
957 struct device *dev;
958
959 struct survey_info *cur_survey;
960 struct survey_info survey[ATH9K_NUM_CHANNELS];
961
962 struct tasklet_struct intr_tq;
963 struct tasklet_struct bcon_tasklet;
964 struct ath_hw *sc_ah;
965 void __iomem *mem;
966 int irq;
967 spinlock_t sc_serial_rw;
968 spinlock_t sc_pm_lock;
969 spinlock_t sc_pcu_lock;
970 struct mutex mutex;
971 struct work_struct paprd_work;
972 struct work_struct hw_reset_work;
973 struct completion paprd_complete;
974 wait_queue_head_t tx_wait;
975
976 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
977 struct work_struct chanctx_work;
978 struct ath_gen_timer *p2p_ps_timer;
979 struct ath_vif *p2p_ps_vif;
980 struct ath_chanctx_sched sched;
981 struct ath_offchannel offchannel;
982 struct ath_chanctx *next_chan;
983 struct completion go_beacon;
984 #endif
985
986 unsigned long driver_data;
987
988 u8 gtt_cnt;
989 u32 intrstatus;
990 u16 ps_flags; /* PS_* */
991 bool ps_enabled;
992 bool ps_idle;
993 short nbcnvifs;
994 unsigned long ps_usecount;
995
996 struct ath_rx rx;
997 struct ath_tx tx;
998 struct ath_beacon beacon;
999
1000 struct cfg80211_chan_def cur_chandef;
1001 struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
1002 struct ath_chanctx *cur_chan;
1003 spinlock_t chan_lock;
1004
1005 #ifdef CONFIG_MAC80211_LEDS
1006 bool led_registered;
1007 char led_name[32];
1008 struct led_classdev led_cdev;
1009 #endif
1010
1011 #ifdef CONFIG_ATH9K_DEBUGFS
1012 struct ath9k_debug debug;
1013 #endif
1014 struct delayed_work tx_complete_work;
1015 struct delayed_work hw_pll_work;
1016 struct timer_list sleep_timer;
1017
1018 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
1019 struct ath_btcoex btcoex;
1020 struct ath_mci_coex mci_coex;
1021 struct work_struct mci_work;
1022 #endif
1023
1024 struct ath_descdma txsdma;
1025
1026 struct ath_ant_comb ant_comb;
1027 u8 ant_tx, ant_rx;
1028 struct dfs_pattern_detector *dfs_detector;
1029 u64 dfs_prev_pulse_ts;
1030 u32 wow_enabled;
1031
1032 struct ath_spec_scan_priv spec_priv;
1033
1034 struct ieee80211_vif *tx99_vif;
1035 struct sk_buff *tx99_skb;
1036 bool tx99_state;
1037 s16 tx99_power;
1038
1039 #ifdef CONFIG_ATH9K_WOW
1040 u32 wow_intr_before_sleep;
1041 bool force_wow;
1042 #endif
1043 };
1044
1045 /********/
1046 /* TX99 */
1047 /********/
1048
1049 #ifdef CONFIG_ATH9K_TX99
1050 void ath9k_tx99_init_debug(struct ath_softc *sc);
1051 int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
1052 struct ath_tx_control *txctl);
1053 #else
ath9k_tx99_init_debug(struct ath_softc * sc)1054 static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
1055 {
1056 }
ath9k_tx99_send(struct ath_softc * sc,struct sk_buff * skb,struct ath_tx_control * txctl)1057 static inline int ath9k_tx99_send(struct ath_softc *sc,
1058 struct sk_buff *skb,
1059 struct ath_tx_control *txctl)
1060 {
1061 return 0;
1062 }
1063 #endif /* CONFIG_ATH9K_TX99 */
1064
ath_read_cachesize(struct ath_common * common,int * csz)1065 static inline void ath_read_cachesize(struct ath_common *common, int *csz)
1066 {
1067 common->bus_ops->read_cachesize(common, csz);
1068 }
1069
1070 void ath9k_tasklet(unsigned long data);
1071 int ath_cabq_update(struct ath_softc *);
1072 u8 ath9k_parse_mpdudensity(u8 mpdudensity);
1073 irqreturn_t ath_isr(int irq, void *dev);
1074 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan);
1075 void ath_cancel_work(struct ath_softc *sc);
1076 void ath_restart_work(struct ath_softc *sc);
1077 int ath9k_init_device(u16 devid, struct ath_softc *sc,
1078 const struct ath_bus_ops *bus_ops);
1079 void ath9k_deinit_device(struct ath_softc *sc);
1080 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
1081 u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate);
1082 void ath_start_rfkill_poll(struct ath_softc *sc);
1083 void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
1084 void ath9k_ps_wakeup(struct ath_softc *sc);
1085 void ath9k_ps_restore(struct ath_softc *sc);
1086
1087 #ifdef CONFIG_ATH9K_PCI
1088 int ath_pci_init(void);
1089 void ath_pci_exit(void);
1090 #else
ath_pci_init(void)1091 static inline int ath_pci_init(void) { return 0; };
ath_pci_exit(void)1092 static inline void ath_pci_exit(void) {};
1093 #endif
1094
1095 #ifdef CONFIG_ATH9K_AHB
1096 int ath_ahb_init(void);
1097 void ath_ahb_exit(void);
1098 #else
ath_ahb_init(void)1099 static inline int ath_ahb_init(void) { return 0; };
ath_ahb_exit(void)1100 static inline void ath_ahb_exit(void) {};
1101 #endif
1102
1103 #endif /* ATH9K_H */
1104