1 /*
2 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
3 * All rights reserved. www.lanmedia.com
4 * Generic HDLC port Copyright (C) 2008 Krzysztof Halasa <khc@pm.waw.pl>
5 *
6 * This code is written by:
7 * Andrew Stanley-Jones (asj@cban.com)
8 * Rob Braun (bbraun@vix.com),
9 * Michael Graff (explorer@vix.com) and
10 * Matt Thomas (matt@3am-software.com).
11 *
12 * With Help By:
13 * David Boggs
14 * Ron Crane
15 * Alan Cox
16 *
17 * This software may be used and distributed according to the terms
18 * of the GNU General Public License version 2, incorporated herein by reference.
19 *
20 * Driver for the LanMedia LMC5200, LMC5245, LMC1000, LMC1200 cards.
21 *
22 * To control link specific options lmcctl is required.
23 * It can be obtained from ftp.lanmedia.com.
24 *
25 * Linux driver notes:
26 * Linux uses the device struct lmc_private to pass private information
27 * around.
28 *
29 * The initialization portion of this driver (the lmc_reset() and the
30 * lmc_dec_reset() functions, as well as the led controls and the
31 * lmc_initcsrs() functions.
32 *
33 * The watchdog function runs every second and checks to see if
34 * we still have link, and that the timing source is what we expected
35 * it to be. If link is lost, the interface is marked down, and
36 * we no longer can transmit.
37 *
38 */
39
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/string.h>
43 #include <linux/timer.h>
44 #include <linux/ptrace.h>
45 #include <linux/errno.h>
46 #include <linux/ioport.h>
47 #include <linux/slab.h>
48 #include <linux/interrupt.h>
49 #include <linux/pci.h>
50 #include <linux/delay.h>
51 #include <linux/hdlc.h>
52 #include <linux/in.h>
53 #include <linux/if_arp.h>
54 #include <linux/netdevice.h>
55 #include <linux/etherdevice.h>
56 #include <linux/skbuff.h>
57 #include <linux/inet.h>
58 #include <linux/bitops.h>
59 #include <asm/processor.h> /* Processor type for cache alignment. */
60 #include <asm/io.h>
61 #include <asm/dma.h>
62 #include <asm/uaccess.h>
63 //#include <asm/spinlock.h>
64
65 #define DRIVER_MAJOR_VERSION 1
66 #define DRIVER_MINOR_VERSION 34
67 #define DRIVER_SUB_VERSION 0
68
69 #define DRIVER_VERSION ((DRIVER_MAJOR_VERSION << 8) + DRIVER_MINOR_VERSION)
70
71 #include "lmc.h"
72 #include "lmc_var.h"
73 #include "lmc_ioctl.h"
74 #include "lmc_debug.h"
75 #include "lmc_proto.h"
76
77 static int LMC_PKT_BUF_SZ = 1542;
78
79 static const struct pci_device_id lmc_pci_tbl[] = {
80 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
81 PCI_VENDOR_ID_LMC, PCI_ANY_ID },
82 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST,
83 PCI_ANY_ID, PCI_VENDOR_ID_LMC },
84 { 0 }
85 };
86
87 MODULE_DEVICE_TABLE(pci, lmc_pci_tbl);
88 MODULE_LICENSE("GPL v2");
89
90
91 static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
92 struct net_device *dev);
93 static int lmc_rx (struct net_device *dev);
94 static int lmc_open(struct net_device *dev);
95 static int lmc_close(struct net_device *dev);
96 static struct net_device_stats *lmc_get_stats(struct net_device *dev);
97 static irqreturn_t lmc_interrupt(int irq, void *dev_instance);
98 static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, size_t csr_size);
99 static void lmc_softreset(lmc_softc_t * const);
100 static void lmc_running_reset(struct net_device *dev);
101 static int lmc_ifdown(struct net_device * const);
102 static void lmc_watchdog(unsigned long data);
103 static void lmc_reset(lmc_softc_t * const sc);
104 static void lmc_dec_reset(lmc_softc_t * const sc);
105 static void lmc_driver_timeout(struct net_device *dev);
106
107 /*
108 * linux reserves 16 device specific IOCTLs. We call them
109 * LMCIOC* to control various bits of our world.
110 */
lmc_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)111 int lmc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) /*fold00*/
112 {
113 lmc_softc_t *sc = dev_to_sc(dev);
114 lmc_ctl_t ctl;
115 int ret = -EOPNOTSUPP;
116 u16 regVal;
117 unsigned long flags;
118
119 lmc_trace(dev, "lmc_ioctl in");
120
121 /*
122 * Most functions mess with the structure
123 * Disable interrupts while we do the polling
124 */
125
126 switch (cmd) {
127 /*
128 * Return current driver state. Since we keep this up
129 * To date internally, just copy this out to the user.
130 */
131 case LMCIOCGINFO: /*fold01*/
132 if (copy_to_user(ifr->ifr_data, &sc->ictl, sizeof(lmc_ctl_t)))
133 ret = -EFAULT;
134 else
135 ret = 0;
136 break;
137
138 case LMCIOCSINFO: /*fold01*/
139 if (!capable(CAP_NET_ADMIN)) {
140 ret = -EPERM;
141 break;
142 }
143
144 if(dev->flags & IFF_UP){
145 ret = -EBUSY;
146 break;
147 }
148
149 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
150 ret = -EFAULT;
151 break;
152 }
153
154 spin_lock_irqsave(&sc->lmc_lock, flags);
155 sc->lmc_media->set_status (sc, &ctl);
156
157 if(ctl.crc_length != sc->ictl.crc_length) {
158 sc->lmc_media->set_crc_length(sc, ctl.crc_length);
159 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16)
160 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
161 else
162 sc->TxDescriptControlInit &= ~LMC_TDES_ADD_CRC_DISABLE;
163 }
164 spin_unlock_irqrestore(&sc->lmc_lock, flags);
165
166 ret = 0;
167 break;
168
169 case LMCIOCIFTYPE: /*fold01*/
170 {
171 u16 old_type = sc->if_type;
172 u16 new_type;
173
174 if (!capable(CAP_NET_ADMIN)) {
175 ret = -EPERM;
176 break;
177 }
178
179 if (copy_from_user(&new_type, ifr->ifr_data, sizeof(u16))) {
180 ret = -EFAULT;
181 break;
182 }
183
184
185 if (new_type == old_type)
186 {
187 ret = 0 ;
188 break; /* no change */
189 }
190
191 spin_lock_irqsave(&sc->lmc_lock, flags);
192 lmc_proto_close(sc);
193
194 sc->if_type = new_type;
195 lmc_proto_attach(sc);
196 ret = lmc_proto_open(sc);
197 spin_unlock_irqrestore(&sc->lmc_lock, flags);
198 break;
199 }
200
201 case LMCIOCGETXINFO: /*fold01*/
202 spin_lock_irqsave(&sc->lmc_lock, flags);
203 sc->lmc_xinfo.Magic0 = 0xBEEFCAFE;
204
205 sc->lmc_xinfo.PciCardType = sc->lmc_cardtype;
206 sc->lmc_xinfo.PciSlotNumber = 0;
207 sc->lmc_xinfo.DriverMajorVersion = DRIVER_MAJOR_VERSION;
208 sc->lmc_xinfo.DriverMinorVersion = DRIVER_MINOR_VERSION;
209 sc->lmc_xinfo.DriverSubVersion = DRIVER_SUB_VERSION;
210 sc->lmc_xinfo.XilinxRevisionNumber =
211 lmc_mii_readreg (sc, 0, 3) & 0xf;
212 sc->lmc_xinfo.MaxFrameSize = LMC_PKT_BUF_SZ;
213 sc->lmc_xinfo.link_status = sc->lmc_media->get_link_status (sc);
214 sc->lmc_xinfo.mii_reg16 = lmc_mii_readreg (sc, 0, 16);
215 spin_unlock_irqrestore(&sc->lmc_lock, flags);
216
217 sc->lmc_xinfo.Magic1 = 0xDEADBEEF;
218
219 if (copy_to_user(ifr->ifr_data, &sc->lmc_xinfo,
220 sizeof(struct lmc_xinfo)))
221 ret = -EFAULT;
222 else
223 ret = 0;
224
225 break;
226
227 case LMCIOCGETLMCSTATS:
228 spin_lock_irqsave(&sc->lmc_lock, flags);
229 if (sc->lmc_cardtype == LMC_CARDTYPE_T1) {
230 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_LSB);
231 sc->extra_stats.framingBitErrorCount +=
232 lmc_mii_readreg(sc, 0, 18) & 0xff;
233 lmc_mii_writereg(sc, 0, 17, T1FRAMER_FERR_MSB);
234 sc->extra_stats.framingBitErrorCount +=
235 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
236 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_LSB);
237 sc->extra_stats.lineCodeViolationCount +=
238 lmc_mii_readreg(sc, 0, 18) & 0xff;
239 lmc_mii_writereg(sc, 0, 17, T1FRAMER_LCV_MSB);
240 sc->extra_stats.lineCodeViolationCount +=
241 (lmc_mii_readreg(sc, 0, 18) & 0xff) << 8;
242 lmc_mii_writereg(sc, 0, 17, T1FRAMER_AERR);
243 regVal = lmc_mii_readreg(sc, 0, 18) & 0xff;
244
245 sc->extra_stats.lossOfFrameCount +=
246 (regVal & T1FRAMER_LOF_MASK) >> 4;
247 sc->extra_stats.changeOfFrameAlignmentCount +=
248 (regVal & T1FRAMER_COFA_MASK) >> 2;
249 sc->extra_stats.severelyErroredFrameCount +=
250 regVal & T1FRAMER_SEF_MASK;
251 }
252 spin_unlock_irqrestore(&sc->lmc_lock, flags);
253 if (copy_to_user(ifr->ifr_data, &sc->lmc_device->stats,
254 sizeof(sc->lmc_device->stats)) ||
255 copy_to_user(ifr->ifr_data + sizeof(sc->lmc_device->stats),
256 &sc->extra_stats, sizeof(sc->extra_stats)))
257 ret = -EFAULT;
258 else
259 ret = 0;
260 break;
261
262 case LMCIOCCLEARLMCSTATS:
263 if (!capable(CAP_NET_ADMIN)) {
264 ret = -EPERM;
265 break;
266 }
267
268 spin_lock_irqsave(&sc->lmc_lock, flags);
269 memset(&sc->lmc_device->stats, 0, sizeof(sc->lmc_device->stats));
270 memset(&sc->extra_stats, 0, sizeof(sc->extra_stats));
271 sc->extra_stats.check = STATCHECK;
272 sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
273 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
274 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
275 spin_unlock_irqrestore(&sc->lmc_lock, flags);
276 ret = 0;
277 break;
278
279 case LMCIOCSETCIRCUIT: /*fold01*/
280 if (!capable(CAP_NET_ADMIN)){
281 ret = -EPERM;
282 break;
283 }
284
285 if(dev->flags & IFF_UP){
286 ret = -EBUSY;
287 break;
288 }
289
290 if (copy_from_user(&ctl, ifr->ifr_data, sizeof(lmc_ctl_t))) {
291 ret = -EFAULT;
292 break;
293 }
294 spin_lock_irqsave(&sc->lmc_lock, flags);
295 sc->lmc_media->set_circuit_type(sc, ctl.circuit_type);
296 sc->ictl.circuit_type = ctl.circuit_type;
297 spin_unlock_irqrestore(&sc->lmc_lock, flags);
298 ret = 0;
299
300 break;
301
302 case LMCIOCRESET: /*fold01*/
303 if (!capable(CAP_NET_ADMIN)){
304 ret = -EPERM;
305 break;
306 }
307
308 spin_lock_irqsave(&sc->lmc_lock, flags);
309 /* Reset driver and bring back to current state */
310 printk (" REG16 before reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
311 lmc_running_reset (dev);
312 printk (" REG16 after reset +%04x\n", lmc_mii_readreg (sc, 0, 16));
313
314 LMC_EVENT_LOG(LMC_EVENT_FORCEDRESET, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
315 spin_unlock_irqrestore(&sc->lmc_lock, flags);
316
317 ret = 0;
318 break;
319
320 #ifdef DEBUG
321 case LMCIOCDUMPEVENTLOG:
322 if (copy_to_user(ifr->ifr_data, &lmcEventLogIndex, sizeof(u32))) {
323 ret = -EFAULT;
324 break;
325 }
326 if (copy_to_user(ifr->ifr_data + sizeof(u32), lmcEventLogBuf,
327 sizeof(lmcEventLogBuf)))
328 ret = -EFAULT;
329 else
330 ret = 0;
331
332 break;
333 #endif /* end ifdef _DBG_EVENTLOG */
334 case LMCIOCT1CONTROL: /*fold01*/
335 if (sc->lmc_cardtype != LMC_CARDTYPE_T1){
336 ret = -EOPNOTSUPP;
337 break;
338 }
339 break;
340 case LMCIOCXILINX: /*fold01*/
341 {
342 struct lmc_xilinx_control xc; /*fold02*/
343
344 if (!capable(CAP_NET_ADMIN)){
345 ret = -EPERM;
346 break;
347 }
348
349 /*
350 * Stop the xwitter whlie we restart the hardware
351 */
352 netif_stop_queue(dev);
353
354 if (copy_from_user(&xc, ifr->ifr_data, sizeof(struct lmc_xilinx_control))) {
355 ret = -EFAULT;
356 break;
357 }
358 switch(xc.command){
359 case lmc_xilinx_reset: /*fold02*/
360 {
361 u16 mii;
362 spin_lock_irqsave(&sc->lmc_lock, flags);
363 mii = lmc_mii_readreg (sc, 0, 16);
364
365 /*
366 * Make all of them 0 and make input
367 */
368 lmc_gpio_mkinput(sc, 0xff);
369
370 /*
371 * make the reset output
372 */
373 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
374
375 /*
376 * RESET low to force configuration. This also forces
377 * the transmitter clock to be internal, but we expect to reset
378 * that later anyway.
379 */
380
381 sc->lmc_gpio &= ~LMC_GEP_RESET;
382 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
383
384
385 /*
386 * hold for more than 10 microseconds
387 */
388 udelay(50);
389
390 sc->lmc_gpio |= LMC_GEP_RESET;
391 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
392
393
394 /*
395 * stop driving Xilinx-related signals
396 */
397 lmc_gpio_mkinput(sc, 0xff);
398
399 /* Reset the frammer hardware */
400 sc->lmc_media->set_link_status (sc, 1);
401 sc->lmc_media->set_status (sc, NULL);
402 // lmc_softreset(sc);
403
404 {
405 int i;
406 for(i = 0; i < 5; i++){
407 lmc_led_on(sc, LMC_DS3_LED0);
408 mdelay(100);
409 lmc_led_off(sc, LMC_DS3_LED0);
410 lmc_led_on(sc, LMC_DS3_LED1);
411 mdelay(100);
412 lmc_led_off(sc, LMC_DS3_LED1);
413 lmc_led_on(sc, LMC_DS3_LED3);
414 mdelay(100);
415 lmc_led_off(sc, LMC_DS3_LED3);
416 lmc_led_on(sc, LMC_DS3_LED2);
417 mdelay(100);
418 lmc_led_off(sc, LMC_DS3_LED2);
419 }
420 }
421 spin_unlock_irqrestore(&sc->lmc_lock, flags);
422
423
424
425 ret = 0x0;
426
427 }
428
429 break;
430 case lmc_xilinx_load_prom: /*fold02*/
431 {
432 u16 mii;
433 int timeout = 500000;
434 spin_lock_irqsave(&sc->lmc_lock, flags);
435 mii = lmc_mii_readreg (sc, 0, 16);
436
437 /*
438 * Make all of them 0 and make input
439 */
440 lmc_gpio_mkinput(sc, 0xff);
441
442 /*
443 * make the reset output
444 */
445 lmc_gpio_mkoutput(sc, LMC_GEP_DP | LMC_GEP_RESET);
446
447 /*
448 * RESET low to force configuration. This also forces
449 * the transmitter clock to be internal, but we expect to reset
450 * that later anyway.
451 */
452
453 sc->lmc_gpio &= ~(LMC_GEP_RESET | LMC_GEP_DP);
454 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
455
456
457 /*
458 * hold for more than 10 microseconds
459 */
460 udelay(50);
461
462 sc->lmc_gpio |= LMC_GEP_DP | LMC_GEP_RESET;
463 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
464
465 /*
466 * busy wait for the chip to reset
467 */
468 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
469 (timeout-- > 0))
470 cpu_relax();
471
472
473 /*
474 * stop driving Xilinx-related signals
475 */
476 lmc_gpio_mkinput(sc, 0xff);
477 spin_unlock_irqrestore(&sc->lmc_lock, flags);
478
479 ret = 0x0;
480
481
482 break;
483
484 }
485
486 case lmc_xilinx_load: /*fold02*/
487 {
488 char *data;
489 int pos;
490 int timeout = 500000;
491
492 if (!xc.data) {
493 ret = -EINVAL;
494 break;
495 }
496
497 data = kmalloc(xc.len, GFP_KERNEL);
498 if (!data) {
499 ret = -ENOMEM;
500 break;
501 }
502
503 if(copy_from_user(data, xc.data, xc.len))
504 {
505 kfree(data);
506 ret = -ENOMEM;
507 break;
508 }
509
510 printk("%s: Starting load of data Len: %d at 0x%p == 0x%p\n", dev->name, xc.len, xc.data, data);
511
512 spin_lock_irqsave(&sc->lmc_lock, flags);
513 lmc_gpio_mkinput(sc, 0xff);
514
515 /*
516 * Clear the Xilinx and start prgramming from the DEC
517 */
518
519 /*
520 * Set ouput as:
521 * Reset: 0 (active)
522 * DP: 0 (active)
523 * Mode: 1
524 *
525 */
526 sc->lmc_gpio = 0x00;
527 sc->lmc_gpio &= ~LMC_GEP_DP;
528 sc->lmc_gpio &= ~LMC_GEP_RESET;
529 sc->lmc_gpio |= LMC_GEP_MODE;
530 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
531
532 lmc_gpio_mkoutput(sc, LMC_GEP_MODE | LMC_GEP_DP | LMC_GEP_RESET);
533
534 /*
535 * Wait at least 10 us 20 to be safe
536 */
537 udelay(50);
538
539 /*
540 * Clear reset and activate programming lines
541 * Reset: Input
542 * DP: Input
543 * Clock: Output
544 * Data: Output
545 * Mode: Output
546 */
547 lmc_gpio_mkinput(sc, LMC_GEP_DP | LMC_GEP_RESET);
548
549 /*
550 * Set LOAD, DATA, Clock to 1
551 */
552 sc->lmc_gpio = 0x00;
553 sc->lmc_gpio |= LMC_GEP_MODE;
554 sc->lmc_gpio |= LMC_GEP_DATA;
555 sc->lmc_gpio |= LMC_GEP_CLK;
556 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
557
558 lmc_gpio_mkoutput(sc, LMC_GEP_DATA | LMC_GEP_CLK | LMC_GEP_MODE );
559
560 /*
561 * busy wait for the chip to reset
562 */
563 while( (LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0 &&
564 (timeout-- > 0))
565 cpu_relax();
566
567 printk(KERN_DEBUG "%s: Waited %d for the Xilinx to clear it's memory\n", dev->name, 500000-timeout);
568
569 for(pos = 0; pos < xc.len; pos++){
570 switch(data[pos]){
571 case 0:
572 sc->lmc_gpio &= ~LMC_GEP_DATA; /* Data is 0 */
573 break;
574 case 1:
575 sc->lmc_gpio |= LMC_GEP_DATA; /* Data is 1 */
576 break;
577 default:
578 printk(KERN_WARNING "%s Bad data in xilinx programming data at %d, got %d wanted 0 or 1\n", dev->name, pos, data[pos]);
579 sc->lmc_gpio |= LMC_GEP_DATA; /* Assume it's 1 */
580 }
581 sc->lmc_gpio &= ~LMC_GEP_CLK; /* Clock to zero */
582 sc->lmc_gpio |= LMC_GEP_MODE;
583 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
584 udelay(1);
585
586 sc->lmc_gpio |= LMC_GEP_CLK; /* Put the clack back to one */
587 sc->lmc_gpio |= LMC_GEP_MODE;
588 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
589 udelay(1);
590 }
591 if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_INIT) == 0){
592 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (corrupted data)\n", dev->name);
593 }
594 else if((LMC_CSR_READ(sc, csr_gp) & LMC_GEP_DP) == 0){
595 printk(KERN_WARNING "%s: Reprogramming FAILED. Needs to be reprogrammed. (done)\n", dev->name);
596 }
597 else {
598 printk(KERN_DEBUG "%s: Done reprogramming Xilinx, %d bits, good luck!\n", dev->name, pos);
599 }
600
601 lmc_gpio_mkinput(sc, 0xff);
602
603 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
604 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
605
606 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
607 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
608 spin_unlock_irqrestore(&sc->lmc_lock, flags);
609
610 kfree(data);
611
612 ret = 0;
613
614 break;
615 }
616 default: /*fold02*/
617 ret = -EBADE;
618 break;
619 }
620
621 netif_wake_queue(dev);
622 sc->lmc_txfull = 0;
623
624 }
625 break;
626 default: /*fold01*/
627 /* If we don't know what to do, give the protocol a shot. */
628 ret = lmc_proto_ioctl (sc, ifr, cmd);
629 break;
630 }
631
632 lmc_trace(dev, "lmc_ioctl out");
633
634 return ret;
635 }
636
637
638 /* the watchdog process that cruises around */
lmc_watchdog(unsigned long data)639 static void lmc_watchdog (unsigned long data) /*fold00*/
640 {
641 struct net_device *dev = (struct net_device *)data;
642 lmc_softc_t *sc = dev_to_sc(dev);
643 int link_status;
644 u32 ticks;
645 unsigned long flags;
646
647 lmc_trace(dev, "lmc_watchdog in");
648
649 spin_lock_irqsave(&sc->lmc_lock, flags);
650
651 if(sc->check != 0xBEAFCAFE){
652 printk("LMC: Corrupt net_device struct, breaking out\n");
653 spin_unlock_irqrestore(&sc->lmc_lock, flags);
654 return;
655 }
656
657
658 /* Make sure the tx jabber and rx watchdog are off,
659 * and the transmit and receive processes are running.
660 */
661
662 LMC_CSR_WRITE (sc, csr_15, 0x00000011);
663 sc->lmc_cmdmode |= TULIP_CMD_TXRUN | TULIP_CMD_RXRUN;
664 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
665
666 if (sc->lmc_ok == 0)
667 goto kick_timer;
668
669 LMC_EVENT_LOG(LMC_EVENT_WATCHDOG, LMC_CSR_READ (sc, csr_status), lmc_mii_readreg (sc, 0, 16));
670
671 /* --- begin time out check -----------------------------------
672 * check for a transmit interrupt timeout
673 * Has the packet xmt vs xmt serviced threshold been exceeded */
674 if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
675 sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
676 sc->tx_TimeoutInd == 0)
677 {
678
679 /* wait for the watchdog to come around again */
680 sc->tx_TimeoutInd = 1;
681 }
682 else if (sc->lmc_taint_tx == sc->lastlmc_taint_tx &&
683 sc->lmc_device->stats.tx_packets > sc->lasttx_packets &&
684 sc->tx_TimeoutInd)
685 {
686
687 LMC_EVENT_LOG(LMC_EVENT_XMTINTTMO, LMC_CSR_READ (sc, csr_status), 0);
688
689 sc->tx_TimeoutDisplay = 1;
690 sc->extra_stats.tx_TimeoutCnt++;
691
692 /* DEC chip is stuck, hit it with a RESET!!!! */
693 lmc_running_reset (dev);
694
695
696 /* look at receive & transmit process state to make sure they are running */
697 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
698
699 /* look at: DSR - 02 for Reg 16
700 * CTS - 08
701 * DCD - 10
702 * RI - 20
703 * for Reg 17
704 */
705 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg (sc, 0, 16), lmc_mii_readreg (sc, 0, 17));
706
707 /* reset the transmit timeout detection flag */
708 sc->tx_TimeoutInd = 0;
709 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
710 sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
711 } else {
712 sc->tx_TimeoutInd = 0;
713 sc->lastlmc_taint_tx = sc->lmc_taint_tx;
714 sc->lasttx_packets = sc->lmc_device->stats.tx_packets;
715 }
716
717 /* --- end time out check ----------------------------------- */
718
719
720 link_status = sc->lmc_media->get_link_status (sc);
721
722 /*
723 * hardware level link lost, but the interface is marked as up.
724 * Mark it as down.
725 */
726 if ((link_status == 0) && (sc->last_link_status != 0)) {
727 printk(KERN_WARNING "%s: hardware/physical link down\n", dev->name);
728 sc->last_link_status = 0;
729 /* lmc_reset (sc); Why reset??? The link can go down ok */
730
731 /* Inform the world that link has been lost */
732 netif_carrier_off(dev);
733 }
734
735 /*
736 * hardware link is up, but the interface is marked as down.
737 * Bring it back up again.
738 */
739 if (link_status != 0 && sc->last_link_status == 0) {
740 printk(KERN_WARNING "%s: hardware/physical link up\n", dev->name);
741 sc->last_link_status = 1;
742 /* lmc_reset (sc); Again why reset??? */
743
744 netif_carrier_on(dev);
745 }
746
747 /* Call media specific watchdog functions */
748 sc->lmc_media->watchdog(sc);
749
750 /*
751 * Poke the transmitter to make sure it
752 * never stops, even if we run out of mem
753 */
754 LMC_CSR_WRITE(sc, csr_rxpoll, 0);
755
756 /*
757 * Check for code that failed
758 * and try and fix it as appropriate
759 */
760 if(sc->failed_ring == 1){
761 /*
762 * Failed to setup the recv/xmit rin
763 * Try again
764 */
765 sc->failed_ring = 0;
766 lmc_softreset(sc);
767 }
768 if(sc->failed_recv_alloc == 1){
769 /*
770 * We failed to alloc mem in the
771 * interrupt handler, go through the rings
772 * and rebuild them
773 */
774 sc->failed_recv_alloc = 0;
775 lmc_softreset(sc);
776 }
777
778
779 /*
780 * remember the timer value
781 */
782 kick_timer:
783
784 ticks = LMC_CSR_READ (sc, csr_gp_timer);
785 LMC_CSR_WRITE (sc, csr_gp_timer, 0xffffffffUL);
786 sc->ictl.ticks = 0x0000ffff - (ticks & 0x0000ffff);
787
788 /*
789 * restart this timer.
790 */
791 sc->timer.expires = jiffies + (HZ);
792 add_timer (&sc->timer);
793
794 spin_unlock_irqrestore(&sc->lmc_lock, flags);
795
796 lmc_trace(dev, "lmc_watchdog out");
797
798 }
799
lmc_attach(struct net_device * dev,unsigned short encoding,unsigned short parity)800 static int lmc_attach(struct net_device *dev, unsigned short encoding,
801 unsigned short parity)
802 {
803 if (encoding == ENCODING_NRZ && parity == PARITY_CRC16_PR1_CCITT)
804 return 0;
805 return -EINVAL;
806 }
807
808 static const struct net_device_ops lmc_ops = {
809 .ndo_open = lmc_open,
810 .ndo_stop = lmc_close,
811 .ndo_change_mtu = hdlc_change_mtu,
812 .ndo_start_xmit = hdlc_start_xmit,
813 .ndo_do_ioctl = lmc_ioctl,
814 .ndo_tx_timeout = lmc_driver_timeout,
815 .ndo_get_stats = lmc_get_stats,
816 };
817
lmc_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)818 static int lmc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
819 {
820 lmc_softc_t *sc;
821 struct net_device *dev;
822 u16 subdevice;
823 u16 AdapModelNum;
824 int err;
825 static int cards_found;
826
827 /* lmc_trace(dev, "lmc_init_one in"); */
828
829 err = pci_enable_device(pdev);
830 if (err) {
831 printk(KERN_ERR "lmc: pci enable failed: %d\n", err);
832 return err;
833 }
834
835 err = pci_request_regions(pdev, "lmc");
836 if (err) {
837 printk(KERN_ERR "lmc: pci_request_region failed\n");
838 goto err_req_io;
839 }
840
841 /*
842 * Allocate our own device structure
843 */
844 sc = kzalloc(sizeof(lmc_softc_t), GFP_KERNEL);
845 if (!sc) {
846 err = -ENOMEM;
847 goto err_kzalloc;
848 }
849
850 dev = alloc_hdlcdev(sc);
851 if (!dev) {
852 printk(KERN_ERR "lmc:alloc_netdev for device failed\n");
853 err = -ENOMEM;
854 goto err_hdlcdev;
855 }
856
857
858 dev->type = ARPHRD_HDLC;
859 dev_to_hdlc(dev)->xmit = lmc_start_xmit;
860 dev_to_hdlc(dev)->attach = lmc_attach;
861 dev->netdev_ops = &lmc_ops;
862 dev->watchdog_timeo = HZ; /* 1 second */
863 dev->tx_queue_len = 100;
864 sc->lmc_device = dev;
865 sc->name = dev->name;
866 sc->if_type = LMC_PPP;
867 sc->check = 0xBEAFCAFE;
868 dev->base_addr = pci_resource_start(pdev, 0);
869 dev->irq = pdev->irq;
870 pci_set_drvdata(pdev, dev);
871 SET_NETDEV_DEV(dev, &pdev->dev);
872
873 /*
874 * This will get the protocol layer ready and do any 1 time init's
875 * Must have a valid sc and dev structure
876 */
877 lmc_proto_attach(sc);
878
879 /* Init the spin lock so can call it latter */
880
881 spin_lock_init(&sc->lmc_lock);
882 pci_set_master(pdev);
883
884 printk(KERN_INFO "%s: detected at %lx, irq %d\n", dev->name,
885 dev->base_addr, dev->irq);
886
887 err = register_hdlc_device(dev);
888 if (err) {
889 printk(KERN_ERR "%s: register_netdev failed.\n", dev->name);
890 free_netdev(dev);
891 goto err_hdlcdev;
892 }
893
894 sc->lmc_cardtype = LMC_CARDTYPE_UNKNOWN;
895 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
896
897 /*
898 *
899 * Check either the subvendor or the subdevice, some systems reverse
900 * the setting in the bois, seems to be version and arch dependent?
901 * Fix the error, exchange the two values
902 */
903 if ((subdevice = pdev->subsystem_device) == PCI_VENDOR_ID_LMC)
904 subdevice = pdev->subsystem_vendor;
905
906 switch (subdevice) {
907 case PCI_DEVICE_ID_LMC_HSSI:
908 printk(KERN_INFO "%s: LMC HSSI\n", dev->name);
909 sc->lmc_cardtype = LMC_CARDTYPE_HSSI;
910 sc->lmc_media = &lmc_hssi_media;
911 break;
912 case PCI_DEVICE_ID_LMC_DS3:
913 printk(KERN_INFO "%s: LMC DS3\n", dev->name);
914 sc->lmc_cardtype = LMC_CARDTYPE_DS3;
915 sc->lmc_media = &lmc_ds3_media;
916 break;
917 case PCI_DEVICE_ID_LMC_SSI:
918 printk(KERN_INFO "%s: LMC SSI\n", dev->name);
919 sc->lmc_cardtype = LMC_CARDTYPE_SSI;
920 sc->lmc_media = &lmc_ssi_media;
921 break;
922 case PCI_DEVICE_ID_LMC_T1:
923 printk(KERN_INFO "%s: LMC T1\n", dev->name);
924 sc->lmc_cardtype = LMC_CARDTYPE_T1;
925 sc->lmc_media = &lmc_t1_media;
926 break;
927 default:
928 printk(KERN_WARNING "%s: LMC UNKNOWN CARD!\n", dev->name);
929 break;
930 }
931
932 lmc_initcsrs (sc, dev->base_addr, 8);
933
934 lmc_gpio_mkinput (sc, 0xff);
935 sc->lmc_gpio = 0; /* drive no signals yet */
936
937 sc->lmc_media->defaults (sc);
938
939 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
940
941 /* verify that the PCI Sub System ID matches the Adapter Model number
942 * from the MII register
943 */
944 AdapModelNum = (lmc_mii_readreg (sc, 0, 3) & 0x3f0) >> 4;
945
946 if ((AdapModelNum != LMC_ADAP_T1 || /* detect LMC1200 */
947 subdevice != PCI_DEVICE_ID_LMC_T1) &&
948 (AdapModelNum != LMC_ADAP_SSI || /* detect LMC1000 */
949 subdevice != PCI_DEVICE_ID_LMC_SSI) &&
950 (AdapModelNum != LMC_ADAP_DS3 || /* detect LMC5245 */
951 subdevice != PCI_DEVICE_ID_LMC_DS3) &&
952 (AdapModelNum != LMC_ADAP_HSSI || /* detect LMC5200 */
953 subdevice != PCI_DEVICE_ID_LMC_HSSI))
954 printk(KERN_WARNING "%s: Model number (%d) miscompare for PCI"
955 " Subsystem ID = 0x%04x\n",
956 dev->name, AdapModelNum, subdevice);
957
958 /*
959 * reset clock
960 */
961 LMC_CSR_WRITE (sc, csr_gp_timer, 0xFFFFFFFFUL);
962
963 sc->board_idx = cards_found++;
964 sc->extra_stats.check = STATCHECK;
965 sc->extra_stats.version_size = (DRIVER_VERSION << 16) +
966 sizeof(sc->lmc_device->stats) + sizeof(sc->extra_stats);
967 sc->extra_stats.lmc_cardtype = sc->lmc_cardtype;
968
969 sc->lmc_ok = 0;
970 sc->last_link_status = 0;
971
972 lmc_trace(dev, "lmc_init_one out");
973 return 0;
974
975 err_hdlcdev:
976 kfree(sc);
977 err_kzalloc:
978 pci_release_regions(pdev);
979 err_req_io:
980 pci_disable_device(pdev);
981 return err;
982 }
983
984 /*
985 * Called from pci when removing module.
986 */
lmc_remove_one(struct pci_dev * pdev)987 static void lmc_remove_one(struct pci_dev *pdev)
988 {
989 struct net_device *dev = pci_get_drvdata(pdev);
990
991 if (dev) {
992 printk(KERN_DEBUG "%s: removing...\n", dev->name);
993 unregister_hdlc_device(dev);
994 free_netdev(dev);
995 pci_release_regions(pdev);
996 pci_disable_device(pdev);
997 }
998 }
999
1000 /* After this is called, packets can be sent.
1001 * Does not initialize the addresses
1002 */
lmc_open(struct net_device * dev)1003 static int lmc_open(struct net_device *dev)
1004 {
1005 lmc_softc_t *sc = dev_to_sc(dev);
1006 int err;
1007
1008 lmc_trace(dev, "lmc_open in");
1009
1010 lmc_led_on(sc, LMC_DS3_LED0);
1011
1012 lmc_dec_reset(sc);
1013 lmc_reset(sc);
1014
1015 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ(sc, csr_status), 0);
1016 LMC_EVENT_LOG(LMC_EVENT_RESET2, lmc_mii_readreg(sc, 0, 16),
1017 lmc_mii_readreg(sc, 0, 17));
1018
1019 if (sc->lmc_ok){
1020 lmc_trace(dev, "lmc_open lmc_ok out");
1021 return 0;
1022 }
1023
1024 lmc_softreset (sc);
1025
1026 /* Since we have to use PCI bus, this should work on x86,alpha,ppc */
1027 if (request_irq (dev->irq, lmc_interrupt, IRQF_SHARED, dev->name, dev)){
1028 printk(KERN_WARNING "%s: could not get irq: %d\n", dev->name, dev->irq);
1029 lmc_trace(dev, "lmc_open irq failed out");
1030 return -EAGAIN;
1031 }
1032 sc->got_irq = 1;
1033
1034 /* Assert Terminal Active */
1035 sc->lmc_miireg16 |= LMC_MII16_LED_ALL;
1036 sc->lmc_media->set_link_status (sc, LMC_LINK_UP);
1037
1038 /*
1039 * reset to last state.
1040 */
1041 sc->lmc_media->set_status (sc, NULL);
1042
1043 /* setup default bits to be used in tulip_desc_t transmit descriptor
1044 * -baz */
1045 sc->TxDescriptControlInit = (
1046 LMC_TDES_INTERRUPT_ON_COMPLETION
1047 | LMC_TDES_FIRST_SEGMENT
1048 | LMC_TDES_LAST_SEGMENT
1049 | LMC_TDES_SECOND_ADDR_CHAINED
1050 | LMC_TDES_DISABLE_PADDING
1051 );
1052
1053 if (sc->ictl.crc_length == LMC_CTL_CRC_LENGTH_16) {
1054 /* disable 32 bit CRC generated by ASIC */
1055 sc->TxDescriptControlInit |= LMC_TDES_ADD_CRC_DISABLE;
1056 }
1057 sc->lmc_media->set_crc_length(sc, sc->ictl.crc_length);
1058 /* Acknoledge the Terminal Active and light LEDs */
1059
1060 /* dev->flags |= IFF_UP; */
1061
1062 if ((err = lmc_proto_open(sc)) != 0)
1063 return err;
1064
1065 netif_start_queue(dev);
1066 sc->extra_stats.tx_tbusy0++;
1067
1068 /*
1069 * select what interrupts we want to get
1070 */
1071 sc->lmc_intrmask = 0;
1072 /* Should be using the default interrupt mask defined in the .h file. */
1073 sc->lmc_intrmask |= (TULIP_STS_NORMALINTR
1074 | TULIP_STS_RXINTR
1075 | TULIP_STS_TXINTR
1076 | TULIP_STS_ABNRMLINTR
1077 | TULIP_STS_SYSERROR
1078 | TULIP_STS_TXSTOPPED
1079 | TULIP_STS_TXUNDERFLOW
1080 | TULIP_STS_RXSTOPPED
1081 | TULIP_STS_RXNOBUF
1082 );
1083 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1084
1085 sc->lmc_cmdmode |= TULIP_CMD_TXRUN;
1086 sc->lmc_cmdmode |= TULIP_CMD_RXRUN;
1087 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1088
1089 sc->lmc_ok = 1; /* Run watchdog */
1090
1091 /*
1092 * Set the if up now - pfb
1093 */
1094
1095 sc->last_link_status = 1;
1096
1097 /*
1098 * Setup a timer for the watchdog on probe, and start it running.
1099 * Since lmc_ok == 0, it will be a NOP for now.
1100 */
1101 init_timer (&sc->timer);
1102 sc->timer.expires = jiffies + HZ;
1103 sc->timer.data = (unsigned long) dev;
1104 sc->timer.function = lmc_watchdog;
1105 add_timer (&sc->timer);
1106
1107 lmc_trace(dev, "lmc_open out");
1108
1109 return 0;
1110 }
1111
1112 /* Total reset to compensate for the AdTran DSU doing bad things
1113 * under heavy load
1114 */
1115
lmc_running_reset(struct net_device * dev)1116 static void lmc_running_reset (struct net_device *dev) /*fold00*/
1117 {
1118 lmc_softc_t *sc = dev_to_sc(dev);
1119
1120 lmc_trace(dev, "lmc_running_reset in");
1121
1122 /* stop interrupts */
1123 /* Clear the interrupt mask */
1124 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1125
1126 lmc_dec_reset (sc);
1127 lmc_reset (sc);
1128 lmc_softreset (sc);
1129 /* sc->lmc_miireg16 |= LMC_MII16_LED_ALL; */
1130 sc->lmc_media->set_link_status (sc, 1);
1131 sc->lmc_media->set_status (sc, NULL);
1132
1133 netif_wake_queue(dev);
1134
1135 sc->lmc_txfull = 0;
1136 sc->extra_stats.tx_tbusy0++;
1137
1138 sc->lmc_intrmask = TULIP_DEFAULT_INTR_MASK;
1139 LMC_CSR_WRITE (sc, csr_intr, sc->lmc_intrmask);
1140
1141 sc->lmc_cmdmode |= (TULIP_CMD_TXRUN | TULIP_CMD_RXRUN);
1142 LMC_CSR_WRITE (sc, csr_command, sc->lmc_cmdmode);
1143
1144 lmc_trace(dev, "lmc_runnin_reset_out");
1145 }
1146
1147
1148 /* This is what is called when you ifconfig down a device.
1149 * This disables the timer for the watchdog and keepalives,
1150 * and disables the irq for dev.
1151 */
lmc_close(struct net_device * dev)1152 static int lmc_close(struct net_device *dev)
1153 {
1154 /* not calling release_region() as we should */
1155 lmc_softc_t *sc = dev_to_sc(dev);
1156
1157 lmc_trace(dev, "lmc_close in");
1158
1159 sc->lmc_ok = 0;
1160 sc->lmc_media->set_link_status (sc, 0);
1161 del_timer (&sc->timer);
1162 lmc_proto_close(sc);
1163 lmc_ifdown (dev);
1164
1165 lmc_trace(dev, "lmc_close out");
1166
1167 return 0;
1168 }
1169
1170 /* Ends the transfer of packets */
1171 /* When the interface goes down, this is called */
lmc_ifdown(struct net_device * dev)1172 static int lmc_ifdown (struct net_device *dev) /*fold00*/
1173 {
1174 lmc_softc_t *sc = dev_to_sc(dev);
1175 u32 csr6;
1176 int i;
1177
1178 lmc_trace(dev, "lmc_ifdown in");
1179
1180 /* Don't let anything else go on right now */
1181 // dev->start = 0;
1182 netif_stop_queue(dev);
1183 sc->extra_stats.tx_tbusy1++;
1184
1185 /* stop interrupts */
1186 /* Clear the interrupt mask */
1187 LMC_CSR_WRITE (sc, csr_intr, 0x00000000);
1188
1189 /* Stop Tx and Rx on the chip */
1190 csr6 = LMC_CSR_READ (sc, csr_command);
1191 csr6 &= ~LMC_DEC_ST; /* Turn off the Transmission bit */
1192 csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */
1193 LMC_CSR_WRITE (sc, csr_command, csr6);
1194
1195 sc->lmc_device->stats.rx_missed_errors +=
1196 LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1197
1198 /* release the interrupt */
1199 if(sc->got_irq == 1){
1200 free_irq (dev->irq, dev);
1201 sc->got_irq = 0;
1202 }
1203
1204 /* free skbuffs in the Rx queue */
1205 for (i = 0; i < LMC_RXDESCS; i++)
1206 {
1207 struct sk_buff *skb = sc->lmc_rxq[i];
1208 sc->lmc_rxq[i] = NULL;
1209 sc->lmc_rxring[i].status = 0;
1210 sc->lmc_rxring[i].length = 0;
1211 sc->lmc_rxring[i].buffer1 = 0xDEADBEEF;
1212 if (skb != NULL)
1213 dev_kfree_skb(skb);
1214 sc->lmc_rxq[i] = NULL;
1215 }
1216
1217 for (i = 0; i < LMC_TXDESCS; i++)
1218 {
1219 if (sc->lmc_txq[i] != NULL)
1220 dev_kfree_skb(sc->lmc_txq[i]);
1221 sc->lmc_txq[i] = NULL;
1222 }
1223
1224 lmc_led_off (sc, LMC_MII16_LED_ALL);
1225
1226 netif_wake_queue(dev);
1227 sc->extra_stats.tx_tbusy0++;
1228
1229 lmc_trace(dev, "lmc_ifdown out");
1230
1231 return 0;
1232 }
1233
1234 /* Interrupt handling routine. This will take an incoming packet, or clean
1235 * up after a trasmit.
1236 */
lmc_interrupt(int irq,void * dev_instance)1237 static irqreturn_t lmc_interrupt (int irq, void *dev_instance) /*fold00*/
1238 {
1239 struct net_device *dev = (struct net_device *) dev_instance;
1240 lmc_softc_t *sc = dev_to_sc(dev);
1241 u32 csr;
1242 int i;
1243 s32 stat;
1244 unsigned int badtx;
1245 u32 firstcsr;
1246 int max_work = LMC_RXDESCS;
1247 int handled = 0;
1248
1249 lmc_trace(dev, "lmc_interrupt in");
1250
1251 spin_lock(&sc->lmc_lock);
1252
1253 /*
1254 * Read the csr to find what interrupts we have (if any)
1255 */
1256 csr = LMC_CSR_READ (sc, csr_status);
1257
1258 /*
1259 * Make sure this is our interrupt
1260 */
1261 if ( ! (csr & sc->lmc_intrmask)) {
1262 goto lmc_int_fail_out;
1263 }
1264
1265 firstcsr = csr;
1266
1267 /* always go through this loop at least once */
1268 while (csr & sc->lmc_intrmask) {
1269 handled = 1;
1270
1271 /*
1272 * Clear interrupt bits, we handle all case below
1273 */
1274 LMC_CSR_WRITE (sc, csr_status, csr);
1275
1276 /*
1277 * One of
1278 * - Transmit process timed out CSR5<1>
1279 * - Transmit jabber timeout CSR5<3>
1280 * - Transmit underflow CSR5<5>
1281 * - Transmit Receiver buffer unavailable CSR5<7>
1282 * - Receive process stopped CSR5<8>
1283 * - Receive watchdog timeout CSR5<9>
1284 * - Early transmit interrupt CSR5<10>
1285 *
1286 * Is this really right? Should we do a running reset for jabber?
1287 * (being a WAN card and all)
1288 */
1289 if (csr & TULIP_STS_ABNRMLINTR){
1290 lmc_running_reset (dev);
1291 break;
1292 }
1293
1294 if (csr & TULIP_STS_RXINTR){
1295 lmc_trace(dev, "rx interrupt");
1296 lmc_rx (dev);
1297
1298 }
1299 if (csr & (TULIP_STS_TXINTR | TULIP_STS_TXNOBUF | TULIP_STS_TXSTOPPED)) {
1300
1301 int n_compl = 0 ;
1302 /* reset the transmit timeout detection flag -baz */
1303 sc->extra_stats.tx_NoCompleteCnt = 0;
1304
1305 badtx = sc->lmc_taint_tx;
1306 i = badtx % LMC_TXDESCS;
1307
1308 while ((badtx < sc->lmc_next_tx)) {
1309 stat = sc->lmc_txring[i].status;
1310
1311 LMC_EVENT_LOG (LMC_EVENT_XMTINT, stat,
1312 sc->lmc_txring[i].length);
1313 /*
1314 * If bit 31 is 1 the tulip owns it break out of the loop
1315 */
1316 if (stat & 0x80000000)
1317 break;
1318
1319 n_compl++ ; /* i.e., have an empty slot in ring */
1320 /*
1321 * If we have no skbuff or have cleared it
1322 * Already continue to the next buffer
1323 */
1324 if (sc->lmc_txq[i] == NULL)
1325 continue;
1326
1327 /*
1328 * Check the total error summary to look for any errors
1329 */
1330 if (stat & 0x8000) {
1331 sc->lmc_device->stats.tx_errors++;
1332 if (stat & 0x4104)
1333 sc->lmc_device->stats.tx_aborted_errors++;
1334 if (stat & 0x0C00)
1335 sc->lmc_device->stats.tx_carrier_errors++;
1336 if (stat & 0x0200)
1337 sc->lmc_device->stats.tx_window_errors++;
1338 if (stat & 0x0002)
1339 sc->lmc_device->stats.tx_fifo_errors++;
1340 } else {
1341 sc->lmc_device->stats.tx_bytes += sc->lmc_txring[i].length & 0x7ff;
1342
1343 sc->lmc_device->stats.tx_packets++;
1344 }
1345
1346 // dev_kfree_skb(sc->lmc_txq[i]);
1347 dev_kfree_skb_irq(sc->lmc_txq[i]);
1348 sc->lmc_txq[i] = NULL;
1349
1350 badtx++;
1351 i = badtx % LMC_TXDESCS;
1352 }
1353
1354 if (sc->lmc_next_tx - badtx > LMC_TXDESCS)
1355 {
1356 printk ("%s: out of sync pointer\n", dev->name);
1357 badtx += LMC_TXDESCS;
1358 }
1359 LMC_EVENT_LOG(LMC_EVENT_TBUSY0, n_compl, 0);
1360 sc->lmc_txfull = 0;
1361 netif_wake_queue(dev);
1362 sc->extra_stats.tx_tbusy0++;
1363
1364
1365 #ifdef DEBUG
1366 sc->extra_stats.dirtyTx = badtx;
1367 sc->extra_stats.lmc_next_tx = sc->lmc_next_tx;
1368 sc->extra_stats.lmc_txfull = sc->lmc_txfull;
1369 #endif
1370 sc->lmc_taint_tx = badtx;
1371
1372 /*
1373 * Why was there a break here???
1374 */
1375 } /* end handle transmit interrupt */
1376
1377 if (csr & TULIP_STS_SYSERROR) {
1378 u32 error;
1379 printk (KERN_WARNING "%s: system bus error csr: %#8.8x\n", dev->name, csr);
1380 error = csr>>23 & 0x7;
1381 switch(error){
1382 case 0x000:
1383 printk(KERN_WARNING "%s: Parity Fault (bad)\n", dev->name);
1384 break;
1385 case 0x001:
1386 printk(KERN_WARNING "%s: Master Abort (naughty)\n", dev->name);
1387 break;
1388 case 0x010:
1389 printk(KERN_WARNING "%s: Target Abort (not so naughty)\n", dev->name);
1390 break;
1391 default:
1392 printk(KERN_WARNING "%s: This bus error code was supposed to be reserved!\n", dev->name);
1393 }
1394 lmc_dec_reset (sc);
1395 lmc_reset (sc);
1396 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
1397 LMC_EVENT_LOG(LMC_EVENT_RESET2,
1398 lmc_mii_readreg (sc, 0, 16),
1399 lmc_mii_readreg (sc, 0, 17));
1400
1401 }
1402
1403
1404 if(max_work-- <= 0)
1405 break;
1406
1407 /*
1408 * Get current csr status to make sure
1409 * we've cleared all interrupts
1410 */
1411 csr = LMC_CSR_READ (sc, csr_status);
1412 } /* end interrupt loop */
1413 LMC_EVENT_LOG(LMC_EVENT_INT, firstcsr, csr);
1414
1415 lmc_int_fail_out:
1416
1417 spin_unlock(&sc->lmc_lock);
1418
1419 lmc_trace(dev, "lmc_interrupt out");
1420 return IRQ_RETVAL(handled);
1421 }
1422
lmc_start_xmit(struct sk_buff * skb,struct net_device * dev)1423 static netdev_tx_t lmc_start_xmit(struct sk_buff *skb,
1424 struct net_device *dev)
1425 {
1426 lmc_softc_t *sc = dev_to_sc(dev);
1427 u32 flag;
1428 int entry;
1429 unsigned long flags;
1430
1431 lmc_trace(dev, "lmc_start_xmit in");
1432
1433 spin_lock_irqsave(&sc->lmc_lock, flags);
1434
1435 /* normal path, tbusy known to be zero */
1436
1437 entry = sc->lmc_next_tx % LMC_TXDESCS;
1438
1439 sc->lmc_txq[entry] = skb;
1440 sc->lmc_txring[entry].buffer1 = virt_to_bus (skb->data);
1441
1442 LMC_CONSOLE_LOG("xmit", skb->data, skb->len);
1443
1444 #ifndef GCOM
1445 /* If the queue is less than half full, don't interrupt */
1446 if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS / 2)
1447 {
1448 /* Do not interrupt on completion of this packet */
1449 flag = 0x60000000;
1450 netif_wake_queue(dev);
1451 }
1452 else if (sc->lmc_next_tx - sc->lmc_taint_tx == LMC_TXDESCS / 2)
1453 {
1454 /* This generates an interrupt on completion of this packet */
1455 flag = 0xe0000000;
1456 netif_wake_queue(dev);
1457 }
1458 else if (sc->lmc_next_tx - sc->lmc_taint_tx < LMC_TXDESCS - 1)
1459 {
1460 /* Do not interrupt on completion of this packet */
1461 flag = 0x60000000;
1462 netif_wake_queue(dev);
1463 }
1464 else
1465 {
1466 /* This generates an interrupt on completion of this packet */
1467 flag = 0xe0000000;
1468 sc->lmc_txfull = 1;
1469 netif_stop_queue(dev);
1470 }
1471 #else
1472 flag = LMC_TDES_INTERRUPT_ON_COMPLETION;
1473
1474 if (sc->lmc_next_tx - sc->lmc_taint_tx >= LMC_TXDESCS - 1)
1475 { /* ring full, go busy */
1476 sc->lmc_txfull = 1;
1477 netif_stop_queue(dev);
1478 sc->extra_stats.tx_tbusy1++;
1479 LMC_EVENT_LOG(LMC_EVENT_TBUSY1, entry, 0);
1480 }
1481 #endif
1482
1483
1484 if (entry == LMC_TXDESCS - 1) /* last descriptor in ring */
1485 flag |= LMC_TDES_END_OF_RING; /* flag as such for Tulip */
1486
1487 /* don't pad small packets either */
1488 flag = sc->lmc_txring[entry].length = (skb->len) | flag |
1489 sc->TxDescriptControlInit;
1490
1491 /* set the transmit timeout flag to be checked in
1492 * the watchdog timer handler. -baz
1493 */
1494
1495 sc->extra_stats.tx_NoCompleteCnt++;
1496 sc->lmc_next_tx++;
1497
1498 /* give ownership to the chip */
1499 LMC_EVENT_LOG(LMC_EVENT_XMT, flag, entry);
1500 sc->lmc_txring[entry].status = 0x80000000;
1501
1502 /* send now! */
1503 LMC_CSR_WRITE (sc, csr_txpoll, 0);
1504
1505 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1506
1507 lmc_trace(dev, "lmc_start_xmit_out");
1508 return NETDEV_TX_OK;
1509 }
1510
1511
lmc_rx(struct net_device * dev)1512 static int lmc_rx(struct net_device *dev)
1513 {
1514 lmc_softc_t *sc = dev_to_sc(dev);
1515 int i;
1516 int rx_work_limit = LMC_RXDESCS;
1517 unsigned int next_rx;
1518 int rxIntLoopCnt; /* debug -baz */
1519 int localLengthErrCnt = 0;
1520 long stat;
1521 struct sk_buff *skb, *nsb;
1522 u16 len;
1523
1524 lmc_trace(dev, "lmc_rx in");
1525
1526 lmc_led_on(sc, LMC_DS3_LED3);
1527
1528 rxIntLoopCnt = 0; /* debug -baz */
1529
1530 i = sc->lmc_next_rx % LMC_RXDESCS;
1531 next_rx = sc->lmc_next_rx;
1532
1533 while (((stat = sc->lmc_rxring[i].status) & LMC_RDES_OWN_BIT) != DESC_OWNED_BY_DC21X4)
1534 {
1535 rxIntLoopCnt++; /* debug -baz */
1536 len = ((stat & LMC_RDES_FRAME_LENGTH) >> RDES_FRAME_LENGTH_BIT_NUMBER);
1537 if ((stat & 0x0300) != 0x0300) { /* Check first segment and last segment */
1538 if ((stat & 0x0000ffff) != 0x7fff) {
1539 /* Oversized frame */
1540 sc->lmc_device->stats.rx_length_errors++;
1541 goto skip_packet;
1542 }
1543 }
1544
1545 if (stat & 0x00000008) { /* Catch a dribbling bit error */
1546 sc->lmc_device->stats.rx_errors++;
1547 sc->lmc_device->stats.rx_frame_errors++;
1548 goto skip_packet;
1549 }
1550
1551
1552 if (stat & 0x00000004) { /* Catch a CRC error by the Xilinx */
1553 sc->lmc_device->stats.rx_errors++;
1554 sc->lmc_device->stats.rx_crc_errors++;
1555 goto skip_packet;
1556 }
1557
1558 if (len > LMC_PKT_BUF_SZ) {
1559 sc->lmc_device->stats.rx_length_errors++;
1560 localLengthErrCnt++;
1561 goto skip_packet;
1562 }
1563
1564 if (len < sc->lmc_crcSize + 2) {
1565 sc->lmc_device->stats.rx_length_errors++;
1566 sc->extra_stats.rx_SmallPktCnt++;
1567 localLengthErrCnt++;
1568 goto skip_packet;
1569 }
1570
1571 if(stat & 0x00004000){
1572 printk(KERN_WARNING "%s: Receiver descriptor error, receiver out of sync?\n", dev->name);
1573 }
1574
1575 len -= sc->lmc_crcSize;
1576
1577 skb = sc->lmc_rxq[i];
1578
1579 /*
1580 * We ran out of memory at some point
1581 * just allocate an skb buff and continue.
1582 */
1583
1584 if (!skb) {
1585 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1586 if (nsb) {
1587 sc->lmc_rxq[i] = nsb;
1588 nsb->dev = dev;
1589 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1590 }
1591 sc->failed_recv_alloc = 1;
1592 goto skip_packet;
1593 }
1594
1595 sc->lmc_device->stats.rx_packets++;
1596 sc->lmc_device->stats.rx_bytes += len;
1597
1598 LMC_CONSOLE_LOG("recv", skb->data, len);
1599
1600 /*
1601 * I'm not sure of the sanity of this
1602 * Packets could be arriving at a constant
1603 * 44.210mbits/sec and we're going to copy
1604 * them into a new buffer??
1605 */
1606
1607 if(len > (LMC_MTU - (LMC_MTU>>2))){ /* len > LMC_MTU * 0.75 */
1608 /*
1609 * If it's a large packet don't copy it just hand it up
1610 */
1611 give_it_anyways:
1612
1613 sc->lmc_rxq[i] = NULL;
1614 sc->lmc_rxring[i].buffer1 = 0x0;
1615
1616 skb_put (skb, len);
1617 skb->protocol = lmc_proto_type(sc, skb);
1618 skb_reset_mac_header(skb);
1619 /* skb_reset_network_header(skb); */
1620 skb->dev = dev;
1621 lmc_proto_netif(sc, skb);
1622
1623 /*
1624 * This skb will be destroyed by the upper layers, make a new one
1625 */
1626 nsb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1627 if (nsb) {
1628 sc->lmc_rxq[i] = nsb;
1629 nsb->dev = dev;
1630 sc->lmc_rxring[i].buffer1 = virt_to_bus(skb_tail_pointer(nsb));
1631 /* Transferred to 21140 below */
1632 }
1633 else {
1634 /*
1635 * We've run out of memory, stop trying to allocate
1636 * memory and exit the interrupt handler
1637 *
1638 * The chip may run out of receivers and stop
1639 * in which care we'll try to allocate the buffer
1640 * again. (once a second)
1641 */
1642 sc->extra_stats.rx_BuffAllocErr++;
1643 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1644 sc->failed_recv_alloc = 1;
1645 goto skip_out_of_mem;
1646 }
1647 }
1648 else {
1649 nsb = dev_alloc_skb(len);
1650 if(!nsb) {
1651 goto give_it_anyways;
1652 }
1653 skb_copy_from_linear_data(skb, skb_put(nsb, len), len);
1654
1655 nsb->protocol = lmc_proto_type(sc, nsb);
1656 skb_reset_mac_header(nsb);
1657 /* skb_reset_network_header(nsb); */
1658 nsb->dev = dev;
1659 lmc_proto_netif(sc, nsb);
1660 }
1661
1662 skip_packet:
1663 LMC_EVENT_LOG(LMC_EVENT_RCVINT, stat, len);
1664 sc->lmc_rxring[i].status = DESC_OWNED_BY_DC21X4;
1665
1666 sc->lmc_next_rx++;
1667 i = sc->lmc_next_rx % LMC_RXDESCS;
1668 rx_work_limit--;
1669 if (rx_work_limit < 0)
1670 break;
1671 }
1672
1673 /* detect condition for LMC1000 where DSU cable attaches and fills
1674 * descriptors with bogus packets
1675 *
1676 if (localLengthErrCnt > LMC_RXDESCS - 3) {
1677 sc->extra_stats.rx_BadPktSurgeCnt++;
1678 LMC_EVENT_LOG(LMC_EVENT_BADPKTSURGE, localLengthErrCnt,
1679 sc->extra_stats.rx_BadPktSurgeCnt);
1680 } */
1681
1682 /* save max count of receive descriptors serviced */
1683 if (rxIntLoopCnt > sc->extra_stats.rxIntLoopCnt)
1684 sc->extra_stats.rxIntLoopCnt = rxIntLoopCnt; /* debug -baz */
1685
1686 #ifdef DEBUG
1687 if (rxIntLoopCnt == 0)
1688 {
1689 for (i = 0; i < LMC_RXDESCS; i++)
1690 {
1691 if ((sc->lmc_rxring[i].status & LMC_RDES_OWN_BIT)
1692 != DESC_OWNED_BY_DC21X4)
1693 {
1694 rxIntLoopCnt++;
1695 }
1696 }
1697 LMC_EVENT_LOG(LMC_EVENT_RCVEND, rxIntLoopCnt, 0);
1698 }
1699 #endif
1700
1701
1702 lmc_led_off(sc, LMC_DS3_LED3);
1703
1704 skip_out_of_mem:
1705
1706 lmc_trace(dev, "lmc_rx out");
1707
1708 return 0;
1709 }
1710
lmc_get_stats(struct net_device * dev)1711 static struct net_device_stats *lmc_get_stats(struct net_device *dev)
1712 {
1713 lmc_softc_t *sc = dev_to_sc(dev);
1714 unsigned long flags;
1715
1716 lmc_trace(dev, "lmc_get_stats in");
1717
1718 spin_lock_irqsave(&sc->lmc_lock, flags);
1719
1720 sc->lmc_device->stats.rx_missed_errors += LMC_CSR_READ(sc, csr_missed_frames) & 0xffff;
1721
1722 spin_unlock_irqrestore(&sc->lmc_lock, flags);
1723
1724 lmc_trace(dev, "lmc_get_stats out");
1725
1726 return &sc->lmc_device->stats;
1727 }
1728
1729 static struct pci_driver lmc_driver = {
1730 .name = "lmc",
1731 .id_table = lmc_pci_tbl,
1732 .probe = lmc_init_one,
1733 .remove = lmc_remove_one,
1734 };
1735
1736 module_pci_driver(lmc_driver);
1737
lmc_mii_readreg(lmc_softc_t * const sc,unsigned devaddr,unsigned regno)1738 unsigned lmc_mii_readreg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno) /*fold00*/
1739 {
1740 int i;
1741 int command = (0xf6 << 10) | (devaddr << 5) | regno;
1742 int retval = 0;
1743
1744 lmc_trace(sc->lmc_device, "lmc_mii_readreg in");
1745
1746 LMC_MII_SYNC (sc);
1747
1748 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done sync");
1749
1750 for (i = 15; i >= 0; i--)
1751 {
1752 int dataval = (command & (1 << i)) ? 0x20000 : 0;
1753
1754 LMC_CSR_WRITE (sc, csr_9, dataval);
1755 lmc_delay ();
1756 /* __SLOW_DOWN_IO; */
1757 LMC_CSR_WRITE (sc, csr_9, dataval | 0x10000);
1758 lmc_delay ();
1759 /* __SLOW_DOWN_IO; */
1760 }
1761
1762 lmc_trace(sc->lmc_device, "lmc_mii_readreg: done1");
1763
1764 for (i = 19; i > 0; i--)
1765 {
1766 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1767 lmc_delay ();
1768 /* __SLOW_DOWN_IO; */
1769 retval = (retval << 1) | ((LMC_CSR_READ (sc, csr_9) & 0x80000) ? 1 : 0);
1770 LMC_CSR_WRITE (sc, csr_9, 0x40000 | 0x10000);
1771 lmc_delay ();
1772 /* __SLOW_DOWN_IO; */
1773 }
1774
1775 lmc_trace(sc->lmc_device, "lmc_mii_readreg out");
1776
1777 return (retval >> 1) & 0xffff;
1778 }
1779
lmc_mii_writereg(lmc_softc_t * const sc,unsigned devaddr,unsigned regno,unsigned data)1780 void lmc_mii_writereg (lmc_softc_t * const sc, unsigned devaddr, unsigned regno, unsigned data) /*fold00*/
1781 {
1782 int i = 32;
1783 int command = (0x5002 << 16) | (devaddr << 23) | (regno << 18) | data;
1784
1785 lmc_trace(sc->lmc_device, "lmc_mii_writereg in");
1786
1787 LMC_MII_SYNC (sc);
1788
1789 i = 31;
1790 while (i >= 0)
1791 {
1792 int datav;
1793
1794 if (command & (1 << i))
1795 datav = 0x20000;
1796 else
1797 datav = 0x00000;
1798
1799 LMC_CSR_WRITE (sc, csr_9, datav);
1800 lmc_delay ();
1801 /* __SLOW_DOWN_IO; */
1802 LMC_CSR_WRITE (sc, csr_9, (datav | 0x10000));
1803 lmc_delay ();
1804 /* __SLOW_DOWN_IO; */
1805 i--;
1806 }
1807
1808 i = 2;
1809 while (i > 0)
1810 {
1811 LMC_CSR_WRITE (sc, csr_9, 0x40000);
1812 lmc_delay ();
1813 /* __SLOW_DOWN_IO; */
1814 LMC_CSR_WRITE (sc, csr_9, 0x50000);
1815 lmc_delay ();
1816 /* __SLOW_DOWN_IO; */
1817 i--;
1818 }
1819
1820 lmc_trace(sc->lmc_device, "lmc_mii_writereg out");
1821 }
1822
lmc_softreset(lmc_softc_t * const sc)1823 static void lmc_softreset (lmc_softc_t * const sc) /*fold00*/
1824 {
1825 int i;
1826
1827 lmc_trace(sc->lmc_device, "lmc_softreset in");
1828
1829 /* Initialize the receive rings and buffers. */
1830 sc->lmc_txfull = 0;
1831 sc->lmc_next_rx = 0;
1832 sc->lmc_next_tx = 0;
1833 sc->lmc_taint_rx = 0;
1834 sc->lmc_taint_tx = 0;
1835
1836 /*
1837 * Setup each one of the receiver buffers
1838 * allocate an skbuff for each one, setup the descriptor table
1839 * and point each buffer at the next one
1840 */
1841
1842 for (i = 0; i < LMC_RXDESCS; i++)
1843 {
1844 struct sk_buff *skb;
1845
1846 if (sc->lmc_rxq[i] == NULL)
1847 {
1848 skb = dev_alloc_skb (LMC_PKT_BUF_SZ + 2);
1849 if(skb == NULL){
1850 printk(KERN_WARNING "%s: Failed to allocate receiver ring, will try again\n", sc->name);
1851 sc->failed_ring = 1;
1852 break;
1853 }
1854 else{
1855 sc->lmc_rxq[i] = skb;
1856 }
1857 }
1858 else
1859 {
1860 skb = sc->lmc_rxq[i];
1861 }
1862
1863 skb->dev = sc->lmc_device;
1864
1865 /* owned by 21140 */
1866 sc->lmc_rxring[i].status = 0x80000000;
1867
1868 /* used to be PKT_BUF_SZ now uses skb since we lose some to head room */
1869 sc->lmc_rxring[i].length = skb_tailroom(skb);
1870
1871 /* use to be tail which is dumb since you're thinking why write
1872 * to the end of the packj,et but since there's nothing there tail == data
1873 */
1874 sc->lmc_rxring[i].buffer1 = virt_to_bus (skb->data);
1875
1876 /* This is fair since the structure is static and we have the next address */
1877 sc->lmc_rxring[i].buffer2 = virt_to_bus (&sc->lmc_rxring[i + 1]);
1878
1879 }
1880
1881 /*
1882 * Sets end of ring
1883 */
1884 if (i != 0) {
1885 sc->lmc_rxring[i - 1].length |= 0x02000000; /* Set end of buffers flag */
1886 sc->lmc_rxring[i - 1].buffer2 = virt_to_bus(&sc->lmc_rxring[0]); /* Point back to the start */
1887 }
1888 LMC_CSR_WRITE (sc, csr_rxlist, virt_to_bus (sc->lmc_rxring)); /* write base address */
1889
1890 /* Initialize the transmit rings and buffers */
1891 for (i = 0; i < LMC_TXDESCS; i++)
1892 {
1893 if (sc->lmc_txq[i] != NULL){ /* have buffer */
1894 dev_kfree_skb(sc->lmc_txq[i]); /* free it */
1895 sc->lmc_device->stats.tx_dropped++; /* We just dropped a packet */
1896 }
1897 sc->lmc_txq[i] = NULL;
1898 sc->lmc_txring[i].status = 0x00000000;
1899 sc->lmc_txring[i].buffer2 = virt_to_bus (&sc->lmc_txring[i + 1]);
1900 }
1901 sc->lmc_txring[i - 1].buffer2 = virt_to_bus (&sc->lmc_txring[0]);
1902 LMC_CSR_WRITE (sc, csr_txlist, virt_to_bus (sc->lmc_txring));
1903
1904 lmc_trace(sc->lmc_device, "lmc_softreset out");
1905 }
1906
lmc_gpio_mkinput(lmc_softc_t * const sc,u32 bits)1907 void lmc_gpio_mkinput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1908 {
1909 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput in");
1910 sc->lmc_gpio_io &= ~bits;
1911 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1912 lmc_trace(sc->lmc_device, "lmc_gpio_mkinput out");
1913 }
1914
lmc_gpio_mkoutput(lmc_softc_t * const sc,u32 bits)1915 void lmc_gpio_mkoutput(lmc_softc_t * const sc, u32 bits) /*fold00*/
1916 {
1917 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput in");
1918 sc->lmc_gpio_io |= bits;
1919 LMC_CSR_WRITE(sc, csr_gp, TULIP_GP_PINSET | (sc->lmc_gpio_io));
1920 lmc_trace(sc->lmc_device, "lmc_gpio_mkoutput out");
1921 }
1922
lmc_led_on(lmc_softc_t * const sc,u32 led)1923 void lmc_led_on(lmc_softc_t * const sc, u32 led) /*fold00*/
1924 {
1925 lmc_trace(sc->lmc_device, "lmc_led_on in");
1926 if((~sc->lmc_miireg16) & led){ /* Already on! */
1927 lmc_trace(sc->lmc_device, "lmc_led_on aon out");
1928 return;
1929 }
1930
1931 sc->lmc_miireg16 &= ~led;
1932 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1933 lmc_trace(sc->lmc_device, "lmc_led_on out");
1934 }
1935
lmc_led_off(lmc_softc_t * const sc,u32 led)1936 void lmc_led_off(lmc_softc_t * const sc, u32 led) /*fold00*/
1937 {
1938 lmc_trace(sc->lmc_device, "lmc_led_off in");
1939 if(sc->lmc_miireg16 & led){ /* Already set don't do anything */
1940 lmc_trace(sc->lmc_device, "lmc_led_off aoff out");
1941 return;
1942 }
1943
1944 sc->lmc_miireg16 |= led;
1945 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1946 lmc_trace(sc->lmc_device, "lmc_led_off out");
1947 }
1948
lmc_reset(lmc_softc_t * const sc)1949 static void lmc_reset(lmc_softc_t * const sc) /*fold00*/
1950 {
1951 lmc_trace(sc->lmc_device, "lmc_reset in");
1952 sc->lmc_miireg16 |= LMC_MII16_FIFO_RESET;
1953 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1954
1955 sc->lmc_miireg16 &= ~LMC_MII16_FIFO_RESET;
1956 lmc_mii_writereg(sc, 0, 16, sc->lmc_miireg16);
1957
1958 /*
1959 * make some of the GPIO pins be outputs
1960 */
1961 lmc_gpio_mkoutput(sc, LMC_GEP_RESET);
1962
1963 /*
1964 * RESET low to force state reset. This also forces
1965 * the transmitter clock to be internal, but we expect to reset
1966 * that later anyway.
1967 */
1968 sc->lmc_gpio &= ~(LMC_GEP_RESET);
1969 LMC_CSR_WRITE(sc, csr_gp, sc->lmc_gpio);
1970
1971 /*
1972 * hold for more than 10 microseconds
1973 */
1974 udelay(50);
1975
1976 /*
1977 * stop driving Xilinx-related signals
1978 */
1979 lmc_gpio_mkinput(sc, LMC_GEP_RESET);
1980
1981 /*
1982 * Call media specific init routine
1983 */
1984 sc->lmc_media->init(sc);
1985
1986 sc->extra_stats.resetCount++;
1987 lmc_trace(sc->lmc_device, "lmc_reset out");
1988 }
1989
lmc_dec_reset(lmc_softc_t * const sc)1990 static void lmc_dec_reset(lmc_softc_t * const sc) /*fold00*/
1991 {
1992 u32 val;
1993 lmc_trace(sc->lmc_device, "lmc_dec_reset in");
1994
1995 /*
1996 * disable all interrupts
1997 */
1998 sc->lmc_intrmask = 0;
1999 LMC_CSR_WRITE(sc, csr_intr, sc->lmc_intrmask);
2000
2001 /*
2002 * Reset the chip with a software reset command.
2003 * Wait 10 microseconds (actually 50 PCI cycles but at
2004 * 33MHz that comes to two microseconds but wait a
2005 * bit longer anyways)
2006 */
2007 LMC_CSR_WRITE(sc, csr_busmode, TULIP_BUSMODE_SWRESET);
2008 udelay(25);
2009 #ifdef __sparc__
2010 sc->lmc_busmode = LMC_CSR_READ(sc, csr_busmode);
2011 sc->lmc_busmode = 0x00100000;
2012 sc->lmc_busmode &= ~TULIP_BUSMODE_SWRESET;
2013 LMC_CSR_WRITE(sc, csr_busmode, sc->lmc_busmode);
2014 #endif
2015 sc->lmc_cmdmode = LMC_CSR_READ(sc, csr_command);
2016
2017 /*
2018 * We want:
2019 * no ethernet address in frames we write
2020 * disable padding (txdesc, padding disable)
2021 * ignore runt frames (rdes0 bit 15)
2022 * no receiver watchdog or transmitter jabber timer
2023 * (csr15 bit 0,14 == 1)
2024 * if using 16-bit CRC, turn off CRC (trans desc, crc disable)
2025 */
2026
2027 sc->lmc_cmdmode |= ( TULIP_CMD_PROMISCUOUS
2028 | TULIP_CMD_FULLDUPLEX
2029 | TULIP_CMD_PASSBADPKT
2030 | TULIP_CMD_NOHEARTBEAT
2031 | TULIP_CMD_PORTSELECT
2032 | TULIP_CMD_RECEIVEALL
2033 | TULIP_CMD_MUSTBEONE
2034 );
2035 sc->lmc_cmdmode &= ~( TULIP_CMD_OPERMODE
2036 | TULIP_CMD_THRESHOLDCTL
2037 | TULIP_CMD_STOREFWD
2038 | TULIP_CMD_TXTHRSHLDCTL
2039 );
2040
2041 LMC_CSR_WRITE(sc, csr_command, sc->lmc_cmdmode);
2042
2043 /*
2044 * disable receiver watchdog and transmit jabber
2045 */
2046 val = LMC_CSR_READ(sc, csr_sia_general);
2047 val |= (TULIP_WATCHDOG_TXDISABLE | TULIP_WATCHDOG_RXDISABLE);
2048 LMC_CSR_WRITE(sc, csr_sia_general, val);
2049
2050 lmc_trace(sc->lmc_device, "lmc_dec_reset out");
2051 }
2052
lmc_initcsrs(lmc_softc_t * const sc,lmc_csrptr_t csr_base,size_t csr_size)2053 static void lmc_initcsrs(lmc_softc_t * const sc, lmc_csrptr_t csr_base, /*fold00*/
2054 size_t csr_size)
2055 {
2056 lmc_trace(sc->lmc_device, "lmc_initcsrs in");
2057 sc->lmc_csrs.csr_busmode = csr_base + 0 * csr_size;
2058 sc->lmc_csrs.csr_txpoll = csr_base + 1 * csr_size;
2059 sc->lmc_csrs.csr_rxpoll = csr_base + 2 * csr_size;
2060 sc->lmc_csrs.csr_rxlist = csr_base + 3 * csr_size;
2061 sc->lmc_csrs.csr_txlist = csr_base + 4 * csr_size;
2062 sc->lmc_csrs.csr_status = csr_base + 5 * csr_size;
2063 sc->lmc_csrs.csr_command = csr_base + 6 * csr_size;
2064 sc->lmc_csrs.csr_intr = csr_base + 7 * csr_size;
2065 sc->lmc_csrs.csr_missed_frames = csr_base + 8 * csr_size;
2066 sc->lmc_csrs.csr_9 = csr_base + 9 * csr_size;
2067 sc->lmc_csrs.csr_10 = csr_base + 10 * csr_size;
2068 sc->lmc_csrs.csr_11 = csr_base + 11 * csr_size;
2069 sc->lmc_csrs.csr_12 = csr_base + 12 * csr_size;
2070 sc->lmc_csrs.csr_13 = csr_base + 13 * csr_size;
2071 sc->lmc_csrs.csr_14 = csr_base + 14 * csr_size;
2072 sc->lmc_csrs.csr_15 = csr_base + 15 * csr_size;
2073 lmc_trace(sc->lmc_device, "lmc_initcsrs out");
2074 }
2075
lmc_driver_timeout(struct net_device * dev)2076 static void lmc_driver_timeout(struct net_device *dev)
2077 {
2078 lmc_softc_t *sc = dev_to_sc(dev);
2079 u32 csr6;
2080 unsigned long flags;
2081
2082 lmc_trace(dev, "lmc_driver_timeout in");
2083
2084 spin_lock_irqsave(&sc->lmc_lock, flags);
2085
2086 printk("%s: Xmitter busy|\n", dev->name);
2087
2088 sc->extra_stats.tx_tbusy_calls++;
2089 if (jiffies - dev_trans_start(dev) < TX_TIMEOUT)
2090 goto bug_out;
2091
2092 /*
2093 * Chip seems to have locked up
2094 * Reset it
2095 * This whips out all our decriptor
2096 * table and starts from scartch
2097 */
2098
2099 LMC_EVENT_LOG(LMC_EVENT_XMTPRCTMO,
2100 LMC_CSR_READ (sc, csr_status),
2101 sc->extra_stats.tx_ProcTimeout);
2102
2103 lmc_running_reset (dev);
2104
2105 LMC_EVENT_LOG(LMC_EVENT_RESET1, LMC_CSR_READ (sc, csr_status), 0);
2106 LMC_EVENT_LOG(LMC_EVENT_RESET2,
2107 lmc_mii_readreg (sc, 0, 16),
2108 lmc_mii_readreg (sc, 0, 17));
2109
2110 /* restart the tx processes */
2111 csr6 = LMC_CSR_READ (sc, csr_command);
2112 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x0002);
2113 LMC_CSR_WRITE (sc, csr_command, csr6 | 0x2002);
2114
2115 /* immediate transmit */
2116 LMC_CSR_WRITE (sc, csr_txpoll, 0);
2117
2118 sc->lmc_device->stats.tx_errors++;
2119 sc->extra_stats.tx_ProcTimeout++; /* -baz */
2120
2121 dev->trans_start = jiffies; /* prevent tx timeout */
2122
2123 bug_out:
2124
2125 spin_unlock_irqrestore(&sc->lmc_lock, flags);
2126
2127 lmc_trace(dev, "lmc_driver_timeout out");
2128
2129
2130 }
2131