1/* 2 * This file is part of the Chelsio T4 Ethernet driver for Linux. 3 * 4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 */ 34 35#include <linux/seq_file.h> 36#include <linux/debugfs.h> 37#include <linux/string_helpers.h> 38#include <linux/sort.h> 39#include <linux/ctype.h> 40 41#include "cxgb4.h" 42#include "t4_regs.h" 43#include "t4_values.h" 44#include "t4fw_api.h" 45#include "cxgb4_debugfs.h" 46#include "clip_tbl.h" 47#include "l2t.h" 48 49/* generic seq_file support for showing a table of size rows x width. */ 50static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos) 51{ 52 pos -= tb->skip_first; 53 return pos >= tb->rows ? NULL : &tb->data[pos * tb->width]; 54} 55 56static void *seq_tab_start(struct seq_file *seq, loff_t *pos) 57{ 58 struct seq_tab *tb = seq->private; 59 60 if (tb->skip_first && *pos == 0) 61 return SEQ_START_TOKEN; 62 63 return seq_tab_get_idx(tb, *pos); 64} 65 66static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos) 67{ 68 v = seq_tab_get_idx(seq->private, *pos + 1); 69 if (v) 70 ++*pos; 71 return v; 72} 73 74static void seq_tab_stop(struct seq_file *seq, void *v) 75{ 76} 77 78static int seq_tab_show(struct seq_file *seq, void *v) 79{ 80 const struct seq_tab *tb = seq->private; 81 82 return tb->show(seq, v, ((char *)v - tb->data) / tb->width); 83} 84 85static const struct seq_operations seq_tab_ops = { 86 .start = seq_tab_start, 87 .next = seq_tab_next, 88 .stop = seq_tab_stop, 89 .show = seq_tab_show 90}; 91 92struct seq_tab *seq_open_tab(struct file *f, unsigned int rows, 93 unsigned int width, unsigned int have_header, 94 int (*show)(struct seq_file *seq, void *v, int i)) 95{ 96 struct seq_tab *p; 97 98 p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width); 99 if (p) { 100 p->show = show; 101 p->rows = rows; 102 p->width = width; 103 p->skip_first = have_header != 0; 104 } 105 return p; 106} 107 108/* Trim the size of a seq_tab to the supplied number of rows. The operation is 109 * irreversible. 110 */ 111static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows) 112{ 113 if (new_rows > p->rows) 114 return -EINVAL; 115 p->rows = new_rows; 116 return 0; 117} 118 119static int cim_la_show(struct seq_file *seq, void *v, int idx) 120{ 121 if (v == SEQ_START_TOKEN) 122 seq_puts(seq, "Status Data PC LS0Stat LS0Addr " 123 " LS0Data\n"); 124 else { 125 const u32 *p = v; 126 127 seq_printf(seq, 128 " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n", 129 (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4, 130 p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5], 131 p[6], p[7]); 132 } 133 return 0; 134} 135 136static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx) 137{ 138 if (v == SEQ_START_TOKEN) { 139 seq_puts(seq, "Status Data PC\n"); 140 } else { 141 const u32 *p = v; 142 143 seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6], 144 p[7]); 145 seq_printf(seq, " %02x %02x%06x %02x%06x\n", 146 (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8, 147 p[4] & 0xff, p[5] >> 8); 148 seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff, 149 p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4); 150 } 151 return 0; 152} 153 154static int cim_la_show_t6(struct seq_file *seq, void *v, int idx) 155{ 156 if (v == SEQ_START_TOKEN) { 157 seq_puts(seq, "Status Inst Data PC LS0Stat " 158 "LS0Addr LS0Data LS1Stat LS1Addr LS1Data\n"); 159 } else { 160 const u32 *p = v; 161 162 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x %08x %08x %08x %08x %08x %08x\n", 163 (p[9] >> 16) & 0xff, /* Status */ 164 p[9] & 0xffff, p[8] >> 16, /* Inst */ 165 p[8] & 0xffff, p[7] >> 16, /* Data */ 166 p[7] & 0xffff, p[6] >> 16, /* PC */ 167 p[2], p[1], p[0], /* LS0 Stat, Addr and Data */ 168 p[5], p[4], p[3]); /* LS1 Stat, Addr and Data */ 169 } 170 return 0; 171} 172 173static int cim_la_show_pc_t6(struct seq_file *seq, void *v, int idx) 174{ 175 if (v == SEQ_START_TOKEN) { 176 seq_puts(seq, "Status Inst Data PC\n"); 177 } else { 178 const u32 *p = v; 179 180 seq_printf(seq, " %02x %08x %08x %08x\n", 181 p[3] & 0xff, p[2], p[1], p[0]); 182 seq_printf(seq, " %02x %02x%06x %02x%06x %02x%06x\n", 183 (p[6] >> 8) & 0xff, p[6] & 0xff, p[5] >> 8, 184 p[5] & 0xff, p[4] >> 8, p[4] & 0xff, p[3] >> 8); 185 seq_printf(seq, " %02x %04x%04x %04x%04x %04x%04x\n", 186 (p[9] >> 16) & 0xff, p[9] & 0xffff, p[8] >> 16, 187 p[8] & 0xffff, p[7] >> 16, p[7] & 0xffff, 188 p[6] >> 16); 189 } 190 return 0; 191} 192 193static int cim_la_open(struct inode *inode, struct file *file) 194{ 195 int ret; 196 unsigned int cfg; 197 struct seq_tab *p; 198 struct adapter *adap = inode->i_private; 199 200 ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg); 201 if (ret) 202 return ret; 203 204 if (is_t6(adap->params.chip)) { 205 /* +1 to account for integer division of CIMLA_SIZE/10 */ 206 p = seq_open_tab(file, (adap->params.cim_la_size / 10) + 1, 207 10 * sizeof(u32), 1, 208 cfg & UPDBGLACAPTPCONLY_F ? 209 cim_la_show_pc_t6 : cim_la_show_t6); 210 } else { 211 p = seq_open_tab(file, adap->params.cim_la_size / 8, 212 8 * sizeof(u32), 1, 213 cfg & UPDBGLACAPTPCONLY_F ? cim_la_show_3in1 : 214 cim_la_show); 215 } 216 if (!p) 217 return -ENOMEM; 218 219 ret = t4_cim_read_la(adap, (u32 *)p->data, NULL); 220 if (ret) 221 seq_release_private(inode, file); 222 return ret; 223} 224 225static const struct file_operations cim_la_fops = { 226 .owner = THIS_MODULE, 227 .open = cim_la_open, 228 .read = seq_read, 229 .llseek = seq_lseek, 230 .release = seq_release_private 231}; 232 233static int cim_pif_la_show(struct seq_file *seq, void *v, int idx) 234{ 235 const u32 *p = v; 236 237 if (v == SEQ_START_TOKEN) { 238 seq_puts(seq, "Cntl ID DataBE Addr Data\n"); 239 } else if (idx < CIM_PIFLA_SIZE) { 240 seq_printf(seq, " %02x %02x %04x %08x %08x%08x%08x%08x\n", 241 (p[5] >> 22) & 0xff, (p[5] >> 16) & 0x3f, 242 p[5] & 0xffff, p[4], p[3], p[2], p[1], p[0]); 243 } else { 244 if (idx == CIM_PIFLA_SIZE) 245 seq_puts(seq, "\nCntl ID Data\n"); 246 seq_printf(seq, " %02x %02x %08x%08x%08x%08x\n", 247 (p[4] >> 6) & 0xff, p[4] & 0x3f, 248 p[3], p[2], p[1], p[0]); 249 } 250 return 0; 251} 252 253static int cim_pif_la_open(struct inode *inode, struct file *file) 254{ 255 struct seq_tab *p; 256 struct adapter *adap = inode->i_private; 257 258 p = seq_open_tab(file, 2 * CIM_PIFLA_SIZE, 6 * sizeof(u32), 1, 259 cim_pif_la_show); 260 if (!p) 261 return -ENOMEM; 262 263 t4_cim_read_pif_la(adap, (u32 *)p->data, 264 (u32 *)p->data + 6 * CIM_PIFLA_SIZE, NULL, NULL); 265 return 0; 266} 267 268static const struct file_operations cim_pif_la_fops = { 269 .owner = THIS_MODULE, 270 .open = cim_pif_la_open, 271 .read = seq_read, 272 .llseek = seq_lseek, 273 .release = seq_release_private 274}; 275 276static int cim_ma_la_show(struct seq_file *seq, void *v, int idx) 277{ 278 const u32 *p = v; 279 280 if (v == SEQ_START_TOKEN) { 281 seq_puts(seq, "\n"); 282 } else if (idx < CIM_MALA_SIZE) { 283 seq_printf(seq, "%02x%08x%08x%08x%08x\n", 284 p[4], p[3], p[2], p[1], p[0]); 285 } else { 286 if (idx == CIM_MALA_SIZE) 287 seq_puts(seq, 288 "\nCnt ID Tag UE Data RDY VLD\n"); 289 seq_printf(seq, "%3u %2u %x %u %08x%08x %u %u\n", 290 (p[2] >> 10) & 0xff, (p[2] >> 7) & 7, 291 (p[2] >> 3) & 0xf, (p[2] >> 2) & 1, 292 (p[1] >> 2) | ((p[2] & 3) << 30), 293 (p[0] >> 2) | ((p[1] & 3) << 30), (p[0] >> 1) & 1, 294 p[0] & 1); 295 } 296 return 0; 297} 298 299static int cim_ma_la_open(struct inode *inode, struct file *file) 300{ 301 struct seq_tab *p; 302 struct adapter *adap = inode->i_private; 303 304 p = seq_open_tab(file, 2 * CIM_MALA_SIZE, 5 * sizeof(u32), 1, 305 cim_ma_la_show); 306 if (!p) 307 return -ENOMEM; 308 309 t4_cim_read_ma_la(adap, (u32 *)p->data, 310 (u32 *)p->data + 5 * CIM_MALA_SIZE); 311 return 0; 312} 313 314static const struct file_operations cim_ma_la_fops = { 315 .owner = THIS_MODULE, 316 .open = cim_ma_la_open, 317 .read = seq_read, 318 .llseek = seq_lseek, 319 .release = seq_release_private 320}; 321 322static int cim_qcfg_show(struct seq_file *seq, void *v) 323{ 324 static const char * const qname[] = { 325 "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI", 326 "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI", 327 "SGE0-RX", "SGE1-RX" 328 }; 329 330 int i; 331 struct adapter *adap = seq->private; 332 u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5]; 333 u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5]; 334 u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))]; 335 u16 thres[CIM_NUM_IBQ]; 336 u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr; 337 u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5]; 338 u32 *p = stat; 339 int cim_num_obq = is_t4(adap->params.chip) ? 340 CIM_NUM_OBQ : CIM_NUM_OBQ_T5; 341 342 i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A : 343 UP_IBQ_0_SHADOW_RDADDR_A, 344 ARRAY_SIZE(stat), stat); 345 if (!i) { 346 if (is_t4(adap->params.chip)) { 347 i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A, 348 ARRAY_SIZE(obq_wr_t4), obq_wr_t4); 349 wr = obq_wr_t4; 350 } else { 351 i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A, 352 ARRAY_SIZE(obq_wr_t5), obq_wr_t5); 353 wr = obq_wr_t5; 354 } 355 } 356 if (i) 357 return i; 358 359 t4_read_cimq_cfg(adap, base, size, thres); 360 361 seq_printf(seq, 362 " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n"); 363 for (i = 0; i < CIM_NUM_IBQ; i++, p += 4) 364 seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n", 365 qname[i], base[i], size[i], thres[i], 366 IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]), 367 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]), 368 QUEREMFLITS_G(p[2]) * 16); 369 for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2) 370 seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n", 371 qname[i], base[i], size[i], 372 QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i], 373 QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]), 374 QUEREMFLITS_G(p[2]) * 16); 375 return 0; 376} 377 378static int cim_qcfg_open(struct inode *inode, struct file *file) 379{ 380 return single_open(file, cim_qcfg_show, inode->i_private); 381} 382 383static const struct file_operations cim_qcfg_fops = { 384 .owner = THIS_MODULE, 385 .open = cim_qcfg_open, 386 .read = seq_read, 387 .llseek = seq_lseek, 388 .release = single_release, 389}; 390 391static int cimq_show(struct seq_file *seq, void *v, int idx) 392{ 393 const u32 *p = v; 394 395 seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1], 396 p[2], p[3]); 397 return 0; 398} 399 400static int cim_ibq_open(struct inode *inode, struct file *file) 401{ 402 int ret; 403 struct seq_tab *p; 404 unsigned int qid = (uintptr_t)inode->i_private & 7; 405 struct adapter *adap = inode->i_private - qid; 406 407 p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show); 408 if (!p) 409 return -ENOMEM; 410 411 ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4); 412 if (ret < 0) 413 seq_release_private(inode, file); 414 else 415 ret = 0; 416 return ret; 417} 418 419static const struct file_operations cim_ibq_fops = { 420 .owner = THIS_MODULE, 421 .open = cim_ibq_open, 422 .read = seq_read, 423 .llseek = seq_lseek, 424 .release = seq_release_private 425}; 426 427static int cim_obq_open(struct inode *inode, struct file *file) 428{ 429 int ret; 430 struct seq_tab *p; 431 unsigned int qid = (uintptr_t)inode->i_private & 7; 432 struct adapter *adap = inode->i_private - qid; 433 434 p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show); 435 if (!p) 436 return -ENOMEM; 437 438 ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4); 439 if (ret < 0) { 440 seq_release_private(inode, file); 441 } else { 442 seq_tab_trim(p, ret / 4); 443 ret = 0; 444 } 445 return ret; 446} 447 448static const struct file_operations cim_obq_fops = { 449 .owner = THIS_MODULE, 450 .open = cim_obq_open, 451 .read = seq_read, 452 .llseek = seq_lseek, 453 .release = seq_release_private 454}; 455 456struct field_desc { 457 const char *name; 458 unsigned int start; 459 unsigned int width; 460}; 461 462static void field_desc_show(struct seq_file *seq, u64 v, 463 const struct field_desc *p) 464{ 465 char buf[32]; 466 int line_size = 0; 467 468 while (p->name) { 469 u64 mask = (1ULL << p->width) - 1; 470 int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name, 471 ((unsigned long long)v >> p->start) & mask); 472 473 if (line_size + len >= 79) { 474 line_size = 8; 475 seq_puts(seq, "\n "); 476 } 477 seq_printf(seq, "%s ", buf); 478 line_size += len + 1; 479 p++; 480 } 481 seq_putc(seq, '\n'); 482} 483 484static struct field_desc tp_la0[] = { 485 { "RcfOpCodeOut", 60, 4 }, 486 { "State", 56, 4 }, 487 { "WcfState", 52, 4 }, 488 { "RcfOpcSrcOut", 50, 2 }, 489 { "CRxError", 49, 1 }, 490 { "ERxError", 48, 1 }, 491 { "SanityFailed", 47, 1 }, 492 { "SpuriousMsg", 46, 1 }, 493 { "FlushInputMsg", 45, 1 }, 494 { "FlushInputCpl", 44, 1 }, 495 { "RssUpBit", 43, 1 }, 496 { "RssFilterHit", 42, 1 }, 497 { "Tid", 32, 10 }, 498 { "InitTcb", 31, 1 }, 499 { "LineNumber", 24, 7 }, 500 { "Emsg", 23, 1 }, 501 { "EdataOut", 22, 1 }, 502 { "Cmsg", 21, 1 }, 503 { "CdataOut", 20, 1 }, 504 { "EreadPdu", 19, 1 }, 505 { "CreadPdu", 18, 1 }, 506 { "TunnelPkt", 17, 1 }, 507 { "RcfPeerFin", 16, 1 }, 508 { "RcfReasonOut", 12, 4 }, 509 { "TxCchannel", 10, 2 }, 510 { "RcfTxChannel", 8, 2 }, 511 { "RxEchannel", 6, 2 }, 512 { "RcfRxChannel", 5, 1 }, 513 { "RcfDataOutSrdy", 4, 1 }, 514 { "RxDvld", 3, 1 }, 515 { "RxOoDvld", 2, 1 }, 516 { "RxCongestion", 1, 1 }, 517 { "TxCongestion", 0, 1 }, 518 { NULL } 519}; 520 521static int tp_la_show(struct seq_file *seq, void *v, int idx) 522{ 523 const u64 *p = v; 524 525 field_desc_show(seq, *p, tp_la0); 526 return 0; 527} 528 529static int tp_la_show2(struct seq_file *seq, void *v, int idx) 530{ 531 const u64 *p = v; 532 533 if (idx) 534 seq_putc(seq, '\n'); 535 field_desc_show(seq, p[0], tp_la0); 536 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL) 537 field_desc_show(seq, p[1], tp_la0); 538 return 0; 539} 540 541static int tp_la_show3(struct seq_file *seq, void *v, int idx) 542{ 543 static struct field_desc tp_la1[] = { 544 { "CplCmdIn", 56, 8 }, 545 { "CplCmdOut", 48, 8 }, 546 { "ESynOut", 47, 1 }, 547 { "EAckOut", 46, 1 }, 548 { "EFinOut", 45, 1 }, 549 { "ERstOut", 44, 1 }, 550 { "SynIn", 43, 1 }, 551 { "AckIn", 42, 1 }, 552 { "FinIn", 41, 1 }, 553 { "RstIn", 40, 1 }, 554 { "DataIn", 39, 1 }, 555 { "DataInVld", 38, 1 }, 556 { "PadIn", 37, 1 }, 557 { "RxBufEmpty", 36, 1 }, 558 { "RxDdp", 35, 1 }, 559 { "RxFbCongestion", 34, 1 }, 560 { "TxFbCongestion", 33, 1 }, 561 { "TxPktSumSrdy", 32, 1 }, 562 { "RcfUlpType", 28, 4 }, 563 { "Eread", 27, 1 }, 564 { "Ebypass", 26, 1 }, 565 { "Esave", 25, 1 }, 566 { "Static0", 24, 1 }, 567 { "Cread", 23, 1 }, 568 { "Cbypass", 22, 1 }, 569 { "Csave", 21, 1 }, 570 { "CPktOut", 20, 1 }, 571 { "RxPagePoolFull", 18, 2 }, 572 { "RxLpbkPkt", 17, 1 }, 573 { "TxLpbkPkt", 16, 1 }, 574 { "RxVfValid", 15, 1 }, 575 { "SynLearned", 14, 1 }, 576 { "SetDelEntry", 13, 1 }, 577 { "SetInvEntry", 12, 1 }, 578 { "CpcmdDvld", 11, 1 }, 579 { "CpcmdSave", 10, 1 }, 580 { "RxPstructsFull", 8, 2 }, 581 { "EpcmdDvld", 7, 1 }, 582 { "EpcmdFlush", 6, 1 }, 583 { "EpcmdTrimPrefix", 5, 1 }, 584 { "EpcmdTrimPostfix", 4, 1 }, 585 { "ERssIp4Pkt", 3, 1 }, 586 { "ERssIp6Pkt", 2, 1 }, 587 { "ERssTcpUdpPkt", 1, 1 }, 588 { "ERssFceFipPkt", 0, 1 }, 589 { NULL } 590 }; 591 static struct field_desc tp_la2[] = { 592 { "CplCmdIn", 56, 8 }, 593 { "MpsVfVld", 55, 1 }, 594 { "MpsPf", 52, 3 }, 595 { "MpsVf", 44, 8 }, 596 { "SynIn", 43, 1 }, 597 { "AckIn", 42, 1 }, 598 { "FinIn", 41, 1 }, 599 { "RstIn", 40, 1 }, 600 { "DataIn", 39, 1 }, 601 { "DataInVld", 38, 1 }, 602 { "PadIn", 37, 1 }, 603 { "RxBufEmpty", 36, 1 }, 604 { "RxDdp", 35, 1 }, 605 { "RxFbCongestion", 34, 1 }, 606 { "TxFbCongestion", 33, 1 }, 607 { "TxPktSumSrdy", 32, 1 }, 608 { "RcfUlpType", 28, 4 }, 609 { "Eread", 27, 1 }, 610 { "Ebypass", 26, 1 }, 611 { "Esave", 25, 1 }, 612 { "Static0", 24, 1 }, 613 { "Cread", 23, 1 }, 614 { "Cbypass", 22, 1 }, 615 { "Csave", 21, 1 }, 616 { "CPktOut", 20, 1 }, 617 { "RxPagePoolFull", 18, 2 }, 618 { "RxLpbkPkt", 17, 1 }, 619 { "TxLpbkPkt", 16, 1 }, 620 { "RxVfValid", 15, 1 }, 621 { "SynLearned", 14, 1 }, 622 { "SetDelEntry", 13, 1 }, 623 { "SetInvEntry", 12, 1 }, 624 { "CpcmdDvld", 11, 1 }, 625 { "CpcmdSave", 10, 1 }, 626 { "RxPstructsFull", 8, 2 }, 627 { "EpcmdDvld", 7, 1 }, 628 { "EpcmdFlush", 6, 1 }, 629 { "EpcmdTrimPrefix", 5, 1 }, 630 { "EpcmdTrimPostfix", 4, 1 }, 631 { "ERssIp4Pkt", 3, 1 }, 632 { "ERssIp6Pkt", 2, 1 }, 633 { "ERssTcpUdpPkt", 1, 1 }, 634 { "ERssFceFipPkt", 0, 1 }, 635 { NULL } 636 }; 637 const u64 *p = v; 638 639 if (idx) 640 seq_putc(seq, '\n'); 641 field_desc_show(seq, p[0], tp_la0); 642 if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL) 643 field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1); 644 return 0; 645} 646 647static int tp_la_open(struct inode *inode, struct file *file) 648{ 649 struct seq_tab *p; 650 struct adapter *adap = inode->i_private; 651 652 switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) { 653 case 2: 654 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0, 655 tp_la_show2); 656 break; 657 case 3: 658 p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0, 659 tp_la_show3); 660 break; 661 default: 662 p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show); 663 } 664 if (!p) 665 return -ENOMEM; 666 667 t4_tp_read_la(adap, (u64 *)p->data, NULL); 668 return 0; 669} 670 671static ssize_t tp_la_write(struct file *file, const char __user *buf, 672 size_t count, loff_t *pos) 673{ 674 int err; 675 char s[32]; 676 unsigned long val; 677 size_t size = min(sizeof(s) - 1, count); 678 struct adapter *adap = file_inode(file)->i_private; 679 680 if (copy_from_user(s, buf, size)) 681 return -EFAULT; 682 s[size] = '\0'; 683 err = kstrtoul(s, 0, &val); 684 if (err) 685 return err; 686 if (val > 0xffff) 687 return -EINVAL; 688 adap->params.tp.la_mask = val << 16; 689 t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U, 690 adap->params.tp.la_mask); 691 return count; 692} 693 694static const struct file_operations tp_la_fops = { 695 .owner = THIS_MODULE, 696 .open = tp_la_open, 697 .read = seq_read, 698 .llseek = seq_lseek, 699 .release = seq_release_private, 700 .write = tp_la_write 701}; 702 703static int ulprx_la_show(struct seq_file *seq, void *v, int idx) 704{ 705 const u32 *p = v; 706 707 if (v == SEQ_START_TOKEN) 708 seq_puts(seq, " Pcmd Type Message" 709 " Data\n"); 710 else 711 seq_printf(seq, "%08x%08x %4x %08x %08x%08x%08x%08x\n", 712 p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]); 713 return 0; 714} 715 716static int ulprx_la_open(struct inode *inode, struct file *file) 717{ 718 struct seq_tab *p; 719 struct adapter *adap = inode->i_private; 720 721 p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1, 722 ulprx_la_show); 723 if (!p) 724 return -ENOMEM; 725 726 t4_ulprx_read_la(adap, (u32 *)p->data); 727 return 0; 728} 729 730static const struct file_operations ulprx_la_fops = { 731 .owner = THIS_MODULE, 732 .open = ulprx_la_open, 733 .read = seq_read, 734 .llseek = seq_lseek, 735 .release = seq_release_private 736}; 737 738/* Show the PM memory stats. These stats include: 739 * 740 * TX: 741 * Read: memory read operation 742 * Write Bypass: cut-through 743 * Bypass + mem: cut-through and save copy 744 * 745 * RX: 746 * Read: memory read 747 * Write Bypass: cut-through 748 * Flush: payload trim or drop 749 */ 750static int pm_stats_show(struct seq_file *seq, void *v) 751{ 752 static const char * const tx_pm_stats[] = { 753 "Read:", "Write bypass:", "Write mem:", "Bypass + mem:" 754 }; 755 static const char * const rx_pm_stats[] = { 756 "Read:", "Write bypass:", "Write mem:", "Flush:" 757 }; 758 759 int i; 760 u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS]; 761 u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS]; 762 struct adapter *adap = seq->private; 763 764 t4_pmtx_get_stats(adap, tx_cnt, tx_cyc); 765 t4_pmrx_get_stats(adap, rx_cnt, rx_cyc); 766 767 seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes"); 768 for (i = 0; i < PM_NSTATS - 1; i++) 769 seq_printf(seq, "%-13s %10u %20llu\n", 770 tx_pm_stats[i], tx_cnt[i], tx_cyc[i]); 771 772 seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes"); 773 for (i = 0; i < PM_NSTATS - 1; i++) 774 seq_printf(seq, "%-13s %10u %20llu\n", 775 rx_pm_stats[i], rx_cnt[i], rx_cyc[i]); 776 return 0; 777} 778 779static int pm_stats_open(struct inode *inode, struct file *file) 780{ 781 return single_open(file, pm_stats_show, inode->i_private); 782} 783 784static ssize_t pm_stats_clear(struct file *file, const char __user *buf, 785 size_t count, loff_t *pos) 786{ 787 struct adapter *adap = file_inode(file)->i_private; 788 789 t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0); 790 t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0); 791 return count; 792} 793 794static const struct file_operations pm_stats_debugfs_fops = { 795 .owner = THIS_MODULE, 796 .open = pm_stats_open, 797 .read = seq_read, 798 .llseek = seq_lseek, 799 .release = single_release, 800 .write = pm_stats_clear 801}; 802 803static int tx_rate_show(struct seq_file *seq, void *v) 804{ 805 u64 nrate[NCHAN], orate[NCHAN]; 806 struct adapter *adap = seq->private; 807 808 t4_get_chan_txrate(adap, nrate, orate); 809 if (adap->params.arch.nchan == NCHAN) { 810 seq_puts(seq, " channel 0 channel 1 " 811 "channel 2 channel 3\n"); 812 seq_printf(seq, "NIC B/s: %10llu %10llu %10llu %10llu\n", 813 (unsigned long long)nrate[0], 814 (unsigned long long)nrate[1], 815 (unsigned long long)nrate[2], 816 (unsigned long long)nrate[3]); 817 seq_printf(seq, "Offload B/s: %10llu %10llu %10llu %10llu\n", 818 (unsigned long long)orate[0], 819 (unsigned long long)orate[1], 820 (unsigned long long)orate[2], 821 (unsigned long long)orate[3]); 822 } else { 823 seq_puts(seq, " channel 0 channel 1\n"); 824 seq_printf(seq, "NIC B/s: %10llu %10llu\n", 825 (unsigned long long)nrate[0], 826 (unsigned long long)nrate[1]); 827 seq_printf(seq, "Offload B/s: %10llu %10llu\n", 828 (unsigned long long)orate[0], 829 (unsigned long long)orate[1]); 830 } 831 return 0; 832} 833 834DEFINE_SIMPLE_DEBUGFS_FILE(tx_rate); 835 836static int cctrl_tbl_show(struct seq_file *seq, void *v) 837{ 838 static const char * const dec_fac[] = { 839 "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875", 840 "0.9375" }; 841 842 int i; 843 u16 (*incr)[NCCTRL_WIN]; 844 struct adapter *adap = seq->private; 845 846 incr = kmalloc(sizeof(*incr) * NMTUS, GFP_KERNEL); 847 if (!incr) 848 return -ENOMEM; 849 850 t4_read_cong_tbl(adap, incr); 851 852 for (i = 0; i < NCCTRL_WIN; ++i) { 853 seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i, 854 incr[0][i], incr[1][i], incr[2][i], incr[3][i], 855 incr[4][i], incr[5][i], incr[6][i], incr[7][i]); 856 seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n", 857 incr[8][i], incr[9][i], incr[10][i], incr[11][i], 858 incr[12][i], incr[13][i], incr[14][i], incr[15][i], 859 adap->params.a_wnd[i], 860 dec_fac[adap->params.b_wnd[i]]); 861 } 862 863 kfree(incr); 864 return 0; 865} 866 867DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl); 868 869/* Format a value in a unit that differs from the value's native unit by the 870 * given factor. 871 */ 872static char *unit_conv(char *buf, size_t len, unsigned int val, 873 unsigned int factor) 874{ 875 unsigned int rem = val % factor; 876 877 if (rem == 0) { 878 snprintf(buf, len, "%u", val / factor); 879 } else { 880 while (rem % 10 == 0) 881 rem /= 10; 882 snprintf(buf, len, "%u.%u", val / factor, rem); 883 } 884 return buf; 885} 886 887static int clk_show(struct seq_file *seq, void *v) 888{ 889 char buf[32]; 890 struct adapter *adap = seq->private; 891 unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */ 892 u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A); 893 unsigned int tre = TIMERRESOLUTION_G(res); 894 unsigned int dack_re = DELAYEDACKRESOLUTION_G(res); 895 unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */ 896 897 seq_printf(seq, "Core clock period: %s ns\n", 898 unit_conv(buf, sizeof(buf), cclk_ps, 1000)); 899 seq_printf(seq, "TP timer tick: %s us\n", 900 unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000)); 901 seq_printf(seq, "TCP timestamp tick: %s us\n", 902 unit_conv(buf, sizeof(buf), 903 (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000)); 904 seq_printf(seq, "DACK tick: %s us\n", 905 unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000)); 906 seq_printf(seq, "DACK timer: %u us\n", 907 ((cclk_ps << dack_re) / 1000000) * 908 t4_read_reg(adap, TP_DACK_TIMER_A)); 909 seq_printf(seq, "Retransmit min: %llu us\n", 910 tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A)); 911 seq_printf(seq, "Retransmit max: %llu us\n", 912 tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A)); 913 seq_printf(seq, "Persist timer min: %llu us\n", 914 tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A)); 915 seq_printf(seq, "Persist timer max: %llu us\n", 916 tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A)); 917 seq_printf(seq, "Keepalive idle timer: %llu us\n", 918 tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A)); 919 seq_printf(seq, "Keepalive interval: %llu us\n", 920 tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A)); 921 seq_printf(seq, "Initial SRTT: %llu us\n", 922 tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A))); 923 seq_printf(seq, "FINWAIT2 timer: %llu us\n", 924 tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A)); 925 926 return 0; 927} 928 929DEFINE_SIMPLE_DEBUGFS_FILE(clk); 930 931/* Firmware Device Log dump. */ 932static const char * const devlog_level_strings[] = { 933 [FW_DEVLOG_LEVEL_EMERG] = "EMERG", 934 [FW_DEVLOG_LEVEL_CRIT] = "CRIT", 935 [FW_DEVLOG_LEVEL_ERR] = "ERR", 936 [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE", 937 [FW_DEVLOG_LEVEL_INFO] = "INFO", 938 [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG" 939}; 940 941static const char * const devlog_facility_strings[] = { 942 [FW_DEVLOG_FACILITY_CORE] = "CORE", 943 [FW_DEVLOG_FACILITY_CF] = "CF", 944 [FW_DEVLOG_FACILITY_SCHED] = "SCHED", 945 [FW_DEVLOG_FACILITY_TIMER] = "TIMER", 946 [FW_DEVLOG_FACILITY_RES] = "RES", 947 [FW_DEVLOG_FACILITY_HW] = "HW", 948 [FW_DEVLOG_FACILITY_FLR] = "FLR", 949 [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ", 950 [FW_DEVLOG_FACILITY_PHY] = "PHY", 951 [FW_DEVLOG_FACILITY_MAC] = "MAC", 952 [FW_DEVLOG_FACILITY_PORT] = "PORT", 953 [FW_DEVLOG_FACILITY_VI] = "VI", 954 [FW_DEVLOG_FACILITY_FILTER] = "FILTER", 955 [FW_DEVLOG_FACILITY_ACL] = "ACL", 956 [FW_DEVLOG_FACILITY_TM] = "TM", 957 [FW_DEVLOG_FACILITY_QFC] = "QFC", 958 [FW_DEVLOG_FACILITY_DCB] = "DCB", 959 [FW_DEVLOG_FACILITY_ETH] = "ETH", 960 [FW_DEVLOG_FACILITY_OFLD] = "OFLD", 961 [FW_DEVLOG_FACILITY_RI] = "RI", 962 [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI", 963 [FW_DEVLOG_FACILITY_FCOE] = "FCOE", 964 [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI", 965 [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE" 966}; 967 968/* Information gathered by Device Log Open routine for the display routine. 969 */ 970struct devlog_info { 971 unsigned int nentries; /* number of entries in log[] */ 972 unsigned int first; /* first [temporal] entry in log[] */ 973 struct fw_devlog_e log[0]; /* Firmware Device Log */ 974}; 975 976/* Dump a Firmaware Device Log entry. 977 */ 978static int devlog_show(struct seq_file *seq, void *v) 979{ 980 if (v == SEQ_START_TOKEN) 981 seq_printf(seq, "%10s %15s %8s %8s %s\n", 982 "Seq#", "Tstamp", "Level", "Facility", "Message"); 983 else { 984 struct devlog_info *dinfo = seq->private; 985 int fidx = (uintptr_t)v - 2; 986 unsigned long index; 987 struct fw_devlog_e *e; 988 989 /* Get a pointer to the log entry to display. Skip unused log 990 * entries. 991 */ 992 index = dinfo->first + fidx; 993 if (index >= dinfo->nentries) 994 index -= dinfo->nentries; 995 e = &dinfo->log[index]; 996 if (e->timestamp == 0) 997 return 0; 998 999 /* Print the message. This depends on the firmware using 1000 * exactly the same formating strings as the kernel so we may 1001 * eventually have to put a format interpreter in here ... 1002 */ 1003 seq_printf(seq, "%10d %15llu %8s %8s ", 1004 be32_to_cpu(e->seqno), 1005 be64_to_cpu(e->timestamp), 1006 (e->level < ARRAY_SIZE(devlog_level_strings) 1007 ? devlog_level_strings[e->level] 1008 : "UNKNOWN"), 1009 (e->facility < ARRAY_SIZE(devlog_facility_strings) 1010 ? devlog_facility_strings[e->facility] 1011 : "UNKNOWN")); 1012 seq_printf(seq, e->fmt, 1013 be32_to_cpu(e->params[0]), 1014 be32_to_cpu(e->params[1]), 1015 be32_to_cpu(e->params[2]), 1016 be32_to_cpu(e->params[3]), 1017 be32_to_cpu(e->params[4]), 1018 be32_to_cpu(e->params[5]), 1019 be32_to_cpu(e->params[6]), 1020 be32_to_cpu(e->params[7])); 1021 } 1022 return 0; 1023} 1024 1025/* Sequential File Operations for Device Log. 1026 */ 1027static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos) 1028{ 1029 if (pos > dinfo->nentries) 1030 return NULL; 1031 1032 return (void *)(uintptr_t)(pos + 1); 1033} 1034 1035static void *devlog_start(struct seq_file *seq, loff_t *pos) 1036{ 1037 struct devlog_info *dinfo = seq->private; 1038 1039 return (*pos 1040 ? devlog_get_idx(dinfo, *pos) 1041 : SEQ_START_TOKEN); 1042} 1043 1044static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos) 1045{ 1046 struct devlog_info *dinfo = seq->private; 1047 1048 (*pos)++; 1049 return devlog_get_idx(dinfo, *pos); 1050} 1051 1052static void devlog_stop(struct seq_file *seq, void *v) 1053{ 1054} 1055 1056static const struct seq_operations devlog_seq_ops = { 1057 .start = devlog_start, 1058 .next = devlog_next, 1059 .stop = devlog_stop, 1060 .show = devlog_show 1061}; 1062 1063/* Set up for reading the firmware's device log. We read the entire log here 1064 * and then display it incrementally in devlog_show(). 1065 */ 1066static int devlog_open(struct inode *inode, struct file *file) 1067{ 1068 struct adapter *adap = inode->i_private; 1069 struct devlog_params *dparams = &adap->params.devlog; 1070 struct devlog_info *dinfo; 1071 unsigned int index; 1072 u32 fseqno; 1073 int ret; 1074 1075 /* If we don't know where the log is we can't do anything. 1076 */ 1077 if (dparams->start == 0) 1078 return -ENXIO; 1079 1080 /* Allocate the space to read in the firmware's device log and set up 1081 * for the iterated call to our display function. 1082 */ 1083 dinfo = __seq_open_private(file, &devlog_seq_ops, 1084 sizeof(*dinfo) + dparams->size); 1085 if (!dinfo) 1086 return -ENOMEM; 1087 1088 /* Record the basic log buffer information and read in the raw log. 1089 */ 1090 dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e)); 1091 dinfo->first = 0; 1092 spin_lock(&adap->win0_lock); 1093 ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype, 1094 dparams->start, dparams->size, (__be32 *)dinfo->log, 1095 T4_MEMORY_READ); 1096 spin_unlock(&adap->win0_lock); 1097 if (ret) { 1098 seq_release_private(inode, file); 1099 return ret; 1100 } 1101 1102 /* Find the earliest (lowest Sequence Number) log entry in the 1103 * circular Device Log. 1104 */ 1105 for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) { 1106 struct fw_devlog_e *e = &dinfo->log[index]; 1107 __u32 seqno; 1108 1109 if (e->timestamp == 0) 1110 continue; 1111 1112 seqno = be32_to_cpu(e->seqno); 1113 if (seqno < fseqno) { 1114 fseqno = seqno; 1115 dinfo->first = index; 1116 } 1117 } 1118 return 0; 1119} 1120 1121static const struct file_operations devlog_fops = { 1122 .owner = THIS_MODULE, 1123 .open = devlog_open, 1124 .read = seq_read, 1125 .llseek = seq_lseek, 1126 .release = seq_release_private 1127}; 1128 1129static int mbox_show(struct seq_file *seq, void *v) 1130{ 1131 static const char * const owner[] = { "none", "FW", "driver", 1132 "unknown", "<unread>" }; 1133 1134 int i; 1135 unsigned int mbox = (uintptr_t)seq->private & 7; 1136 struct adapter *adap = seq->private - mbox; 1137 void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A); 1138 1139 /* For T4 we don't have a shadow copy of the Mailbox Control register. 1140 * And since reading that real register causes a side effect of 1141 * granting ownership, we're best of simply not reading it at all. 1142 */ 1143 if (is_t4(adap->params.chip)) { 1144 i = 4; /* index of "<unread>" */ 1145 } else { 1146 unsigned int ctrl_reg = CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A; 1147 void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg); 1148 1149 i = MBOWNER_G(readl(ctrl)); 1150 } 1151 1152 seq_printf(seq, "mailbox owned by %s\n\n", owner[i]); 1153 1154 for (i = 0; i < MBOX_LEN; i += 8) 1155 seq_printf(seq, "%016llx\n", 1156 (unsigned long long)readq(addr + i)); 1157 return 0; 1158} 1159 1160static int mbox_open(struct inode *inode, struct file *file) 1161{ 1162 return single_open(file, mbox_show, inode->i_private); 1163} 1164 1165static ssize_t mbox_write(struct file *file, const char __user *buf, 1166 size_t count, loff_t *pos) 1167{ 1168 int i; 1169 char c = '\n', s[256]; 1170 unsigned long long data[8]; 1171 const struct inode *ino; 1172 unsigned int mbox; 1173 struct adapter *adap; 1174 void __iomem *addr; 1175 void __iomem *ctrl; 1176 1177 if (count > sizeof(s) - 1 || !count) 1178 return -EINVAL; 1179 if (copy_from_user(s, buf, count)) 1180 return -EFAULT; 1181 s[count] = '\0'; 1182 1183 if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0], 1184 &data[1], &data[2], &data[3], &data[4], &data[5], &data[6], 1185 &data[7], &c) < 8 || c != '\n') 1186 return -EINVAL; 1187 1188 ino = file_inode(file); 1189 mbox = (uintptr_t)ino->i_private & 7; 1190 adap = ino->i_private - mbox; 1191 addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A); 1192 ctrl = addr + MBOX_LEN; 1193 1194 if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL) 1195 return -EBUSY; 1196 1197 for (i = 0; i < 8; i++) 1198 writeq(data[i], addr + 8 * i); 1199 1200 writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl); 1201 return count; 1202} 1203 1204static const struct file_operations mbox_debugfs_fops = { 1205 .owner = THIS_MODULE, 1206 .open = mbox_open, 1207 .read = seq_read, 1208 .llseek = seq_lseek, 1209 .release = single_release, 1210 .write = mbox_write 1211}; 1212 1213static int mps_trc_show(struct seq_file *seq, void *v) 1214{ 1215 int enabled, i; 1216 struct trace_params tp; 1217 unsigned int trcidx = (uintptr_t)seq->private & 3; 1218 struct adapter *adap = seq->private - trcidx; 1219 1220 t4_get_trace_filter(adap, &tp, trcidx, &enabled); 1221 if (!enabled) { 1222 seq_puts(seq, "tracer is disabled\n"); 1223 return 0; 1224 } 1225 1226 if (tp.skip_ofst * 8 >= TRACE_LEN) { 1227 dev_err(adap->pdev_dev, "illegal trace pattern skip offset\n"); 1228 return -EINVAL; 1229 } 1230 if (tp.port < 8) { 1231 i = adap->chan_map[tp.port & 3]; 1232 if (i >= MAX_NPORTS) { 1233 dev_err(adap->pdev_dev, "tracer %u is assigned " 1234 "to non-existing port\n", trcidx); 1235 return -EINVAL; 1236 } 1237 seq_printf(seq, "tracer is capturing %s %s, ", 1238 adap->port[i]->name, tp.port < 4 ? "Rx" : "Tx"); 1239 } else 1240 seq_printf(seq, "tracer is capturing loopback %d, ", 1241 tp.port - 8); 1242 seq_printf(seq, "snap length: %u, min length: %u\n", tp.snap_len, 1243 tp.min_len); 1244 seq_printf(seq, "packets captured %smatch filter\n", 1245 tp.invert ? "do not " : ""); 1246 1247 if (tp.skip_ofst) { 1248 seq_puts(seq, "filter pattern: "); 1249 for (i = 0; i < tp.skip_ofst * 2; i += 2) 1250 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]); 1251 seq_putc(seq, '/'); 1252 for (i = 0; i < tp.skip_ofst * 2; i += 2) 1253 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]); 1254 seq_puts(seq, "@0\n"); 1255 } 1256 1257 seq_puts(seq, "filter pattern: "); 1258 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2) 1259 seq_printf(seq, "%08x%08x", tp.data[i], tp.data[i + 1]); 1260 seq_putc(seq, '/'); 1261 for (i = tp.skip_ofst * 2; i < TRACE_LEN / 4; i += 2) 1262 seq_printf(seq, "%08x%08x", tp.mask[i], tp.mask[i + 1]); 1263 seq_printf(seq, "@%u\n", (tp.skip_ofst + tp.skip_len) * 8); 1264 return 0; 1265} 1266 1267static int mps_trc_open(struct inode *inode, struct file *file) 1268{ 1269 return single_open(file, mps_trc_show, inode->i_private); 1270} 1271 1272static unsigned int xdigit2int(unsigned char c) 1273{ 1274 return isdigit(c) ? c - '0' : tolower(c) - 'a' + 10; 1275} 1276 1277#define TRC_PORT_NONE 0xff 1278#define TRC_RSS_ENABLE 0x33 1279#define TRC_RSS_DISABLE 0x13 1280 1281/* Set an MPS trace filter. Syntax is: 1282 * 1283 * disable 1284 * 1285 * to disable tracing, or 1286 * 1287 * interface qid=<qid no> [snaplen=<val>] [minlen=<val>] [not] [<pattern>]... 1288 * 1289 * where interface is one of rxN, txN, or loopbackN, N = 0..3, qid can be one 1290 * of the NIC's response qid obtained from sge_qinfo and pattern has the form 1291 * 1292 * <pattern data>[/<pattern mask>][@<anchor>] 1293 * 1294 * Up to 2 filter patterns can be specified. If 2 are supplied the first one 1295 * must be anchored at 0. An omited mask is taken as a mask of 1s, an omitted 1296 * anchor is taken as 0. 1297 */ 1298static ssize_t mps_trc_write(struct file *file, const char __user *buf, 1299 size_t count, loff_t *pos) 1300{ 1301 int i, enable, ret; 1302 u32 *data, *mask; 1303 struct trace_params tp; 1304 const struct inode *ino; 1305 unsigned int trcidx; 1306 char *s, *p, *word, *end; 1307 struct adapter *adap; 1308 u32 j; 1309 1310 ino = file_inode(file); 1311 trcidx = (uintptr_t)ino->i_private & 3; 1312 adap = ino->i_private - trcidx; 1313 1314 /* Don't accept input more than 1K, can't be anything valid except lots 1315 * of whitespace. Well, use less. 1316 */ 1317 if (count > 1024) 1318 return -EFBIG; 1319 p = s = kzalloc(count + 1, GFP_USER); 1320 if (!s) 1321 return -ENOMEM; 1322 if (copy_from_user(s, buf, count)) { 1323 count = -EFAULT; 1324 goto out; 1325 } 1326 1327 if (s[count - 1] == '\n') 1328 s[count - 1] = '\0'; 1329 1330 enable = strcmp("disable", s) != 0; 1331 if (!enable) 1332 goto apply; 1333 1334 /* enable or disable trace multi rss filter */ 1335 if (adap->trace_rss) 1336 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_ENABLE); 1337 else 1338 t4_write_reg(adap, MPS_TRC_CFG_A, TRC_RSS_DISABLE); 1339 1340 memset(&tp, 0, sizeof(tp)); 1341 tp.port = TRC_PORT_NONE; 1342 i = 0; /* counts pattern nibbles */ 1343 1344 while (p) { 1345 while (isspace(*p)) 1346 p++; 1347 word = strsep(&p, " "); 1348 if (!*word) 1349 break; 1350 1351 if (!strncmp(word, "qid=", 4)) { 1352 end = (char *)word + 4; 1353 ret = kstrtouint(end, 10, &j); 1354 if (ret) 1355 goto out; 1356 if (!adap->trace_rss) { 1357 t4_write_reg(adap, MPS_T5_TRC_RSS_CONTROL_A, j); 1358 continue; 1359 } 1360 1361 switch (trcidx) { 1362 case 0: 1363 t4_write_reg(adap, MPS_TRC_RSS_CONTROL_A, j); 1364 break; 1365 case 1: 1366 t4_write_reg(adap, 1367 MPS_TRC_FILTER1_RSS_CONTROL_A, j); 1368 break; 1369 case 2: 1370 t4_write_reg(adap, 1371 MPS_TRC_FILTER2_RSS_CONTROL_A, j); 1372 break; 1373 case 3: 1374 t4_write_reg(adap, 1375 MPS_TRC_FILTER3_RSS_CONTROL_A, j); 1376 break; 1377 } 1378 continue; 1379 } 1380 if (!strncmp(word, "snaplen=", 8)) { 1381 end = (char *)word + 8; 1382 ret = kstrtouint(end, 10, &j); 1383 if (ret || j > 9600) { 1384inval: count = -EINVAL; 1385 goto out; 1386 } 1387 tp.snap_len = j; 1388 continue; 1389 } 1390 if (!strncmp(word, "minlen=", 7)) { 1391 end = (char *)word + 7; 1392 ret = kstrtouint(end, 10, &j); 1393 if (ret || j > TFMINPKTSIZE_M) 1394 goto inval; 1395 tp.min_len = j; 1396 continue; 1397 } 1398 if (!strcmp(word, "not")) { 1399 tp.invert = !tp.invert; 1400 continue; 1401 } 1402 if (!strncmp(word, "loopback", 8) && tp.port == TRC_PORT_NONE) { 1403 if (word[8] < '0' || word[8] > '3' || word[9]) 1404 goto inval; 1405 tp.port = word[8] - '0' + 8; 1406 continue; 1407 } 1408 if (!strncmp(word, "tx", 2) && tp.port == TRC_PORT_NONE) { 1409 if (word[2] < '0' || word[2] > '3' || word[3]) 1410 goto inval; 1411 tp.port = word[2] - '0' + 4; 1412 if (adap->chan_map[tp.port & 3] >= MAX_NPORTS) 1413 goto inval; 1414 continue; 1415 } 1416 if (!strncmp(word, "rx", 2) && tp.port == TRC_PORT_NONE) { 1417 if (word[2] < '0' || word[2] > '3' || word[3]) 1418 goto inval; 1419 tp.port = word[2] - '0'; 1420 if (adap->chan_map[tp.port] >= MAX_NPORTS) 1421 goto inval; 1422 continue; 1423 } 1424 if (!isxdigit(*word)) 1425 goto inval; 1426 1427 /* we have found a trace pattern */ 1428 if (i) { /* split pattern */ 1429 if (tp.skip_len) /* too many splits */ 1430 goto inval; 1431 tp.skip_ofst = i / 16; 1432 } 1433 1434 data = &tp.data[i / 8]; 1435 mask = &tp.mask[i / 8]; 1436 j = i; 1437 1438 while (isxdigit(*word)) { 1439 if (i >= TRACE_LEN * 2) { 1440 count = -EFBIG; 1441 goto out; 1442 } 1443 *data = (*data << 4) + xdigit2int(*word++); 1444 if (++i % 8 == 0) 1445 data++; 1446 } 1447 if (*word == '/') { 1448 word++; 1449 while (isxdigit(*word)) { 1450 if (j >= i) /* mask longer than data */ 1451 goto inval; 1452 *mask = (*mask << 4) + xdigit2int(*word++); 1453 if (++j % 8 == 0) 1454 mask++; 1455 } 1456 if (i != j) /* mask shorter than data */ 1457 goto inval; 1458 } else { /* no mask, use all 1s */ 1459 for ( ; i - j >= 8; j += 8) 1460 *mask++ = 0xffffffff; 1461 if (i % 8) 1462 *mask = (1 << (i % 8) * 4) - 1; 1463 } 1464 if (*word == '@') { 1465 end = (char *)word + 1; 1466 ret = kstrtouint(end, 10, &j); 1467 if (*end && *end != '\n') 1468 goto inval; 1469 if (j & 7) /* doesn't start at multiple of 8 */ 1470 goto inval; 1471 j /= 8; 1472 if (j < tp.skip_ofst) /* overlaps earlier pattern */ 1473 goto inval; 1474 if (j - tp.skip_ofst > 31) /* skip too big */ 1475 goto inval; 1476 tp.skip_len = j - tp.skip_ofst; 1477 } 1478 if (i % 8) { 1479 *data <<= (8 - i % 8) * 4; 1480 *mask <<= (8 - i % 8) * 4; 1481 i = (i + 15) & ~15; /* 8-byte align */ 1482 } 1483 } 1484 1485 if (tp.port == TRC_PORT_NONE) 1486 goto inval; 1487 1488apply: 1489 i = t4_set_trace_filter(adap, &tp, trcidx, enable); 1490 if (i) 1491 count = i; 1492out: 1493 kfree(s); 1494 return count; 1495} 1496 1497static const struct file_operations mps_trc_debugfs_fops = { 1498 .owner = THIS_MODULE, 1499 .open = mps_trc_open, 1500 .read = seq_read, 1501 .llseek = seq_lseek, 1502 .release = single_release, 1503 .write = mps_trc_write 1504}; 1505 1506static ssize_t flash_read(struct file *file, char __user *buf, size_t count, 1507 loff_t *ppos) 1508{ 1509 loff_t pos = *ppos; 1510 loff_t avail = file_inode(file)->i_size; 1511 struct adapter *adap = file->private_data; 1512 1513 if (pos < 0) 1514 return -EINVAL; 1515 if (pos >= avail) 1516 return 0; 1517 if (count > avail - pos) 1518 count = avail - pos; 1519 1520 while (count) { 1521 size_t len; 1522 int ret, ofst; 1523 u8 data[256]; 1524 1525 ofst = pos & 3; 1526 len = min(count + ofst, sizeof(data)); 1527 ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4, 1528 (u32 *)data, 1); 1529 if (ret) 1530 return ret; 1531 1532 len -= ofst; 1533 if (copy_to_user(buf, data + ofst, len)) 1534 return -EFAULT; 1535 1536 buf += len; 1537 pos += len; 1538 count -= len; 1539 } 1540 count = pos - *ppos; 1541 *ppos = pos; 1542 return count; 1543} 1544 1545static const struct file_operations flash_debugfs_fops = { 1546 .owner = THIS_MODULE, 1547 .open = mem_open, 1548 .read = flash_read, 1549}; 1550 1551static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask) 1552{ 1553 *mask = x | y; 1554 y = (__force u64)cpu_to_be64(y); 1555 memcpy(addr, (char *)&y + 2, ETH_ALEN); 1556} 1557 1558static int mps_tcam_show(struct seq_file *seq, void *v) 1559{ 1560 struct adapter *adap = seq->private; 1561 unsigned int chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip); 1562 1563 if (v == SEQ_START_TOKEN) { 1564 if (adap->params.arch.mps_rplc_size > 128) 1565 seq_puts(seq, "Idx Ethernet address Mask " 1566 "Vld Ports PF VF " 1567 "Replication " 1568 " P0 P1 P2 P3 ML\n"); 1569 else 1570 seq_puts(seq, "Idx Ethernet address Mask " 1571 "Vld Ports PF VF Replication" 1572 " P0 P1 P2 P3 ML\n"); 1573 } else { 1574 u64 mask; 1575 u8 addr[ETH_ALEN]; 1576 bool replicate; 1577 unsigned int idx = (uintptr_t)v - 2; 1578 u64 tcamy, tcamx, val; 1579 u32 cls_lo, cls_hi, ctl; 1580 u32 rplc[8] = {0}; 1581 1582 if (chip_ver > CHELSIO_T5) { 1583 /* CtlCmdType - 0: Read, 1: Write 1584 * CtlTcamSel - 0: TCAM0, 1: TCAM1 1585 * CtlXYBitSel- 0: Y bit, 1: X bit 1586 */ 1587 1588 /* Read tcamy */ 1589 ctl = CTLCMDTYPE_V(0) | CTLXYBITSEL_V(0); 1590 if (idx < 256) 1591 ctl |= CTLTCAMINDEX_V(idx) | CTLTCAMSEL_V(0); 1592 else 1593 ctl |= CTLTCAMINDEX_V(idx - 256) | 1594 CTLTCAMSEL_V(1); 1595 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); 1596 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A); 1597 tcamy = DMACH_G(val) << 32; 1598 tcamy |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A); 1599 1600 /* Read tcamx. Change the control param */ 1601 ctl |= CTLXYBITSEL_V(1); 1602 t4_write_reg(adap, MPS_CLS_TCAM_DATA2_CTL_A, ctl); 1603 val = t4_read_reg(adap, MPS_CLS_TCAM_DATA1_A); 1604 tcamx = DMACH_G(val) << 32; 1605 tcamx |= t4_read_reg(adap, MPS_CLS_TCAM_DATA0_A); 1606 } else { 1607 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx)); 1608 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx)); 1609 } 1610 1611 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx)); 1612 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx)); 1613 1614 if (tcamx & tcamy) { 1615 seq_printf(seq, "%3u -\n", idx); 1616 goto out; 1617 } 1618 1619 rplc[0] = rplc[1] = rplc[2] = rplc[3] = 0; 1620 if (chip_ver > CHELSIO_T5) 1621 replicate = (cls_lo & T6_REPLICATE_F); 1622 else 1623 replicate = (cls_lo & REPLICATE_F); 1624 1625 if (replicate) { 1626 struct fw_ldst_cmd ldst_cmd; 1627 int ret; 1628 struct fw_ldst_mps_rplc mps_rplc; 1629 u32 ldst_addrspc; 1630 1631 memset(&ldst_cmd, 0, sizeof(ldst_cmd)); 1632 ldst_addrspc = 1633 FW_LDST_CMD_ADDRSPACE_V(FW_LDST_ADDRSPC_MPS); 1634 ldst_cmd.op_to_addrspace = 1635 htonl(FW_CMD_OP_V(FW_LDST_CMD) | 1636 FW_CMD_REQUEST_F | 1637 FW_CMD_READ_F | 1638 ldst_addrspc); 1639 ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd)); 1640 ldst_cmd.u.mps.rplc.fid_idx = 1641 htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) | 1642 FW_LDST_CMD_IDX_V(idx)); 1643 ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd, 1644 sizeof(ldst_cmd), &ldst_cmd); 1645 if (ret) 1646 dev_warn(adap->pdev_dev, "Can't read MPS " 1647 "replication map for idx %d: %d\n", 1648 idx, -ret); 1649 else { 1650 mps_rplc = ldst_cmd.u.mps.rplc; 1651 rplc[0] = ntohl(mps_rplc.rplc31_0); 1652 rplc[1] = ntohl(mps_rplc.rplc63_32); 1653 rplc[2] = ntohl(mps_rplc.rplc95_64); 1654 rplc[3] = ntohl(mps_rplc.rplc127_96); 1655 if (adap->params.arch.mps_rplc_size > 128) { 1656 rplc[4] = ntohl(mps_rplc.rplc159_128); 1657 rplc[5] = ntohl(mps_rplc.rplc191_160); 1658 rplc[6] = ntohl(mps_rplc.rplc223_192); 1659 rplc[7] = ntohl(mps_rplc.rplc255_224); 1660 } 1661 } 1662 } 1663 1664 tcamxy2valmask(tcamx, tcamy, addr, &mask); 1665 if (chip_ver > CHELSIO_T5) 1666 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x " 1667 "%012llx%3c %#x%4u%4d", 1668 idx, addr[0], addr[1], addr[2], addr[3], 1669 addr[4], addr[5], (unsigned long long)mask, 1670 (cls_lo & T6_SRAM_VLD_F) ? 'Y' : 'N', 1671 PORTMAP_G(cls_hi), 1672 T6_PF_G(cls_lo), 1673 (cls_lo & T6_VF_VALID_F) ? 1674 T6_VF_G(cls_lo) : -1); 1675 else 1676 seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x " 1677 "%012llx%3c %#x%4u%4d", 1678 idx, addr[0], addr[1], addr[2], addr[3], 1679 addr[4], addr[5], (unsigned long long)mask, 1680 (cls_lo & SRAM_VLD_F) ? 'Y' : 'N', 1681 PORTMAP_G(cls_hi), 1682 PF_G(cls_lo), 1683 (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1); 1684 1685 if (replicate) { 1686 if (adap->params.arch.mps_rplc_size > 128) 1687 seq_printf(seq, " %08x %08x %08x %08x " 1688 "%08x %08x %08x %08x", 1689 rplc[7], rplc[6], rplc[5], rplc[4], 1690 rplc[3], rplc[2], rplc[1], rplc[0]); 1691 else 1692 seq_printf(seq, " %08x %08x %08x %08x", 1693 rplc[3], rplc[2], rplc[1], rplc[0]); 1694 } else { 1695 if (adap->params.arch.mps_rplc_size > 128) 1696 seq_printf(seq, "%72c", ' '); 1697 else 1698 seq_printf(seq, "%36c", ' '); 1699 } 1700 1701 if (chip_ver > CHELSIO_T5) 1702 seq_printf(seq, "%4u%3u%3u%3u %#x\n", 1703 T6_SRAM_PRIO0_G(cls_lo), 1704 T6_SRAM_PRIO1_G(cls_lo), 1705 T6_SRAM_PRIO2_G(cls_lo), 1706 T6_SRAM_PRIO3_G(cls_lo), 1707 (cls_lo >> T6_MULTILISTEN0_S) & 0xf); 1708 else 1709 seq_printf(seq, "%4u%3u%3u%3u %#x\n", 1710 SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo), 1711 SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo), 1712 (cls_lo >> MULTILISTEN0_S) & 0xf); 1713 } 1714out: return 0; 1715} 1716 1717static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos) 1718{ 1719 struct adapter *adap = seq->private; 1720 int max_mac_addr = is_t4(adap->params.chip) ? 1721 NUM_MPS_CLS_SRAM_L_INSTANCES : 1722 NUM_MPS_T5_CLS_SRAM_L_INSTANCES; 1723 return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL); 1724} 1725 1726static void *mps_tcam_start(struct seq_file *seq, loff_t *pos) 1727{ 1728 return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN; 1729} 1730 1731static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos) 1732{ 1733 ++*pos; 1734 return mps_tcam_get_idx(seq, *pos); 1735} 1736 1737static void mps_tcam_stop(struct seq_file *seq, void *v) 1738{ 1739} 1740 1741static const struct seq_operations mps_tcam_seq_ops = { 1742 .start = mps_tcam_start, 1743 .next = mps_tcam_next, 1744 .stop = mps_tcam_stop, 1745 .show = mps_tcam_show 1746}; 1747 1748static int mps_tcam_open(struct inode *inode, struct file *file) 1749{ 1750 int res = seq_open(file, &mps_tcam_seq_ops); 1751 1752 if (!res) { 1753 struct seq_file *seq = file->private_data; 1754 1755 seq->private = inode->i_private; 1756 } 1757 return res; 1758} 1759 1760static const struct file_operations mps_tcam_debugfs_fops = { 1761 .owner = THIS_MODULE, 1762 .open = mps_tcam_open, 1763 .read = seq_read, 1764 .llseek = seq_lseek, 1765 .release = seq_release, 1766}; 1767 1768/* Display various sensor information. 1769 */ 1770static int sensors_show(struct seq_file *seq, void *v) 1771{ 1772 struct adapter *adap = seq->private; 1773 u32 param[7], val[7]; 1774 int ret; 1775 1776 /* Note that if the sensors haven't been initialized and turned on 1777 * we'll get values of 0, so treat those as "<unknown>" ... 1778 */ 1779 param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 1780 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) | 1781 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP)); 1782 param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) | 1783 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) | 1784 FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD)); 1785 ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 2, 1786 param, val); 1787 1788 if (ret < 0 || val[0] == 0) 1789 seq_puts(seq, "Temperature: <unknown>\n"); 1790 else 1791 seq_printf(seq, "Temperature: %dC\n", val[0]); 1792 1793 if (ret < 0 || val[1] == 0) 1794 seq_puts(seq, "Core VDD: <unknown>\n"); 1795 else 1796 seq_printf(seq, "Core VDD: %dmV\n", val[1]); 1797 1798 return 0; 1799} 1800 1801DEFINE_SIMPLE_DEBUGFS_FILE(sensors); 1802 1803#if IS_ENABLED(CONFIG_IPV6) 1804static int clip_tbl_open(struct inode *inode, struct file *file) 1805{ 1806 return single_open(file, clip_tbl_show, inode->i_private); 1807} 1808 1809static const struct file_operations clip_tbl_debugfs_fops = { 1810 .owner = THIS_MODULE, 1811 .open = clip_tbl_open, 1812 .read = seq_read, 1813 .llseek = seq_lseek, 1814 .release = single_release 1815}; 1816#endif 1817 1818/*RSS Table. 1819 */ 1820 1821static int rss_show(struct seq_file *seq, void *v, int idx) 1822{ 1823 u16 *entry = v; 1824 1825 seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n", 1826 idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4], 1827 entry[5], entry[6], entry[7]); 1828 return 0; 1829} 1830 1831static int rss_open(struct inode *inode, struct file *file) 1832{ 1833 int ret; 1834 struct seq_tab *p; 1835 struct adapter *adap = inode->i_private; 1836 1837 p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show); 1838 if (!p) 1839 return -ENOMEM; 1840 1841 ret = t4_read_rss(adap, (u16 *)p->data); 1842 if (ret) 1843 seq_release_private(inode, file); 1844 1845 return ret; 1846} 1847 1848static const struct file_operations rss_debugfs_fops = { 1849 .owner = THIS_MODULE, 1850 .open = rss_open, 1851 .read = seq_read, 1852 .llseek = seq_lseek, 1853 .release = seq_release_private 1854}; 1855 1856/* RSS Configuration. 1857 */ 1858 1859/* Small utility function to return the strings "yes" or "no" if the supplied 1860 * argument is non-zero. 1861 */ 1862static const char *yesno(int x) 1863{ 1864 static const char *yes = "yes"; 1865 static const char *no = "no"; 1866 1867 return x ? yes : no; 1868} 1869 1870static int rss_config_show(struct seq_file *seq, void *v) 1871{ 1872 struct adapter *adapter = seq->private; 1873 static const char * const keymode[] = { 1874 "global", 1875 "global and per-VF scramble", 1876 "per-PF and per-VF scramble", 1877 "per-VF and per-VF scramble", 1878 }; 1879 u32 rssconf; 1880 1881 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A); 1882 seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf); 1883 seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf & 1884 TNL4TUPENIPV6_F)); 1885 seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf & 1886 TNL2TUPENIPV6_F)); 1887 seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf & 1888 TNL4TUPENIPV4_F)); 1889 seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf & 1890 TNL2TUPENIPV4_F)); 1891 seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F)); 1892 seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F)); 1893 seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F)); 1894 seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F)); 1895 seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf & 1896 OFDHASHSAVE_F)); 1897 seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F)); 1898 seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F)); 1899 seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F)); 1900 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf & 1901 SYN4TUPENIPV6_F)); 1902 seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf & 1903 SYN2TUPENIPV6_F)); 1904 seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf & 1905 SYN4TUPENIPV4_F)); 1906 seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf & 1907 SYN2TUPENIPV4_F)); 1908 seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf & 1909 SYN4TUPENIPV6_F)); 1910 seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F)); 1911 seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F)); 1912 seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F)); 1913 seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F)); 1914 seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf & 1915 CHANNELENABLE_F)); 1916 seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf & 1917 PORTENABLE_F)); 1918 seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf & 1919 TNLALLLOOKUP_F)); 1920 seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf & 1921 VIRTENABLE_F)); 1922 seq_printf(seq, " CngEn: %3s\n", yesno(rssconf & 1923 CONGESTIONENABLE_F)); 1924 seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf & 1925 HASHTOEPLITZ_F)); 1926 seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F)); 1927 seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F)); 1928 1929 seq_puts(seq, "\n"); 1930 1931 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A); 1932 seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf); 1933 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf)); 1934 seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf)); 1935 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) { 1936 seq_printf(seq, " HashAll: %3s\n", 1937 yesno(rssconf & HASHALL_F)); 1938 seq_printf(seq, " HashEth: %3s\n", 1939 yesno(rssconf & HASHETH_F)); 1940 } 1941 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F)); 1942 1943 seq_puts(seq, "\n"); 1944 1945 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A); 1946 seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf); 1947 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf)); 1948 seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf & 1949 RRCPLMAPEN_F)); 1950 seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf)); 1951 1952 seq_puts(seq, "\n"); 1953 1954 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A); 1955 seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf); 1956 seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf)); 1957 seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F)); 1958 1959 seq_puts(seq, "\n"); 1960 1961 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A); 1962 seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf); 1963 if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) { 1964 seq_printf(seq, " KeyWrAddrX: %3d\n", 1965 KEYWRADDRX_G(rssconf)); 1966 seq_printf(seq, " KeyExtend: %3s\n", 1967 yesno(rssconf & KEYEXTEND_F)); 1968 } 1969 seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F)); 1970 seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F)); 1971 seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F)); 1972 seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F)); 1973 seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf & 1974 DISABLEVLAN_F)); 1975 seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F)); 1976 seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf)); 1977 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) 1978 seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf)); 1979 else 1980 seq_printf(seq, " VfWrAddr: %3d\n", 1981 T6_VFWRADDR_G(rssconf)); 1982 seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]); 1983 seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F)); 1984 seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F)); 1985 seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf)); 1986 1987 seq_puts(seq, "\n"); 1988 1989 rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A); 1990 seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf); 1991 seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F)); 1992 seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F)); 1993 seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F)); 1994 seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F)); 1995 seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf & 1996 CHNUNDFLOW3_F)); 1997 seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf & 1998 CHNUNDFLOW2_F)); 1999 seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf & 2000 CHNUNDFLOW1_F)); 2001 seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf & 2002 CHNUNDFLOW0_F)); 2003 seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F)); 2004 seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F)); 2005 seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F)); 2006 seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F)); 2007 seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F)); 2008 seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F)); 2009 seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F)); 2010 seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F)); 2011 seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F)); 2012 seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F)); 2013 seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf)); 2014 2015 return 0; 2016} 2017 2018DEFINE_SIMPLE_DEBUGFS_FILE(rss_config); 2019 2020/* RSS Secret Key. 2021 */ 2022 2023static int rss_key_show(struct seq_file *seq, void *v) 2024{ 2025 u32 key[10]; 2026 2027 t4_read_rss_key(seq->private, key); 2028 seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n", 2029 key[9], key[8], key[7], key[6], key[5], key[4], key[3], 2030 key[2], key[1], key[0]); 2031 return 0; 2032} 2033 2034static int rss_key_open(struct inode *inode, struct file *file) 2035{ 2036 return single_open(file, rss_key_show, inode->i_private); 2037} 2038 2039static ssize_t rss_key_write(struct file *file, const char __user *buf, 2040 size_t count, loff_t *pos) 2041{ 2042 int i, j; 2043 u32 key[10]; 2044 char s[100], *p; 2045 struct adapter *adap = file_inode(file)->i_private; 2046 2047 if (count > sizeof(s) - 1) 2048 return -EINVAL; 2049 if (copy_from_user(s, buf, count)) 2050 return -EFAULT; 2051 for (i = count; i > 0 && isspace(s[i - 1]); i--) 2052 ; 2053 s[i] = '\0'; 2054 2055 for (p = s, i = 9; i >= 0; i--) { 2056 key[i] = 0; 2057 for (j = 0; j < 8; j++, p++) { 2058 if (!isxdigit(*p)) 2059 return -EINVAL; 2060 key[i] = (key[i] << 4) | hex2val(*p); 2061 } 2062 } 2063 2064 t4_write_rss_key(adap, key, -1); 2065 return count; 2066} 2067 2068static const struct file_operations rss_key_debugfs_fops = { 2069 .owner = THIS_MODULE, 2070 .open = rss_key_open, 2071 .read = seq_read, 2072 .llseek = seq_lseek, 2073 .release = single_release, 2074 .write = rss_key_write 2075}; 2076 2077/* PF RSS Configuration. 2078 */ 2079 2080struct rss_pf_conf { 2081 u32 rss_pf_map; 2082 u32 rss_pf_mask; 2083 u32 rss_pf_config; 2084}; 2085 2086static int rss_pf_config_show(struct seq_file *seq, void *v, int idx) 2087{ 2088 struct rss_pf_conf *pfconf; 2089 2090 if (v == SEQ_START_TOKEN) { 2091 /* use the 0th entry to dump the PF Map Index Size */ 2092 pfconf = seq->private + offsetof(struct seq_tab, data); 2093 seq_printf(seq, "PF Map Index Size = %d\n\n", 2094 LKPIDXSIZE_G(pfconf->rss_pf_map)); 2095 2096 seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n"); 2097 seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n"); 2098 seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n"); 2099 } else { 2100 #define G_PFnLKPIDX(map, n) \ 2101 (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M) 2102 #define G_PFnMSKSIZE(mask, n) \ 2103 (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M) 2104 2105 pfconf = v; 2106 seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n", 2107 idx, 2108 yesno(pfconf->rss_pf_config & MAPENABLE_F), 2109 yesno(pfconf->rss_pf_config & CHNENABLE_F), 2110 yesno(pfconf->rss_pf_config & PRTENABLE_F), 2111 G_PFnLKPIDX(pfconf->rss_pf_map, idx), 2112 G_PFnMSKSIZE(pfconf->rss_pf_mask, idx), 2113 IVFWIDTH_G(pfconf->rss_pf_config), 2114 yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F), 2115 yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F), 2116 yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F), 2117 yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F), 2118 yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F), 2119 CH1DEFAULTQUEUE_G(pfconf->rss_pf_config), 2120 CH0DEFAULTQUEUE_G(pfconf->rss_pf_config)); 2121 2122 #undef G_PFnLKPIDX 2123 #undef G_PFnMSKSIZE 2124 } 2125 return 0; 2126} 2127 2128static int rss_pf_config_open(struct inode *inode, struct file *file) 2129{ 2130 struct adapter *adapter = inode->i_private; 2131 struct seq_tab *p; 2132 u32 rss_pf_map, rss_pf_mask; 2133 struct rss_pf_conf *pfconf; 2134 int pf; 2135 2136 p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show); 2137 if (!p) 2138 return -ENOMEM; 2139 2140 pfconf = (struct rss_pf_conf *)p->data; 2141 rss_pf_map = t4_read_rss_pf_map(adapter); 2142 rss_pf_mask = t4_read_rss_pf_mask(adapter); 2143 for (pf = 0; pf < 8; pf++) { 2144 pfconf[pf].rss_pf_map = rss_pf_map; 2145 pfconf[pf].rss_pf_mask = rss_pf_mask; 2146 t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config); 2147 } 2148 return 0; 2149} 2150 2151static const struct file_operations rss_pf_config_debugfs_fops = { 2152 .owner = THIS_MODULE, 2153 .open = rss_pf_config_open, 2154 .read = seq_read, 2155 .llseek = seq_lseek, 2156 .release = seq_release_private 2157}; 2158 2159/* VF RSS Configuration. 2160 */ 2161 2162struct rss_vf_conf { 2163 u32 rss_vf_vfl; 2164 u32 rss_vf_vfh; 2165}; 2166 2167static int rss_vf_config_show(struct seq_file *seq, void *v, int idx) 2168{ 2169 if (v == SEQ_START_TOKEN) { 2170 seq_puts(seq, " RSS Hash Tuple Enable\n"); 2171 seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n"); 2172 seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n"); 2173 } else { 2174 struct rss_vf_conf *vfconf = v; 2175 2176 seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n", 2177 idx, 2178 yesno(vfconf->rss_vf_vfh & VFCHNEN_F), 2179 yesno(vfconf->rss_vf_vfh & VFPRTEN_F), 2180 VFLKPIDX_G(vfconf->rss_vf_vfh), 2181 yesno(vfconf->rss_vf_vfh & VFVLNEX_F), 2182 yesno(vfconf->rss_vf_vfh & VFUPEN_F), 2183 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F), 2184 yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F), 2185 yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F), 2186 yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F), 2187 yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F), 2188 DEFAULTQUEUE_G(vfconf->rss_vf_vfh), 2189 KEYINDEX_G(vfconf->rss_vf_vfh), 2190 vfconf->rss_vf_vfl); 2191 } 2192 return 0; 2193} 2194 2195static int rss_vf_config_open(struct inode *inode, struct file *file) 2196{ 2197 struct adapter *adapter = inode->i_private; 2198 struct seq_tab *p; 2199 struct rss_vf_conf *vfconf; 2200 int vf, vfcount = adapter->params.arch.vfcount; 2201 2202 p = seq_open_tab(file, vfcount, sizeof(*vfconf), 1, rss_vf_config_show); 2203 if (!p) 2204 return -ENOMEM; 2205 2206 vfconf = (struct rss_vf_conf *)p->data; 2207 for (vf = 0; vf < vfcount; vf++) { 2208 t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl, 2209 &vfconf[vf].rss_vf_vfh); 2210 } 2211 return 0; 2212} 2213 2214static const struct file_operations rss_vf_config_debugfs_fops = { 2215 .owner = THIS_MODULE, 2216 .open = rss_vf_config_open, 2217 .read = seq_read, 2218 .llseek = seq_lseek, 2219 .release = seq_release_private 2220}; 2221 2222/** 2223 * ethqset2pinfo - return port_info of an Ethernet Queue Set 2224 * @adap: the adapter 2225 * @qset: Ethernet Queue Set 2226 */ 2227static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset) 2228{ 2229 int pidx; 2230 2231 for_each_port(adap, pidx) { 2232 struct port_info *pi = adap2pinfo(adap, pidx); 2233 2234 if (qset >= pi->first_qset && 2235 qset < pi->first_qset + pi->nqsets) 2236 return pi; 2237 } 2238 2239 /* should never happen! */ 2240 BUG_ON(1); 2241 return NULL; 2242} 2243 2244static int sge_qinfo_show(struct seq_file *seq, void *v) 2245{ 2246 struct adapter *adap = seq->private; 2247 int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4); 2248 int iscsi_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4); 2249 int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4); 2250 int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4); 2251 int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4); 2252 int i, r = (uintptr_t)v - 1; 2253 int iscsi_idx = r - eth_entries; 2254 int rdma_idx = iscsi_idx - iscsi_entries; 2255 int ciq_idx = rdma_idx - rdma_entries; 2256 int ctrl_idx = ciq_idx - ciq_entries; 2257 int fq_idx = ctrl_idx - ctrl_entries; 2258 2259 if (r) 2260 seq_putc(seq, '\n'); 2261 2262#define S3(fmt_spec, s, v) \ 2263do { \ 2264 seq_printf(seq, "%-12s", s); \ 2265 for (i = 0; i < n; ++i) \ 2266 seq_printf(seq, " %16" fmt_spec, v); \ 2267 seq_putc(seq, '\n'); \ 2268} while (0) 2269#define S(s, v) S3("s", s, v) 2270#define T3(fmt_spec, s, v) S3(fmt_spec, s, tx[i].v) 2271#define T(s, v) S3("u", s, tx[i].v) 2272#define TL(s, v) T3("lu", s, v) 2273#define R3(fmt_spec, s, v) S3(fmt_spec, s, rx[i].v) 2274#define R(s, v) S3("u", s, rx[i].v) 2275#define RL(s, v) R3("lu", s, v) 2276 2277 if (r < eth_entries) { 2278 int base_qset = r * 4; 2279 const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset]; 2280 const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset]; 2281 int n = min(4, adap->sge.ethqsets - 4 * r); 2282 2283 S("QType:", "Ethernet"); 2284 S("Interface:", 2285 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A"); 2286 T("TxQ ID:", q.cntxt_id); 2287 T("TxQ size:", q.size); 2288 T("TxQ inuse:", q.in_use); 2289 T("TxQ CIDX:", q.cidx); 2290 T("TxQ PIDX:", q.pidx); 2291#ifdef CONFIG_CHELSIO_T4_DCB 2292 T("DCB Prio:", dcb_prio); 2293 S3("u", "DCB PGID:", 2294 (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >> 2295 4*(7-tx[i].dcb_prio)) & 0xf); 2296 S3("u", "DCB PFC:", 2297 (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >> 2298 1*(7-tx[i].dcb_prio)) & 0x1); 2299#endif 2300 R("RspQ ID:", rspq.abs_id); 2301 R("RspQ size:", rspq.size); 2302 R("RspQE size:", rspq.iqe_len); 2303 R("RspQ CIDX:", rspq.cidx); 2304 R("RspQ Gen:", rspq.gen); 2305 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq)); 2306 S3("u", "Intr pktcnt:", 2307 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]); 2308 R("FL ID:", fl.cntxt_id); 2309 R("FL size:", fl.size - 8); 2310 R("FL pend:", fl.pend_cred); 2311 R("FL avail:", fl.avail); 2312 R("FL PIDX:", fl.pidx); 2313 R("FL CIDX:", fl.cidx); 2314 RL("RxPackets:", stats.pkts); 2315 RL("RxCSO:", stats.rx_cso); 2316 RL("VLANxtract:", stats.vlan_ex); 2317 RL("LROmerged:", stats.lro_merged); 2318 RL("LROpackets:", stats.lro_pkts); 2319 RL("RxDrops:", stats.rx_drops); 2320 TL("TSO:", tso); 2321 TL("TxCSO:", tx_cso); 2322 TL("VLANins:", vlan_ins); 2323 TL("TxQFull:", q.stops); 2324 TL("TxQRestarts:", q.restarts); 2325 TL("TxMapErr:", mapping_err); 2326 RL("FLAllocErr:", fl.alloc_failed); 2327 RL("FLLrgAlcErr:", fl.large_alloc_failed); 2328 RL("FLStarving:", fl.starving); 2329 2330 } else if (iscsi_idx < iscsi_entries) { 2331 const struct sge_ofld_rxq *rx = 2332 &adap->sge.ofldrxq[iscsi_idx * 4]; 2333 const struct sge_ofld_txq *tx = 2334 &adap->sge.ofldtxq[iscsi_idx * 4]; 2335 int n = min(4, adap->sge.ofldqsets - 4 * iscsi_idx); 2336 2337 S("QType:", "iSCSI"); 2338 T("TxQ ID:", q.cntxt_id); 2339 T("TxQ size:", q.size); 2340 T("TxQ inuse:", q.in_use); 2341 T("TxQ CIDX:", q.cidx); 2342 T("TxQ PIDX:", q.pidx); 2343 R("RspQ ID:", rspq.abs_id); 2344 R("RspQ size:", rspq.size); 2345 R("RspQE size:", rspq.iqe_len); 2346 R("RspQ CIDX:", rspq.cidx); 2347 R("RspQ Gen:", rspq.gen); 2348 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq)); 2349 S3("u", "Intr pktcnt:", 2350 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]); 2351 R("FL ID:", fl.cntxt_id); 2352 R("FL size:", fl.size - 8); 2353 R("FL pend:", fl.pend_cred); 2354 R("FL avail:", fl.avail); 2355 R("FL PIDX:", fl.pidx); 2356 R("FL CIDX:", fl.cidx); 2357 RL("RxPackets:", stats.pkts); 2358 RL("RxImmPkts:", stats.imm); 2359 RL("RxNoMem:", stats.nomem); 2360 RL("FLAllocErr:", fl.alloc_failed); 2361 RL("FLLrgAlcErr:", fl.large_alloc_failed); 2362 RL("FLStarving:", fl.starving); 2363 2364 } else if (rdma_idx < rdma_entries) { 2365 const struct sge_ofld_rxq *rx = 2366 &adap->sge.rdmarxq[rdma_idx * 4]; 2367 int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx); 2368 2369 S("QType:", "RDMA-CPL"); 2370 S("Interface:", 2371 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A"); 2372 R("RspQ ID:", rspq.abs_id); 2373 R("RspQ size:", rspq.size); 2374 R("RspQE size:", rspq.iqe_len); 2375 R("RspQ CIDX:", rspq.cidx); 2376 R("RspQ Gen:", rspq.gen); 2377 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq)); 2378 S3("u", "Intr pktcnt:", 2379 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]); 2380 R("FL ID:", fl.cntxt_id); 2381 R("FL size:", fl.size - 8); 2382 R("FL pend:", fl.pend_cred); 2383 R("FL avail:", fl.avail); 2384 R("FL PIDX:", fl.pidx); 2385 R("FL CIDX:", fl.cidx); 2386 RL("RxPackets:", stats.pkts); 2387 RL("RxImmPkts:", stats.imm); 2388 RL("RxNoMem:", stats.nomem); 2389 RL("FLAllocErr:", fl.alloc_failed); 2390 RL("FLLrgAlcErr:", fl.large_alloc_failed); 2391 RL("FLStarving:", fl.starving); 2392 2393 } else if (ciq_idx < ciq_entries) { 2394 const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4]; 2395 int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx); 2396 2397 S("QType:", "RDMA-CIQ"); 2398 S("Interface:", 2399 rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A"); 2400 R("RspQ ID:", rspq.abs_id); 2401 R("RspQ size:", rspq.size); 2402 R("RspQE size:", rspq.iqe_len); 2403 R("RspQ CIDX:", rspq.cidx); 2404 R("RspQ Gen:", rspq.gen); 2405 S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq)); 2406 S3("u", "Intr pktcnt:", 2407 adap->sge.counter_val[rx[i].rspq.pktcnt_idx]); 2408 RL("RxAN:", stats.an); 2409 RL("RxNoMem:", stats.nomem); 2410 2411 } else if (ctrl_idx < ctrl_entries) { 2412 const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4]; 2413 int n = min(4, adap->params.nports - 4 * ctrl_idx); 2414 2415 S("QType:", "Control"); 2416 T("TxQ ID:", q.cntxt_id); 2417 T("TxQ size:", q.size); 2418 T("TxQ inuse:", q.in_use); 2419 T("TxQ CIDX:", q.cidx); 2420 T("TxQ PIDX:", q.pidx); 2421 TL("TxQFull:", q.stops); 2422 TL("TxQRestarts:", q.restarts); 2423 } else if (fq_idx == 0) { 2424 const struct sge_rspq *evtq = &adap->sge.fw_evtq; 2425 2426 seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue"); 2427 seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id); 2428 seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size); 2429 seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len); 2430 seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx); 2431 seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen); 2432 seq_printf(seq, "%-12s %16u\n", "Intr delay:", 2433 qtimer_val(adap, evtq)); 2434 seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:", 2435 adap->sge.counter_val[evtq->pktcnt_idx]); 2436 } 2437#undef R 2438#undef RL 2439#undef T 2440#undef TL 2441#undef S 2442#undef R3 2443#undef T3 2444#undef S3 2445 return 0; 2446} 2447 2448static int sge_queue_entries(const struct adapter *adap) 2449{ 2450 return DIV_ROUND_UP(adap->sge.ethqsets, 4) + 2451 DIV_ROUND_UP(adap->sge.ofldqsets, 4) + 2452 DIV_ROUND_UP(adap->sge.rdmaqs, 4) + 2453 DIV_ROUND_UP(adap->sge.rdmaciqs, 4) + 2454 DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1; 2455} 2456 2457static void *sge_queue_start(struct seq_file *seq, loff_t *pos) 2458{ 2459 int entries = sge_queue_entries(seq->private); 2460 2461 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL; 2462} 2463 2464static void sge_queue_stop(struct seq_file *seq, void *v) 2465{ 2466} 2467 2468static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos) 2469{ 2470 int entries = sge_queue_entries(seq->private); 2471 2472 ++*pos; 2473 return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL; 2474} 2475 2476static const struct seq_operations sge_qinfo_seq_ops = { 2477 .start = sge_queue_start, 2478 .next = sge_queue_next, 2479 .stop = sge_queue_stop, 2480 .show = sge_qinfo_show 2481}; 2482 2483static int sge_qinfo_open(struct inode *inode, struct file *file) 2484{ 2485 int res = seq_open(file, &sge_qinfo_seq_ops); 2486 2487 if (!res) { 2488 struct seq_file *seq = file->private_data; 2489 2490 seq->private = inode->i_private; 2491 } 2492 return res; 2493} 2494 2495static const struct file_operations sge_qinfo_debugfs_fops = { 2496 .owner = THIS_MODULE, 2497 .open = sge_qinfo_open, 2498 .read = seq_read, 2499 .llseek = seq_lseek, 2500 .release = seq_release, 2501}; 2502 2503int mem_open(struct inode *inode, struct file *file) 2504{ 2505 unsigned int mem; 2506 struct adapter *adap; 2507 2508 file->private_data = inode->i_private; 2509 2510 mem = (uintptr_t)file->private_data & 0x3; 2511 adap = file->private_data - mem; 2512 2513 (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH); 2514 2515 return 0; 2516} 2517 2518static ssize_t mem_read(struct file *file, char __user *buf, size_t count, 2519 loff_t *ppos) 2520{ 2521 loff_t pos = *ppos; 2522 loff_t avail = file_inode(file)->i_size; 2523 unsigned int mem = (uintptr_t)file->private_data & 3; 2524 struct adapter *adap = file->private_data - mem; 2525 __be32 *data; 2526 int ret; 2527 2528 if (pos < 0) 2529 return -EINVAL; 2530 if (pos >= avail) 2531 return 0; 2532 if (count > avail - pos) 2533 count = avail - pos; 2534 2535 data = t4_alloc_mem(count); 2536 if (!data) 2537 return -ENOMEM; 2538 2539 spin_lock(&adap->win0_lock); 2540 ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ); 2541 spin_unlock(&adap->win0_lock); 2542 if (ret) { 2543 t4_free_mem(data); 2544 return ret; 2545 } 2546 ret = copy_to_user(buf, data, count); 2547 2548 t4_free_mem(data); 2549 if (ret) 2550 return -EFAULT; 2551 2552 *ppos = pos + count; 2553 return count; 2554} 2555static const struct file_operations mem_debugfs_fops = { 2556 .owner = THIS_MODULE, 2557 .open = simple_open, 2558 .read = mem_read, 2559 .llseek = default_llseek, 2560}; 2561 2562static int tid_info_show(struct seq_file *seq, void *v) 2563{ 2564 struct adapter *adap = seq->private; 2565 const struct tid_info *t = &adap->tids; 2566 enum chip_type chip = CHELSIO_CHIP_VERSION(adap->params.chip); 2567 2568 if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) { 2569 unsigned int sb; 2570 2571 if (chip <= CHELSIO_T5) 2572 sb = t4_read_reg(adap, LE_DB_SERVER_INDEX_A) / 4; 2573 else 2574 sb = t4_read_reg(adap, LE_DB_SRVR_START_INDEX_A); 2575 2576 if (sb) { 2577 seq_printf(seq, "TID range: 0..%u/%u..%u", sb - 1, 2578 adap->tids.hash_base, 2579 t->ntids - 1); 2580 seq_printf(seq, ", in use: %u/%u\n", 2581 atomic_read(&t->tids_in_use), 2582 atomic_read(&t->hash_tids_in_use)); 2583 } else if (adap->flags & FW_OFLD_CONN) { 2584 seq_printf(seq, "TID range: %u..%u/%u..%u", 2585 t->aftid_base, 2586 t->aftid_end, 2587 adap->tids.hash_base, 2588 t->ntids - 1); 2589 seq_printf(seq, ", in use: %u/%u\n", 2590 atomic_read(&t->tids_in_use), 2591 atomic_read(&t->hash_tids_in_use)); 2592 } else { 2593 seq_printf(seq, "TID range: %u..%u", 2594 adap->tids.hash_base, 2595 t->ntids - 1); 2596 seq_printf(seq, ", in use: %u\n", 2597 atomic_read(&t->hash_tids_in_use)); 2598 } 2599 } else if (t->ntids) { 2600 seq_printf(seq, "TID range: 0..%u", t->ntids - 1); 2601 seq_printf(seq, ", in use: %u\n", 2602 atomic_read(&t->tids_in_use)); 2603 } 2604 2605 if (t->nstids) 2606 seq_printf(seq, "STID range: %u..%u, in use: %u\n", 2607 (!t->stid_base && 2608 (chip <= CHELSIO_T5)) ? 2609 t->stid_base + 1 : t->stid_base, 2610 t->stid_base + t->nstids - 1, t->stids_in_use); 2611 if (t->natids) 2612 seq_printf(seq, "ATID range: 0..%u, in use: %u\n", 2613 t->natids - 1, t->atids_in_use); 2614 seq_printf(seq, "FTID range: %u..%u\n", t->ftid_base, 2615 t->ftid_base + t->nftids - 1); 2616 if (t->nsftids) 2617 seq_printf(seq, "SFTID range: %u..%u in use: %u\n", 2618 t->sftid_base, t->sftid_base + t->nsftids - 2, 2619 t->sftids_in_use); 2620 if (t->ntids) 2621 seq_printf(seq, "HW TID usage: %u IP users, %u IPv6 users\n", 2622 t4_read_reg(adap, LE_DB_ACT_CNT_IPV4_A), 2623 t4_read_reg(adap, LE_DB_ACT_CNT_IPV6_A)); 2624 return 0; 2625} 2626 2627DEFINE_SIMPLE_DEBUGFS_FILE(tid_info); 2628 2629static void add_debugfs_mem(struct adapter *adap, const char *name, 2630 unsigned int idx, unsigned int size_mb) 2631{ 2632 debugfs_create_file_size(name, S_IRUSR, adap->debugfs_root, 2633 (void *)adap + idx, &mem_debugfs_fops, 2634 size_mb << 20); 2635} 2636 2637static int blocked_fl_open(struct inode *inode, struct file *file) 2638{ 2639 file->private_data = inode->i_private; 2640 return 0; 2641} 2642 2643static ssize_t blocked_fl_read(struct file *filp, char __user *ubuf, 2644 size_t count, loff_t *ppos) 2645{ 2646 int len; 2647 const struct adapter *adap = filp->private_data; 2648 char *buf; 2649 ssize_t size = (adap->sge.egr_sz + 3) / 4 + 2650 adap->sge.egr_sz / 32 + 2; /* includes ,/\n/\0 */ 2651 2652 buf = kzalloc(size, GFP_KERNEL); 2653 if (!buf) 2654 return -ENOMEM; 2655 2656 len = snprintf(buf, size - 1, "%*pb\n", 2657 adap->sge.egr_sz, adap->sge.blocked_fl); 2658 len += sprintf(buf + len, "\n"); 2659 size = simple_read_from_buffer(ubuf, count, ppos, buf, len); 2660 t4_free_mem(buf); 2661 return size; 2662} 2663 2664static ssize_t blocked_fl_write(struct file *filp, const char __user *ubuf, 2665 size_t count, loff_t *ppos) 2666{ 2667 int err; 2668 unsigned long *t; 2669 struct adapter *adap = filp->private_data; 2670 2671 t = kcalloc(BITS_TO_LONGS(adap->sge.egr_sz), sizeof(long), GFP_KERNEL); 2672 if (!t) 2673 return -ENOMEM; 2674 2675 err = bitmap_parse_user(ubuf, count, t, adap->sge.egr_sz); 2676 if (err) 2677 return err; 2678 2679 bitmap_copy(adap->sge.blocked_fl, t, adap->sge.egr_sz); 2680 t4_free_mem(t); 2681 return count; 2682} 2683 2684static const struct file_operations blocked_fl_fops = { 2685 .owner = THIS_MODULE, 2686 .open = blocked_fl_open, 2687 .read = blocked_fl_read, 2688 .write = blocked_fl_write, 2689 .llseek = generic_file_llseek, 2690}; 2691 2692struct mem_desc { 2693 unsigned int base; 2694 unsigned int limit; 2695 unsigned int idx; 2696}; 2697 2698static int mem_desc_cmp(const void *a, const void *b) 2699{ 2700 return ((const struct mem_desc *)a)->base - 2701 ((const struct mem_desc *)b)->base; 2702} 2703 2704static void mem_region_show(struct seq_file *seq, const char *name, 2705 unsigned int from, unsigned int to) 2706{ 2707 char buf[40]; 2708 2709 string_get_size((u64)to - from + 1, 1, STRING_UNITS_2, buf, 2710 sizeof(buf)); 2711 seq_printf(seq, "%-15s %#x-%#x [%s]\n", name, from, to, buf); 2712} 2713 2714static int meminfo_show(struct seq_file *seq, void *v) 2715{ 2716 static const char * const memory[] = { "EDC0:", "EDC1:", "MC:", 2717 "MC0:", "MC1:"}; 2718 static const char * const region[] = { 2719 "DBQ contexts:", "IMSG contexts:", "FLM cache:", "TCBs:", 2720 "Pstructs:", "Timers:", "Rx FL:", "Tx FL:", "Pstruct FL:", 2721 "Tx payload:", "Rx payload:", "LE hash:", "iSCSI region:", 2722 "TDDP region:", "TPT region:", "STAG region:", "RQ region:", 2723 "RQUDP region:", "PBL region:", "TXPBL region:", 2724 "DBVFIFO region:", "ULPRX state:", "ULPTX state:", 2725 "On-chip queues:" 2726 }; 2727 2728 int i, n; 2729 u32 lo, hi, used, alloc; 2730 struct mem_desc avail[4]; 2731 struct mem_desc mem[ARRAY_SIZE(region) + 3]; /* up to 3 holes */ 2732 struct mem_desc *md = mem; 2733 struct adapter *adap = seq->private; 2734 2735 for (i = 0; i < ARRAY_SIZE(mem); i++) { 2736 mem[i].limit = 0; 2737 mem[i].idx = i; 2738 } 2739 2740 /* Find and sort the populated memory ranges */ 2741 i = 0; 2742 lo = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A); 2743 if (lo & EDRAM0_ENABLE_F) { 2744 hi = t4_read_reg(adap, MA_EDRAM0_BAR_A); 2745 avail[i].base = EDRAM0_BASE_G(hi) << 20; 2746 avail[i].limit = avail[i].base + (EDRAM0_SIZE_G(hi) << 20); 2747 avail[i].idx = 0; 2748 i++; 2749 } 2750 if (lo & EDRAM1_ENABLE_F) { 2751 hi = t4_read_reg(adap, MA_EDRAM1_BAR_A); 2752 avail[i].base = EDRAM1_BASE_G(hi) << 20; 2753 avail[i].limit = avail[i].base + (EDRAM1_SIZE_G(hi) << 20); 2754 avail[i].idx = 1; 2755 i++; 2756 } 2757 2758 if (is_t5(adap->params.chip)) { 2759 if (lo & EXT_MEM0_ENABLE_F) { 2760 hi = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A); 2761 avail[i].base = EXT_MEM0_BASE_G(hi) << 20; 2762 avail[i].limit = 2763 avail[i].base + (EXT_MEM0_SIZE_G(hi) << 20); 2764 avail[i].idx = 3; 2765 i++; 2766 } 2767 if (lo & EXT_MEM1_ENABLE_F) { 2768 hi = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A); 2769 avail[i].base = EXT_MEM1_BASE_G(hi) << 20; 2770 avail[i].limit = 2771 avail[i].base + (EXT_MEM1_SIZE_G(hi) << 20); 2772 avail[i].idx = 4; 2773 i++; 2774 } 2775 } else { 2776 if (lo & EXT_MEM_ENABLE_F) { 2777 hi = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A); 2778 avail[i].base = EXT_MEM_BASE_G(hi) << 20; 2779 avail[i].limit = 2780 avail[i].base + (EXT_MEM_SIZE_G(hi) << 20); 2781 avail[i].idx = 2; 2782 i++; 2783 } 2784 } 2785 if (!i) /* no memory available */ 2786 return 0; 2787 sort(avail, i, sizeof(struct mem_desc), mem_desc_cmp, NULL); 2788 2789 (md++)->base = t4_read_reg(adap, SGE_DBQ_CTXT_BADDR_A); 2790 (md++)->base = t4_read_reg(adap, SGE_IMSG_CTXT_BADDR_A); 2791 (md++)->base = t4_read_reg(adap, SGE_FLM_CACHE_BADDR_A); 2792 (md++)->base = t4_read_reg(adap, TP_CMM_TCB_BASE_A); 2793 (md++)->base = t4_read_reg(adap, TP_CMM_MM_BASE_A); 2794 (md++)->base = t4_read_reg(adap, TP_CMM_TIMER_BASE_A); 2795 (md++)->base = t4_read_reg(adap, TP_CMM_MM_RX_FLST_BASE_A); 2796 (md++)->base = t4_read_reg(adap, TP_CMM_MM_TX_FLST_BASE_A); 2797 (md++)->base = t4_read_reg(adap, TP_CMM_MM_PS_FLST_BASE_A); 2798 2799 /* the next few have explicit upper bounds */ 2800 md->base = t4_read_reg(adap, TP_PMM_TX_BASE_A); 2801 md->limit = md->base - 1 + 2802 t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A) * 2803 PMTXMAXPAGE_G(t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A)); 2804 md++; 2805 2806 md->base = t4_read_reg(adap, TP_PMM_RX_BASE_A); 2807 md->limit = md->base - 1 + 2808 t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) * 2809 PMRXMAXPAGE_G(t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A)); 2810 md++; 2811 2812 if (t4_read_reg(adap, LE_DB_CONFIG_A) & HASHEN_F) { 2813 if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5) { 2814 hi = t4_read_reg(adap, LE_DB_TID_HASHBASE_A) / 4; 2815 md->base = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A); 2816 } else { 2817 hi = t4_read_reg(adap, LE_DB_HASH_TID_BASE_A); 2818 md->base = t4_read_reg(adap, 2819 LE_DB_HASH_TBL_BASE_ADDR_A); 2820 } 2821 md->limit = 0; 2822 } else { 2823 md->base = 0; 2824 md->idx = ARRAY_SIZE(region); /* hide it */ 2825 } 2826 md++; 2827 2828#define ulp_region(reg) do { \ 2829 md->base = t4_read_reg(adap, ULP_ ## reg ## _LLIMIT_A);\ 2830 (md++)->limit = t4_read_reg(adap, ULP_ ## reg ## _ULIMIT_A); \ 2831} while (0) 2832 2833 ulp_region(RX_ISCSI); 2834 ulp_region(RX_TDDP); 2835 ulp_region(TX_TPT); 2836 ulp_region(RX_STAG); 2837 ulp_region(RX_RQ); 2838 ulp_region(RX_RQUDP); 2839 ulp_region(RX_PBL); 2840 ulp_region(TX_PBL); 2841#undef ulp_region 2842 md->base = 0; 2843 md->idx = ARRAY_SIZE(region); 2844 if (!is_t4(adap->params.chip)) { 2845 u32 size = 0; 2846 u32 sge_ctrl = t4_read_reg(adap, SGE_CONTROL2_A); 2847 u32 fifo_size = t4_read_reg(adap, SGE_DBVFIFO_SIZE_A); 2848 2849 if (is_t5(adap->params.chip)) { 2850 if (sge_ctrl & VFIFO_ENABLE_F) 2851 size = DBVFIFO_SIZE_G(fifo_size); 2852 } else { 2853 size = T6_DBVFIFO_SIZE_G(fifo_size); 2854 } 2855 2856 if (size) { 2857 md->base = BASEADDR_G(t4_read_reg(adap, 2858 SGE_DBVFIFO_BADDR_A)); 2859 md->limit = md->base + (size << 2) - 1; 2860 } 2861 } 2862 2863 md++; 2864 2865 md->base = t4_read_reg(adap, ULP_RX_CTX_BASE_A); 2866 md->limit = 0; 2867 md++; 2868 md->base = t4_read_reg(adap, ULP_TX_ERR_TABLE_BASE_A); 2869 md->limit = 0; 2870 md++; 2871 2872 md->base = adap->vres.ocq.start; 2873 if (adap->vres.ocq.size) 2874 md->limit = md->base + adap->vres.ocq.size - 1; 2875 else 2876 md->idx = ARRAY_SIZE(region); /* hide it */ 2877 md++; 2878 2879 /* add any address-space holes, there can be up to 3 */ 2880 for (n = 0; n < i - 1; n++) 2881 if (avail[n].limit < avail[n + 1].base) 2882 (md++)->base = avail[n].limit; 2883 if (avail[n].limit) 2884 (md++)->base = avail[n].limit; 2885 2886 n = md - mem; 2887 sort(mem, n, sizeof(struct mem_desc), mem_desc_cmp, NULL); 2888 2889 for (lo = 0; lo < i; lo++) 2890 mem_region_show(seq, memory[avail[lo].idx], avail[lo].base, 2891 avail[lo].limit - 1); 2892 2893 seq_putc(seq, '\n'); 2894 for (i = 0; i < n; i++) { 2895 if (mem[i].idx >= ARRAY_SIZE(region)) 2896 continue; /* skip holes */ 2897 if (!mem[i].limit) 2898 mem[i].limit = i < n - 1 ? mem[i + 1].base - 1 : ~0; 2899 mem_region_show(seq, region[mem[i].idx], mem[i].base, 2900 mem[i].limit); 2901 } 2902 2903 seq_putc(seq, '\n'); 2904 lo = t4_read_reg(adap, CIM_SDRAM_BASE_ADDR_A); 2905 hi = t4_read_reg(adap, CIM_SDRAM_ADDR_SIZE_A) + lo - 1; 2906 mem_region_show(seq, "uP RAM:", lo, hi); 2907 2908 lo = t4_read_reg(adap, CIM_EXTMEM2_BASE_ADDR_A); 2909 hi = t4_read_reg(adap, CIM_EXTMEM2_ADDR_SIZE_A) + lo - 1; 2910 mem_region_show(seq, "uP Extmem2:", lo, hi); 2911 2912 lo = t4_read_reg(adap, TP_PMM_RX_MAX_PAGE_A); 2913 seq_printf(seq, "\n%u Rx pages of size %uKiB for %u channels\n", 2914 PMRXMAXPAGE_G(lo), 2915 t4_read_reg(adap, TP_PMM_RX_PAGE_SIZE_A) >> 10, 2916 (lo & PMRXNUMCHN_F) ? 2 : 1); 2917 2918 lo = t4_read_reg(adap, TP_PMM_TX_MAX_PAGE_A); 2919 hi = t4_read_reg(adap, TP_PMM_TX_PAGE_SIZE_A); 2920 seq_printf(seq, "%u Tx pages of size %u%ciB for %u channels\n", 2921 PMTXMAXPAGE_G(lo), 2922 hi >= (1 << 20) ? (hi >> 20) : (hi >> 10), 2923 hi >= (1 << 20) ? 'M' : 'K', 1 << PMTXNUMCHN_G(lo)); 2924 seq_printf(seq, "%u p-structs\n\n", 2925 t4_read_reg(adap, TP_CMM_MM_MAX_PSTRUCT_A)); 2926 2927 for (i = 0; i < 4; i++) { 2928 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) 2929 lo = t4_read_reg(adap, MPS_RX_MAC_BG_PG_CNT0_A + i * 4); 2930 else 2931 lo = t4_read_reg(adap, MPS_RX_PG_RSV0_A + i * 4); 2932 if (is_t5(adap->params.chip)) { 2933 used = T5_USED_G(lo); 2934 alloc = T5_ALLOC_G(lo); 2935 } else { 2936 used = USED_G(lo); 2937 alloc = ALLOC_G(lo); 2938 } 2939 /* For T6 these are MAC buffer groups */ 2940 seq_printf(seq, "Port %d using %u pages out of %u allocated\n", 2941 i, used, alloc); 2942 } 2943 for (i = 0; i < adap->params.arch.nchan; i++) { 2944 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) 2945 lo = t4_read_reg(adap, 2946 MPS_RX_LPBK_BG_PG_CNT0_A + i * 4); 2947 else 2948 lo = t4_read_reg(adap, MPS_RX_PG_RSV4_A + i * 4); 2949 if (is_t5(adap->params.chip)) { 2950 used = T5_USED_G(lo); 2951 alloc = T5_ALLOC_G(lo); 2952 } else { 2953 used = USED_G(lo); 2954 alloc = ALLOC_G(lo); 2955 } 2956 /* For T6 these are MAC buffer groups */ 2957 seq_printf(seq, 2958 "Loopback %d using %u pages out of %u allocated\n", 2959 i, used, alloc); 2960 } 2961 return 0; 2962} 2963 2964static int meminfo_open(struct inode *inode, struct file *file) 2965{ 2966 return single_open(file, meminfo_show, inode->i_private); 2967} 2968 2969static const struct file_operations meminfo_fops = { 2970 .owner = THIS_MODULE, 2971 .open = meminfo_open, 2972 .read = seq_read, 2973 .llseek = seq_lseek, 2974 .release = single_release, 2975}; 2976/* Add an array of Debug FS files. 2977 */ 2978void add_debugfs_files(struct adapter *adap, 2979 struct t4_debugfs_entry *files, 2980 unsigned int nfiles) 2981{ 2982 int i; 2983 2984 /* debugfs support is best effort */ 2985 for (i = 0; i < nfiles; i++) 2986 debugfs_create_file(files[i].name, files[i].mode, 2987 adap->debugfs_root, 2988 (void *)adap + files[i].data, 2989 files[i].ops); 2990} 2991 2992int t4_setup_debugfs(struct adapter *adap) 2993{ 2994 int i; 2995 u32 size = 0; 2996 struct dentry *de; 2997 2998 static struct t4_debugfs_entry t4_debugfs_files[] = { 2999 { "cim_la", &cim_la_fops, S_IRUSR, 0 }, 3000 { "cim_pif_la", &cim_pif_la_fops, S_IRUSR, 0 }, 3001 { "cim_ma_la", &cim_ma_la_fops, S_IRUSR, 0 }, 3002 { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 }, 3003 { "clk", &clk_debugfs_fops, S_IRUSR, 0 }, 3004 { "devlog", &devlog_fops, S_IRUSR, 0 }, 3005 { "mbox0", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 0 }, 3006 { "mbox1", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 1 }, 3007 { "mbox2", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 2 }, 3008 { "mbox3", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 3 }, 3009 { "mbox4", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 4 }, 3010 { "mbox5", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 5 }, 3011 { "mbox6", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 6 }, 3012 { "mbox7", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 7 }, 3013 { "trace0", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 0 }, 3014 { "trace1", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 1 }, 3015 { "trace2", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 2 }, 3016 { "trace3", &mps_trc_debugfs_fops, S_IRUSR | S_IWUSR, 3 }, 3017 { "l2t", &t4_l2t_fops, S_IRUSR, 0}, 3018 { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 }, 3019 { "rss", &rss_debugfs_fops, S_IRUSR, 0 }, 3020 { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 }, 3021 { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 }, 3022 { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 }, 3023 { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 }, 3024 { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 }, 3025 { "ibq_tp0", &cim_ibq_fops, S_IRUSR, 0 }, 3026 { "ibq_tp1", &cim_ibq_fops, S_IRUSR, 1 }, 3027 { "ibq_ulp", &cim_ibq_fops, S_IRUSR, 2 }, 3028 { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 }, 3029 { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 }, 3030 { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 }, 3031 { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 }, 3032 { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 }, 3033 { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 }, 3034 { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 }, 3035 { "obq_sge", &cim_obq_fops, S_IRUSR, 4 }, 3036 { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 }, 3037 { "tp_la", &tp_la_fops, S_IRUSR, 0 }, 3038 { "ulprx_la", &ulprx_la_fops, S_IRUSR, 0 }, 3039 { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 }, 3040 { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 }, 3041 { "tx_rate", &tx_rate_debugfs_fops, S_IRUSR, 0 }, 3042 { "cctrl", &cctrl_tbl_debugfs_fops, S_IRUSR, 0 }, 3043#if IS_ENABLED(CONFIG_IPV6) 3044 { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 }, 3045#endif 3046 { "tids", &tid_info_debugfs_fops, S_IRUSR, 0}, 3047 { "blocked_fl", &blocked_fl_fops, S_IRUSR | S_IWUSR, 0 }, 3048 { "meminfo", &meminfo_fops, S_IRUSR, 0 }, 3049 }; 3050 3051 /* Debug FS nodes common to all T5 and later adapters. 3052 */ 3053 static struct t4_debugfs_entry t5_debugfs_files[] = { 3054 { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 }, 3055 { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 }, 3056 }; 3057 3058 add_debugfs_files(adap, 3059 t4_debugfs_files, 3060 ARRAY_SIZE(t4_debugfs_files)); 3061 if (!is_t4(adap->params.chip)) 3062 add_debugfs_files(adap, 3063 t5_debugfs_files, 3064 ARRAY_SIZE(t5_debugfs_files)); 3065 3066 i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A); 3067 if (i & EDRAM0_ENABLE_F) { 3068 size = t4_read_reg(adap, MA_EDRAM0_BAR_A); 3069 add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size)); 3070 } 3071 if (i & EDRAM1_ENABLE_F) { 3072 size = t4_read_reg(adap, MA_EDRAM1_BAR_A); 3073 add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size)); 3074 } 3075 if (is_t5(adap->params.chip)) { 3076 if (i & EXT_MEM0_ENABLE_F) { 3077 size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A); 3078 add_debugfs_mem(adap, "mc0", MEM_MC0, 3079 EXT_MEM0_SIZE_G(size)); 3080 } 3081 if (i & EXT_MEM1_ENABLE_F) { 3082 size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A); 3083 add_debugfs_mem(adap, "mc1", MEM_MC1, 3084 EXT_MEM1_SIZE_G(size)); 3085 } 3086 } else { 3087 if (i & EXT_MEM_ENABLE_F) { 3088 size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A); 3089 add_debugfs_mem(adap, "mc", MEM_MC, 3090 EXT_MEM_SIZE_G(size)); 3091 } 3092 } 3093 3094 de = debugfs_create_file_size("flash", S_IRUSR, adap->debugfs_root, adap, 3095 &flash_debugfs_fops, adap->params.sf_size); 3096 debugfs_create_bool("use_backdoor", S_IWUSR | S_IRUSR, 3097 adap->debugfs_root, &adap->use_bd); 3098 debugfs_create_bool("trace_rss", S_IWUSR | S_IRUSR, 3099 adap->debugfs_root, &adap->trace_rss); 3100 3101 return 0; 3102} 3103