1/* 2 * 3 * Toshiba T7L66XB core mfd support 4 * 5 * Copyright (c) 2005, 2007, 2008 Ian Molton 6 * Copyright (c) 2008 Dmitry Baryshkov 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * T7L66 features: 13 * 14 * Supported in this driver: 15 * SD/MMC 16 * SM/NAND flash controller 17 * 18 * As yet not supported 19 * GPIO interface (on NAND pins) 20 * Serial interface 21 * TFT 'interface converter' 22 * PCMCIA interface logic 23 */ 24 25#include <linux/kernel.h> 26#include <linux/module.h> 27#include <linux/err.h> 28#include <linux/io.h> 29#include <linux/slab.h> 30#include <linux/irq.h> 31#include <linux/clk.h> 32#include <linux/platform_device.h> 33#include <linux/mfd/core.h> 34#include <linux/mfd/tmio.h> 35#include <linux/mfd/t7l66xb.h> 36 37enum { 38 T7L66XB_CELL_NAND, 39 T7L66XB_CELL_MMC, 40}; 41 42static const struct resource t7l66xb_mmc_resources[] = { 43 { 44 .start = 0x800, 45 .end = 0x9ff, 46 .flags = IORESOURCE_MEM, 47 }, 48 { 49 .start = IRQ_T7L66XB_MMC, 50 .end = IRQ_T7L66XB_MMC, 51 .flags = IORESOURCE_IRQ, 52 }, 53}; 54 55#define SCR_REVID 0x08 /* b Revision ID */ 56#define SCR_IMR 0x42 /* b Interrupt Mask */ 57#define SCR_DEV_CTL 0xe0 /* b Device control */ 58#define SCR_ISR 0xe1 /* b Interrupt Status */ 59#define SCR_GPO_OC 0xf0 /* b GPO output control */ 60#define SCR_GPO_OS 0xf1 /* b GPO output enable */ 61#define SCR_GPI_S 0xf2 /* w GPI status */ 62#define SCR_APDC 0xf8 /* b Active pullup down ctrl */ 63 64#define SCR_DEV_CTL_USB BIT(0) /* USB enable */ 65#define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */ 66 67/*--------------------------------------------------------------------------*/ 68 69struct t7l66xb { 70 void __iomem *scr; 71 /* Lock to protect registers requiring read/modify/write ops. */ 72 spinlock_t lock; 73 74 struct resource rscr; 75 struct clk *clk48m; 76 struct clk *clk32k; 77 int irq; 78 int irq_base; 79}; 80 81/*--------------------------------------------------------------------------*/ 82 83static int t7l66xb_mmc_enable(struct platform_device *mmc) 84{ 85 struct platform_device *dev = to_platform_device(mmc->dev.parent); 86 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 87 unsigned long flags; 88 u8 dev_ctl; 89 90 clk_prepare_enable(t7l66xb->clk32k); 91 92 spin_lock_irqsave(&t7l66xb->lock, flags); 93 94 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); 95 dev_ctl |= SCR_DEV_CTL_MMC; 96 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); 97 98 spin_unlock_irqrestore(&t7l66xb->lock, flags); 99 100 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0, 101 t7l66xb_mmc_resources[0].start & 0xfffe); 102 103 return 0; 104} 105 106static int t7l66xb_mmc_disable(struct platform_device *mmc) 107{ 108 struct platform_device *dev = to_platform_device(mmc->dev.parent); 109 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 110 unsigned long flags; 111 u8 dev_ctl; 112 113 spin_lock_irqsave(&t7l66xb->lock, flags); 114 115 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); 116 dev_ctl &= ~SCR_DEV_CTL_MMC; 117 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); 118 119 spin_unlock_irqrestore(&t7l66xb->lock, flags); 120 121 clk_disable_unprepare(t7l66xb->clk32k); 122 123 return 0; 124} 125 126static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state) 127{ 128 struct platform_device *dev = to_platform_device(mmc->dev.parent); 129 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 130 131 tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state); 132} 133 134static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state) 135{ 136 struct platform_device *dev = to_platform_device(mmc->dev.parent); 137 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 138 139 tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state); 140} 141 142/*--------------------------------------------------------------------------*/ 143 144static struct tmio_mmc_data t7166xb_mmc_data = { 145 .hclk = 24000000, 146 .set_pwr = t7l66xb_mmc_pwr, 147 .set_clk_div = t7l66xb_mmc_clk_div, 148}; 149 150static const struct resource t7l66xb_nand_resources[] = { 151 { 152 .start = 0xc00, 153 .end = 0xc07, 154 .flags = IORESOURCE_MEM, 155 }, 156 { 157 .start = 0x0100, 158 .end = 0x01ff, 159 .flags = IORESOURCE_MEM, 160 }, 161 { 162 .start = IRQ_T7L66XB_NAND, 163 .end = IRQ_T7L66XB_NAND, 164 .flags = IORESOURCE_IRQ, 165 }, 166}; 167 168static struct mfd_cell t7l66xb_cells[] = { 169 [T7L66XB_CELL_MMC] = { 170 .name = "tmio-mmc", 171 .enable = t7l66xb_mmc_enable, 172 .disable = t7l66xb_mmc_disable, 173 .platform_data = &t7166xb_mmc_data, 174 .pdata_size = sizeof(t7166xb_mmc_data), 175 .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources), 176 .resources = t7l66xb_mmc_resources, 177 }, 178 [T7L66XB_CELL_NAND] = { 179 .name = "tmio-nand", 180 .num_resources = ARRAY_SIZE(t7l66xb_nand_resources), 181 .resources = t7l66xb_nand_resources, 182 }, 183}; 184 185/*--------------------------------------------------------------------------*/ 186 187/* Handle the T7L66XB interrupt mux */ 188static void t7l66xb_irq(struct irq_desc *desc) 189{ 190 struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc); 191 unsigned int isr; 192 unsigned int i, irq_base; 193 194 irq_base = t7l66xb->irq_base; 195 196 while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) & 197 ~tmio_ioread8(t7l66xb->scr + SCR_IMR))) 198 for (i = 0; i < T7L66XB_NR_IRQS; i++) 199 if (isr & (1 << i)) 200 generic_handle_irq(irq_base + i); 201} 202 203static void t7l66xb_irq_mask(struct irq_data *data) 204{ 205 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data); 206 unsigned long flags; 207 u8 imr; 208 209 spin_lock_irqsave(&t7l66xb->lock, flags); 210 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); 211 imr |= 1 << (data->irq - t7l66xb->irq_base); 212 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); 213 spin_unlock_irqrestore(&t7l66xb->lock, flags); 214} 215 216static void t7l66xb_irq_unmask(struct irq_data *data) 217{ 218 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data); 219 unsigned long flags; 220 u8 imr; 221 222 spin_lock_irqsave(&t7l66xb->lock, flags); 223 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); 224 imr &= ~(1 << (data->irq - t7l66xb->irq_base)); 225 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); 226 spin_unlock_irqrestore(&t7l66xb->lock, flags); 227} 228 229static struct irq_chip t7l66xb_chip = { 230 .name = "t7l66xb", 231 .irq_ack = t7l66xb_irq_mask, 232 .irq_mask = t7l66xb_irq_mask, 233 .irq_unmask = t7l66xb_irq_unmask, 234}; 235 236/*--------------------------------------------------------------------------*/ 237 238/* Install the IRQ handler */ 239static void t7l66xb_attach_irq(struct platform_device *dev) 240{ 241 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 242 unsigned int irq, irq_base; 243 244 irq_base = t7l66xb->irq_base; 245 246 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { 247 irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq); 248 irq_set_chip_data(irq, t7l66xb); 249 } 250 251 irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING); 252 irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb); 253} 254 255static void t7l66xb_detach_irq(struct platform_device *dev) 256{ 257 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 258 unsigned int irq, irq_base; 259 260 irq_base = t7l66xb->irq_base; 261 262 irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL); 263 264 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { 265 irq_set_chip(irq, NULL); 266 irq_set_chip_data(irq, NULL); 267 } 268} 269 270/*--------------------------------------------------------------------------*/ 271 272#ifdef CONFIG_PM 273static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state) 274{ 275 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 276 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); 277 278 if (pdata && pdata->suspend) 279 pdata->suspend(dev); 280 clk_disable_unprepare(t7l66xb->clk48m); 281 282 return 0; 283} 284 285static int t7l66xb_resume(struct platform_device *dev) 286{ 287 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 288 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); 289 290 clk_prepare_enable(t7l66xb->clk48m); 291 if (pdata && pdata->resume) 292 pdata->resume(dev); 293 294 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0, 295 t7l66xb_mmc_resources[0].start & 0xfffe); 296 297 return 0; 298} 299#else 300#define t7l66xb_suspend NULL 301#define t7l66xb_resume NULL 302#endif 303 304/*--------------------------------------------------------------------------*/ 305 306static int t7l66xb_probe(struct platform_device *dev) 307{ 308 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); 309 struct t7l66xb *t7l66xb; 310 struct resource *iomem, *rscr; 311 int ret; 312 313 if (!pdata) 314 return -EINVAL; 315 316 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); 317 if (!iomem) 318 return -EINVAL; 319 320 t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL); 321 if (!t7l66xb) 322 return -ENOMEM; 323 324 spin_lock_init(&t7l66xb->lock); 325 326 platform_set_drvdata(dev, t7l66xb); 327 328 ret = platform_get_irq(dev, 0); 329 if (ret >= 0) 330 t7l66xb->irq = ret; 331 else 332 goto err_noirq; 333 334 t7l66xb->irq_base = pdata->irq_base; 335 336 t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K"); 337 if (IS_ERR(t7l66xb->clk32k)) { 338 ret = PTR_ERR(t7l66xb->clk32k); 339 goto err_clk32k_get; 340 } 341 342 t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M"); 343 if (IS_ERR(t7l66xb->clk48m)) { 344 ret = PTR_ERR(t7l66xb->clk48m); 345 goto err_clk48m_get; 346 } 347 348 rscr = &t7l66xb->rscr; 349 rscr->name = "t7l66xb-core"; 350 rscr->start = iomem->start; 351 rscr->end = iomem->start + 0xff; 352 rscr->flags = IORESOURCE_MEM; 353 354 ret = request_resource(iomem, rscr); 355 if (ret) 356 goto err_request_scr; 357 358 t7l66xb->scr = ioremap(rscr->start, resource_size(rscr)); 359 if (!t7l66xb->scr) { 360 ret = -ENOMEM; 361 goto err_ioremap; 362 } 363 364 clk_prepare_enable(t7l66xb->clk48m); 365 366 if (pdata->enable) 367 pdata->enable(dev); 368 369 /* Mask all interrupts */ 370 tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR); 371 372 printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n", 373 dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID), 374 (unsigned long)iomem->start, t7l66xb->irq); 375 376 t7l66xb_attach_irq(dev); 377 378 t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data; 379 t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data); 380 381 ret = mfd_add_devices(&dev->dev, dev->id, 382 t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells), 383 iomem, t7l66xb->irq_base, NULL); 384 385 if (!ret) 386 return 0; 387 388 t7l66xb_detach_irq(dev); 389 iounmap(t7l66xb->scr); 390err_ioremap: 391 release_resource(&t7l66xb->rscr); 392err_request_scr: 393 clk_put(t7l66xb->clk48m); 394err_clk48m_get: 395 clk_put(t7l66xb->clk32k); 396err_clk32k_get: 397err_noirq: 398 kfree(t7l66xb); 399 return ret; 400} 401 402static int t7l66xb_remove(struct platform_device *dev) 403{ 404 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev); 405 struct t7l66xb *t7l66xb = platform_get_drvdata(dev); 406 int ret; 407 408 ret = pdata->disable(dev); 409 clk_disable_unprepare(t7l66xb->clk48m); 410 clk_put(t7l66xb->clk48m); 411 clk_disable_unprepare(t7l66xb->clk32k); 412 clk_put(t7l66xb->clk32k); 413 t7l66xb_detach_irq(dev); 414 iounmap(t7l66xb->scr); 415 release_resource(&t7l66xb->rscr); 416 mfd_remove_devices(&dev->dev); 417 kfree(t7l66xb); 418 419 return ret; 420 421} 422 423static struct platform_driver t7l66xb_platform_driver = { 424 .driver = { 425 .name = "t7l66xb", 426 }, 427 .suspend = t7l66xb_suspend, 428 .resume = t7l66xb_resume, 429 .probe = t7l66xb_probe, 430 .remove = t7l66xb_remove, 431}; 432 433/*--------------------------------------------------------------------------*/ 434 435module_platform_driver(t7l66xb_platform_driver); 436 437MODULE_DESCRIPTION("Toshiba T7L66XB core driver"); 438MODULE_LICENSE("GPL v2"); 439MODULE_AUTHOR("Ian Molton"); 440MODULE_ALIAS("platform:t7l66xb"); 441