1/* 2 * isp.c 3 * 4 * TI OMAP3 ISP - Core 5 * 6 * Copyright (C) 2006-2010 Nokia Corporation 7 * Copyright (C) 2007-2009 Texas Instruments, Inc. 8 * 9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com> 10 * Sakari Ailus <sakari.ailus@iki.fi> 11 * 12 * Contributors: 13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com> 14 * Sakari Ailus <sakari.ailus@iki.fi> 15 * David Cohen <dacohen@gmail.com> 16 * Stanimir Varbanov <svarbanov@mm-sol.com> 17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com> 18 * Tuukka Toivonen <tuukkat76@gmail.com> 19 * Sergio Aguirre <saaguirre@ti.com> 20 * Antti Koskipaa <akoskipa@gmail.com> 21 * Ivan T. Ivanov <iivanov@mm-sol.com> 22 * RaniSuneela <r-m@ti.com> 23 * Atanas Filipov <afilipov@mm-sol.com> 24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com> 25 * Hiroshi DOYU <hiroshi.doyu@nokia.com> 26 * Nayden Kanchev <nkanchev@mm-sol.com> 27 * Phil Carmody <ext-phil.2.carmody@nokia.com> 28 * Artem Bityutskiy <artem.bityutskiy@nokia.com> 29 * Dominic Curran <dcurran@ti.com> 30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi> 31 * Pallavi Kulkarni <p-kulkarni@ti.com> 32 * Vaibhav Hiremath <hvaibhav@ti.com> 33 * Mohit Jalori <mjalori@ti.com> 34 * Sameer Venkatraman <sameerv@ti.com> 35 * Senthilvadivu Guruswamy <svadivu@ti.com> 36 * Thara Gopinath <thara@ti.com> 37 * Toni Leinonen <toni.leinonen@nokia.com> 38 * Troy Laramy <t-laramy@ti.com> 39 * 40 * This program is free software; you can redistribute it and/or modify 41 * it under the terms of the GNU General Public License version 2 as 42 * published by the Free Software Foundation. 43 */ 44 45#include <asm/cacheflush.h> 46 47#include <linux/clk.h> 48#include <linux/clkdev.h> 49#include <linux/delay.h> 50#include <linux/device.h> 51#include <linux/dma-mapping.h> 52#include <linux/i2c.h> 53#include <linux/interrupt.h> 54#include <linux/mfd/syscon.h> 55#include <linux/module.h> 56#include <linux/omap-iommu.h> 57#include <linux/platform_device.h> 58#include <linux/regulator/consumer.h> 59#include <linux/slab.h> 60#include <linux/sched.h> 61#include <linux/vmalloc.h> 62 63#include <asm/dma-iommu.h> 64 65#include <media/v4l2-common.h> 66#include <media/v4l2-device.h> 67#include <media/v4l2-of.h> 68 69#include "isp.h" 70#include "ispreg.h" 71#include "ispccdc.h" 72#include "isppreview.h" 73#include "ispresizer.h" 74#include "ispcsi2.h" 75#include "ispccp2.h" 76#include "isph3a.h" 77#include "isphist.h" 78 79static unsigned int autoidle; 80module_param(autoidle, int, 0444); 81MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support"); 82 83static void isp_save_ctx(struct isp_device *isp); 84 85static void isp_restore_ctx(struct isp_device *isp); 86 87static const struct isp_res_mapping isp_res_maps[] = { 88 { 89 .isp_rev = ISP_REVISION_2_0, 90 .offset = { 91 /* first MMIO area */ 92 0x0000, /* base, len 0x0070 */ 93 0x0400, /* ccp2, len 0x01f0 */ 94 0x0600, /* ccdc, len 0x00a8 */ 95 0x0a00, /* hist, len 0x0048 */ 96 0x0c00, /* h3a, len 0x0060 */ 97 0x0e00, /* preview, len 0x00a0 */ 98 0x1000, /* resizer, len 0x00ac */ 99 0x1200, /* sbl, len 0x00fc */ 100 /* second MMIO area */ 101 0x0000, /* csi2a, len 0x0170 */ 102 0x0170, /* csiphy2, len 0x000c */ 103 }, 104 .phy_type = ISP_PHY_TYPE_3430, 105 }, 106 { 107 .isp_rev = ISP_REVISION_15_0, 108 .offset = { 109 /* first MMIO area */ 110 0x0000, /* base, len 0x0070 */ 111 0x0400, /* ccp2, len 0x01f0 */ 112 0x0600, /* ccdc, len 0x00a8 */ 113 0x0a00, /* hist, len 0x0048 */ 114 0x0c00, /* h3a, len 0x0060 */ 115 0x0e00, /* preview, len 0x00a0 */ 116 0x1000, /* resizer, len 0x00ac */ 117 0x1200, /* sbl, len 0x00fc */ 118 /* second MMIO area */ 119 0x0000, /* csi2a, len 0x0170 (1st area) */ 120 0x0170, /* csiphy2, len 0x000c */ 121 0x01c0, /* csi2a, len 0x0040 (2nd area) */ 122 0x0400, /* csi2c, len 0x0170 (1st area) */ 123 0x0570, /* csiphy1, len 0x000c */ 124 0x05c0, /* csi2c, len 0x0040 (2nd area) */ 125 }, 126 .phy_type = ISP_PHY_TYPE_3630, 127 }, 128}; 129 130/* Structure for saving/restoring ISP module registers */ 131static struct isp_reg isp_reg_list[] = { 132 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0}, 133 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0}, 134 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0}, 135 {0, ISP_TOK_TERM, 0} 136}; 137 138/* 139 * omap3isp_flush - Post pending L3 bus writes by doing a register readback 140 * @isp: OMAP3 ISP device 141 * 142 * In order to force posting of pending writes, we need to write and 143 * readback the same register, in this case the revision register. 144 * 145 * See this link for reference: 146 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html 147 */ 148void omap3isp_flush(struct isp_device *isp) 149{ 150 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION); 151 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION); 152} 153 154/* ----------------------------------------------------------------------------- 155 * XCLK 156 */ 157 158#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw) 159 160static void isp_xclk_update(struct isp_xclk *xclk, u32 divider) 161{ 162 switch (xclk->id) { 163 case ISP_XCLK_A: 164 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 165 ISPTCTRL_CTRL_DIVA_MASK, 166 divider << ISPTCTRL_CTRL_DIVA_SHIFT); 167 break; 168 case ISP_XCLK_B: 169 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 170 ISPTCTRL_CTRL_DIVB_MASK, 171 divider << ISPTCTRL_CTRL_DIVB_SHIFT); 172 break; 173 } 174} 175 176static int isp_xclk_prepare(struct clk_hw *hw) 177{ 178 struct isp_xclk *xclk = to_isp_xclk(hw); 179 180 omap3isp_get(xclk->isp); 181 182 return 0; 183} 184 185static void isp_xclk_unprepare(struct clk_hw *hw) 186{ 187 struct isp_xclk *xclk = to_isp_xclk(hw); 188 189 omap3isp_put(xclk->isp); 190} 191 192static int isp_xclk_enable(struct clk_hw *hw) 193{ 194 struct isp_xclk *xclk = to_isp_xclk(hw); 195 unsigned long flags; 196 197 spin_lock_irqsave(&xclk->lock, flags); 198 isp_xclk_update(xclk, xclk->divider); 199 xclk->enabled = true; 200 spin_unlock_irqrestore(&xclk->lock, flags); 201 202 return 0; 203} 204 205static void isp_xclk_disable(struct clk_hw *hw) 206{ 207 struct isp_xclk *xclk = to_isp_xclk(hw); 208 unsigned long flags; 209 210 spin_lock_irqsave(&xclk->lock, flags); 211 isp_xclk_update(xclk, 0); 212 xclk->enabled = false; 213 spin_unlock_irqrestore(&xclk->lock, flags); 214} 215 216static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw, 217 unsigned long parent_rate) 218{ 219 struct isp_xclk *xclk = to_isp_xclk(hw); 220 221 return parent_rate / xclk->divider; 222} 223 224static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate) 225{ 226 u32 divider; 227 228 if (*rate >= parent_rate) { 229 *rate = parent_rate; 230 return ISPTCTRL_CTRL_DIV_BYPASS; 231 } 232 233 if (*rate == 0) 234 *rate = 1; 235 236 divider = DIV_ROUND_CLOSEST(parent_rate, *rate); 237 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS) 238 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1; 239 240 *rate = parent_rate / divider; 241 return divider; 242} 243 244static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate, 245 unsigned long *parent_rate) 246{ 247 isp_xclk_calc_divider(&rate, *parent_rate); 248 return rate; 249} 250 251static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate, 252 unsigned long parent_rate) 253{ 254 struct isp_xclk *xclk = to_isp_xclk(hw); 255 unsigned long flags; 256 u32 divider; 257 258 divider = isp_xclk_calc_divider(&rate, parent_rate); 259 260 spin_lock_irqsave(&xclk->lock, flags); 261 262 xclk->divider = divider; 263 if (xclk->enabled) 264 isp_xclk_update(xclk, divider); 265 266 spin_unlock_irqrestore(&xclk->lock, flags); 267 268 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n", 269 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider); 270 return 0; 271} 272 273static const struct clk_ops isp_xclk_ops = { 274 .prepare = isp_xclk_prepare, 275 .unprepare = isp_xclk_unprepare, 276 .enable = isp_xclk_enable, 277 .disable = isp_xclk_disable, 278 .recalc_rate = isp_xclk_recalc_rate, 279 .round_rate = isp_xclk_round_rate, 280 .set_rate = isp_xclk_set_rate, 281}; 282 283static const char *isp_xclk_parent_name = "cam_mclk"; 284 285static const struct clk_init_data isp_xclk_init_data = { 286 .name = "cam_xclk", 287 .ops = &isp_xclk_ops, 288 .parent_names = &isp_xclk_parent_name, 289 .num_parents = 1, 290}; 291 292static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data) 293{ 294 unsigned int idx = clkspec->args[0]; 295 struct isp_device *isp = data; 296 297 if (idx >= ARRAY_SIZE(isp->xclks)) 298 return ERR_PTR(-ENOENT); 299 300 return isp->xclks[idx].clk; 301} 302 303static int isp_xclk_init(struct isp_device *isp) 304{ 305 struct device_node *np = isp->dev->of_node; 306 struct clk_init_data init; 307 unsigned int i; 308 309 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) 310 isp->xclks[i].clk = ERR_PTR(-EINVAL); 311 312 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) { 313 struct isp_xclk *xclk = &isp->xclks[i]; 314 315 xclk->isp = isp; 316 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B; 317 xclk->divider = 1; 318 spin_lock_init(&xclk->lock); 319 320 init.name = i == 0 ? "cam_xclka" : "cam_xclkb"; 321 init.ops = &isp_xclk_ops; 322 init.parent_names = &isp_xclk_parent_name; 323 init.num_parents = 1; 324 325 xclk->hw.init = &init; 326 /* 327 * The first argument is NULL in order to avoid circular 328 * reference, as this driver takes reference on the 329 * sensor subdevice modules and the sensors would take 330 * reference on this module through clk_get(). 331 */ 332 xclk->clk = clk_register(NULL, &xclk->hw); 333 if (IS_ERR(xclk->clk)) 334 return PTR_ERR(xclk->clk); 335 } 336 337 if (np) 338 of_clk_add_provider(np, isp_xclk_src_get, isp); 339 340 return 0; 341} 342 343static void isp_xclk_cleanup(struct isp_device *isp) 344{ 345 struct device_node *np = isp->dev->of_node; 346 unsigned int i; 347 348 if (np) 349 of_clk_del_provider(np); 350 351 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) { 352 struct isp_xclk *xclk = &isp->xclks[i]; 353 354 if (!IS_ERR(xclk->clk)) 355 clk_unregister(xclk->clk); 356 } 357} 358 359/* ----------------------------------------------------------------------------- 360 * Interrupts 361 */ 362 363/* 364 * isp_enable_interrupts - Enable ISP interrupts. 365 * @isp: OMAP3 ISP device 366 */ 367static void isp_enable_interrupts(struct isp_device *isp) 368{ 369 static const u32 irq = IRQ0ENABLE_CSIA_IRQ 370 | IRQ0ENABLE_CSIB_IRQ 371 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ 372 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ 373 | IRQ0ENABLE_CCDC_VD0_IRQ 374 | IRQ0ENABLE_CCDC_VD1_IRQ 375 | IRQ0ENABLE_HS_VS_IRQ 376 | IRQ0ENABLE_HIST_DONE_IRQ 377 | IRQ0ENABLE_H3A_AWB_DONE_IRQ 378 | IRQ0ENABLE_H3A_AF_DONE_IRQ 379 | IRQ0ENABLE_PRV_DONE_IRQ 380 | IRQ0ENABLE_RSZ_DONE_IRQ; 381 382 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 383 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE); 384} 385 386/* 387 * isp_disable_interrupts - Disable ISP interrupts. 388 * @isp: OMAP3 ISP device 389 */ 390static void isp_disable_interrupts(struct isp_device *isp) 391{ 392 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE); 393} 394 395/* 396 * isp_core_init - ISP core settings 397 * @isp: OMAP3 ISP device 398 * @idle: Consider idle state. 399 * 400 * Set the power settings for the ISP and SBL bus and configure the HS/VS 401 * interrupt source. 402 * 403 * We need to configure the HS/VS interrupt source before interrupts get 404 * enabled, as the sensor might be free-running and the ISP default setting 405 * (HS edge) would put an unnecessary burden on the CPU. 406 */ 407static void isp_core_init(struct isp_device *isp, int idle) 408{ 409 isp_reg_writel(isp, 410 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY : 411 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) << 412 ISP_SYSCONFIG_MIDLEMODE_SHIFT) | 413 ((isp->revision == ISP_REVISION_15_0) ? 414 ISP_SYSCONFIG_AUTOIDLE : 0), 415 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG); 416 417 isp_reg_writel(isp, 418 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) | 419 ISPCTRL_SYNC_DETECT_VSRISE, 420 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL); 421} 422 423/* 424 * Configure the bridge and lane shifter. Valid inputs are 425 * 426 * CCDC_INPUT_PARALLEL: Parallel interface 427 * CCDC_INPUT_CSI2A: CSI2a receiver 428 * CCDC_INPUT_CCP2B: CCP2b receiver 429 * CCDC_INPUT_CSI2C: CSI2c receiver 430 * 431 * The bridge and lane shifter are configured according to the selected input 432 * and the ISP platform data. 433 */ 434void omap3isp_configure_bridge(struct isp_device *isp, 435 enum ccdc_input_entity input, 436 const struct isp_parallel_cfg *parcfg, 437 unsigned int shift, unsigned int bridge) 438{ 439 u32 ispctrl_val; 440 441 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL); 442 ispctrl_val &= ~ISPCTRL_SHIFT_MASK; 443 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV; 444 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK; 445 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK; 446 ispctrl_val |= bridge; 447 448 switch (input) { 449 case CCDC_INPUT_PARALLEL: 450 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL; 451 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT; 452 shift += parcfg->data_lane_shift * 2; 453 break; 454 455 case CCDC_INPUT_CSI2A: 456 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA; 457 break; 458 459 case CCDC_INPUT_CCP2B: 460 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB; 461 break; 462 463 case CCDC_INPUT_CSI2C: 464 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC; 465 break; 466 467 default: 468 return; 469 } 470 471 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK; 472 473 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL); 474} 475 476void omap3isp_hist_dma_done(struct isp_device *isp) 477{ 478 if (omap3isp_ccdc_busy(&isp->isp_ccdc) || 479 omap3isp_stat_pcr_busy(&isp->isp_hist)) { 480 /* Histogram cannot be enabled in this frame anymore */ 481 atomic_set(&isp->isp_hist.buf_err, 1); 482 dev_dbg(isp->dev, "hist: Out of synchronization with " 483 "CCDC. Ignoring next buffer.\n"); 484 } 485} 486 487static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus) 488{ 489 static const char *name[] = { 490 "CSIA_IRQ", 491 "res1", 492 "res2", 493 "CSIB_LCM_IRQ", 494 "CSIB_IRQ", 495 "res5", 496 "res6", 497 "res7", 498 "CCDC_VD0_IRQ", 499 "CCDC_VD1_IRQ", 500 "CCDC_VD2_IRQ", 501 "CCDC_ERR_IRQ", 502 "H3A_AF_DONE_IRQ", 503 "H3A_AWB_DONE_IRQ", 504 "res14", 505 "res15", 506 "HIST_DONE_IRQ", 507 "CCDC_LSC_DONE", 508 "CCDC_LSC_PREFETCH_COMPLETED", 509 "CCDC_LSC_PREFETCH_ERROR", 510 "PRV_DONE_IRQ", 511 "CBUFF_IRQ", 512 "res22", 513 "res23", 514 "RSZ_DONE_IRQ", 515 "OVF_IRQ", 516 "res26", 517 "res27", 518 "MMU_ERR_IRQ", 519 "OCP_ERR_IRQ", 520 "SEC_ERR_IRQ", 521 "HS_VS_IRQ", 522 }; 523 int i; 524 525 dev_dbg(isp->dev, "ISP IRQ: "); 526 527 for (i = 0; i < ARRAY_SIZE(name); i++) { 528 if ((1 << i) & irqstatus) 529 printk(KERN_CONT "%s ", name[i]); 530 } 531 printk(KERN_CONT "\n"); 532} 533 534static void isp_isr_sbl(struct isp_device *isp) 535{ 536 struct device *dev = isp->dev; 537 struct isp_pipeline *pipe; 538 u32 sbl_pcr; 539 540 /* 541 * Handle shared buffer logic overflows for video buffers. 542 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored. 543 */ 544 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR); 545 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR); 546 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF; 547 548 if (sbl_pcr) 549 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr); 550 551 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) { 552 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity); 553 if (pipe != NULL) 554 pipe->error = true; 555 } 556 557 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) { 558 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity); 559 if (pipe != NULL) 560 pipe->error = true; 561 } 562 563 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) { 564 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity); 565 if (pipe != NULL) 566 pipe->error = true; 567 } 568 569 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) { 570 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity); 571 if (pipe != NULL) 572 pipe->error = true; 573 } 574 575 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF 576 | ISPSBL_PCR_RSZ2_WBL_OVF 577 | ISPSBL_PCR_RSZ3_WBL_OVF 578 | ISPSBL_PCR_RSZ4_WBL_OVF)) { 579 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity); 580 if (pipe != NULL) 581 pipe->error = true; 582 } 583 584 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF) 585 omap3isp_stat_sbl_overflow(&isp->isp_af); 586 587 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF) 588 omap3isp_stat_sbl_overflow(&isp->isp_aewb); 589} 590 591/* 592 * isp_isr - Interrupt Service Routine for Camera ISP module. 593 * @irq: Not used currently. 594 * @_isp: Pointer to the OMAP3 ISP device 595 * 596 * Handles the corresponding callback if plugged in. 597 */ 598static irqreturn_t isp_isr(int irq, void *_isp) 599{ 600 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ | 601 IRQ0STATUS_CCDC_LSC_DONE_IRQ | 602 IRQ0STATUS_CCDC_VD0_IRQ | 603 IRQ0STATUS_CCDC_VD1_IRQ | 604 IRQ0STATUS_HS_VS_IRQ; 605 struct isp_device *isp = _isp; 606 u32 irqstatus; 607 608 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 609 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 610 611 isp_isr_sbl(isp); 612 613 if (irqstatus & IRQ0STATUS_CSIA_IRQ) 614 omap3isp_csi2_isr(&isp->isp_csi2a); 615 616 if (irqstatus & IRQ0STATUS_CSIB_IRQ) 617 omap3isp_ccp2_isr(&isp->isp_ccp2); 618 619 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) { 620 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW) 621 omap3isp_preview_isr_frame_sync(&isp->isp_prev); 622 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER) 623 omap3isp_resizer_isr_frame_sync(&isp->isp_res); 624 omap3isp_stat_isr_frame_sync(&isp->isp_aewb); 625 omap3isp_stat_isr_frame_sync(&isp->isp_af); 626 omap3isp_stat_isr_frame_sync(&isp->isp_hist); 627 } 628 629 if (irqstatus & ccdc_events) 630 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events); 631 632 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) { 633 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER) 634 omap3isp_resizer_isr_frame_sync(&isp->isp_res); 635 omap3isp_preview_isr(&isp->isp_prev); 636 } 637 638 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ) 639 omap3isp_resizer_isr(&isp->isp_res); 640 641 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ) 642 omap3isp_stat_isr(&isp->isp_aewb); 643 644 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ) 645 omap3isp_stat_isr(&isp->isp_af); 646 647 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ) 648 omap3isp_stat_isr(&isp->isp_hist); 649 650 omap3isp_flush(isp); 651 652#if defined(DEBUG) && defined(ISP_ISR_DEBUG) 653 isp_isr_dbg(isp, irqstatus); 654#endif 655 656 return IRQ_HANDLED; 657} 658 659/* ----------------------------------------------------------------------------- 660 * Pipeline power management 661 * 662 * Entities must be powered up when part of a pipeline that contains at least 663 * one open video device node. 664 * 665 * To achieve this use the entity use_count field to track the number of users. 666 * For entities corresponding to video device nodes the use_count field stores 667 * the users count of the node. For entities corresponding to subdevs the 668 * use_count field stores the total number of users of all video device nodes 669 * in the pipeline. 670 * 671 * The omap3isp_pipeline_pm_use() function must be called in the open() and 672 * close() handlers of video device nodes. It increments or decrements the use 673 * count of all subdev entities in the pipeline. 674 * 675 * To react to link management on powered pipelines, the link setup notification 676 * callback updates the use count of all entities in the source and sink sides 677 * of the link. 678 */ 679 680/* 681 * isp_pipeline_pm_use_count - Count the number of users of a pipeline 682 * @entity: The entity 683 * 684 * Return the total number of users of all video device nodes in the pipeline. 685 */ 686static int isp_pipeline_pm_use_count(struct media_entity *entity) 687{ 688 struct media_entity_graph graph; 689 int use = 0; 690 691 media_entity_graph_walk_start(&graph, entity); 692 693 while ((entity = media_entity_graph_walk_next(&graph))) { 694 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE) 695 use += entity->use_count; 696 } 697 698 return use; 699} 700 701/* 702 * isp_pipeline_pm_power_one - Apply power change to an entity 703 * @entity: The entity 704 * @change: Use count change 705 * 706 * Change the entity use count by @change. If the entity is a subdev update its 707 * power state by calling the core::s_power operation when the use count goes 708 * from 0 to != 0 or from != 0 to 0. 709 * 710 * Return 0 on success or a negative error code on failure. 711 */ 712static int isp_pipeline_pm_power_one(struct media_entity *entity, int change) 713{ 714 struct v4l2_subdev *subdev; 715 int ret; 716 717 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV 718 ? media_entity_to_v4l2_subdev(entity) : NULL; 719 720 if (entity->use_count == 0 && change > 0 && subdev != NULL) { 721 ret = v4l2_subdev_call(subdev, core, s_power, 1); 722 if (ret < 0 && ret != -ENOIOCTLCMD) 723 return ret; 724 } 725 726 entity->use_count += change; 727 WARN_ON(entity->use_count < 0); 728 729 if (entity->use_count == 0 && change < 0 && subdev != NULL) 730 v4l2_subdev_call(subdev, core, s_power, 0); 731 732 return 0; 733} 734 735/* 736 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline 737 * @entity: The entity 738 * @change: Use count change 739 * 740 * Walk the pipeline to update the use count and the power state of all non-node 741 * entities. 742 * 743 * Return 0 on success or a negative error code on failure. 744 */ 745static int isp_pipeline_pm_power(struct media_entity *entity, int change) 746{ 747 struct media_entity_graph graph; 748 struct media_entity *first = entity; 749 int ret = 0; 750 751 if (!change) 752 return 0; 753 754 media_entity_graph_walk_start(&graph, entity); 755 756 while (!ret && (entity = media_entity_graph_walk_next(&graph))) 757 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE) 758 ret = isp_pipeline_pm_power_one(entity, change); 759 760 if (!ret) 761 return 0; 762 763 media_entity_graph_walk_start(&graph, first); 764 765 while ((first = media_entity_graph_walk_next(&graph)) 766 && first != entity) 767 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE) 768 isp_pipeline_pm_power_one(first, -change); 769 770 return ret; 771} 772 773/* 774 * omap3isp_pipeline_pm_use - Update the use count of an entity 775 * @entity: The entity 776 * @use: Use (1) or stop using (0) the entity 777 * 778 * Update the use count of all entities in the pipeline and power entities on or 779 * off accordingly. 780 * 781 * Return 0 on success or a negative error code on failure. Powering entities 782 * off is assumed to never fail. No failure can occur when the use parameter is 783 * set to 0. 784 */ 785int omap3isp_pipeline_pm_use(struct media_entity *entity, int use) 786{ 787 int change = use ? 1 : -1; 788 int ret; 789 790 mutex_lock(&entity->parent->graph_mutex); 791 792 /* Apply use count to node. */ 793 entity->use_count += change; 794 WARN_ON(entity->use_count < 0); 795 796 /* Apply power change to connected non-nodes. */ 797 ret = isp_pipeline_pm_power(entity, change); 798 if (ret < 0) 799 entity->use_count -= change; 800 801 mutex_unlock(&entity->parent->graph_mutex); 802 803 return ret; 804} 805 806/* 807 * isp_pipeline_link_notify - Link management notification callback 808 * @link: The link 809 * @flags: New link flags that will be applied 810 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*) 811 * 812 * React to link management on powered pipelines by updating the use count of 813 * all entities in the source and sink sides of the link. Entities are powered 814 * on or off accordingly. 815 * 816 * Return 0 on success or a negative error code on failure. Powering entities 817 * off is assumed to never fail. This function will not fail for disconnection 818 * events. 819 */ 820static int isp_pipeline_link_notify(struct media_link *link, u32 flags, 821 unsigned int notification) 822{ 823 struct media_entity *source = link->source->entity; 824 struct media_entity *sink = link->sink->entity; 825 int source_use = isp_pipeline_pm_use_count(source); 826 int sink_use = isp_pipeline_pm_use_count(sink); 827 int ret; 828 829 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH && 830 !(flags & MEDIA_LNK_FL_ENABLED)) { 831 /* Powering off entities is assumed to never fail. */ 832 isp_pipeline_pm_power(source, -sink_use); 833 isp_pipeline_pm_power(sink, -source_use); 834 return 0; 835 } 836 837 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH && 838 (flags & MEDIA_LNK_FL_ENABLED)) { 839 840 ret = isp_pipeline_pm_power(source, sink_use); 841 if (ret < 0) 842 return ret; 843 844 ret = isp_pipeline_pm_power(sink, source_use); 845 if (ret < 0) 846 isp_pipeline_pm_power(source, -sink_use); 847 848 return ret; 849 } 850 851 return 0; 852} 853 854/* ----------------------------------------------------------------------------- 855 * Pipeline stream management 856 */ 857 858/* 859 * isp_pipeline_enable - Enable streaming on a pipeline 860 * @pipe: ISP pipeline 861 * @mode: Stream mode (single shot or continuous) 862 * 863 * Walk the entities chain starting at the pipeline output video node and start 864 * all modules in the chain in the given mode. 865 * 866 * Return 0 if successful, or the return value of the failed video::s_stream 867 * operation otherwise. 868 */ 869static int isp_pipeline_enable(struct isp_pipeline *pipe, 870 enum isp_pipeline_stream_state mode) 871{ 872 struct isp_device *isp = pipe->output->isp; 873 struct media_entity *entity; 874 struct media_pad *pad; 875 struct v4l2_subdev *subdev; 876 unsigned long flags; 877 int ret; 878 879 /* Refuse to start streaming if an entity included in the pipeline has 880 * crashed. This check must be performed before the loop below to avoid 881 * starting entities if the pipeline won't start anyway (those entities 882 * would then likely fail to stop, making the problem worse). 883 */ 884 if (pipe->entities & isp->crashed) 885 return -EIO; 886 887 spin_lock_irqsave(&pipe->lock, flags); 888 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT); 889 spin_unlock_irqrestore(&pipe->lock, flags); 890 891 pipe->do_propagation = false; 892 893 entity = &pipe->output->video.entity; 894 while (1) { 895 pad = &entity->pads[0]; 896 if (!(pad->flags & MEDIA_PAD_FL_SINK)) 897 break; 898 899 pad = media_entity_remote_pad(pad); 900 if (pad == NULL || 901 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) 902 break; 903 904 entity = pad->entity; 905 subdev = media_entity_to_v4l2_subdev(entity); 906 907 ret = v4l2_subdev_call(subdev, video, s_stream, mode); 908 if (ret < 0 && ret != -ENOIOCTLCMD) 909 return ret; 910 911 if (subdev == &isp->isp_ccdc.subdev) { 912 v4l2_subdev_call(&isp->isp_aewb.subdev, video, 913 s_stream, mode); 914 v4l2_subdev_call(&isp->isp_af.subdev, video, 915 s_stream, mode); 916 v4l2_subdev_call(&isp->isp_hist.subdev, video, 917 s_stream, mode); 918 pipe->do_propagation = true; 919 } 920 } 921 922 return 0; 923} 924 925static int isp_pipeline_wait_resizer(struct isp_device *isp) 926{ 927 return omap3isp_resizer_busy(&isp->isp_res); 928} 929 930static int isp_pipeline_wait_preview(struct isp_device *isp) 931{ 932 return omap3isp_preview_busy(&isp->isp_prev); 933} 934 935static int isp_pipeline_wait_ccdc(struct isp_device *isp) 936{ 937 return omap3isp_stat_busy(&isp->isp_af) 938 || omap3isp_stat_busy(&isp->isp_aewb) 939 || omap3isp_stat_busy(&isp->isp_hist) 940 || omap3isp_ccdc_busy(&isp->isp_ccdc); 941} 942 943#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000) 944 945static int isp_pipeline_wait(struct isp_device *isp, 946 int(*busy)(struct isp_device *isp)) 947{ 948 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT; 949 950 while (!time_after(jiffies, timeout)) { 951 if (!busy(isp)) 952 return 0; 953 } 954 955 return 1; 956} 957 958/* 959 * isp_pipeline_disable - Disable streaming on a pipeline 960 * @pipe: ISP pipeline 961 * 962 * Walk the entities chain starting at the pipeline output video node and stop 963 * all modules in the chain. Wait synchronously for the modules to be stopped if 964 * necessary. 965 * 966 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module 967 * can't be stopped (in which case a software reset of the ISP is probably 968 * necessary). 969 */ 970static int isp_pipeline_disable(struct isp_pipeline *pipe) 971{ 972 struct isp_device *isp = pipe->output->isp; 973 struct media_entity *entity; 974 struct media_pad *pad; 975 struct v4l2_subdev *subdev; 976 int failure = 0; 977 int ret; 978 979 /* 980 * We need to stop all the modules after CCDC first or they'll 981 * never stop since they may not get a full frame from CCDC. 982 */ 983 entity = &pipe->output->video.entity; 984 while (1) { 985 pad = &entity->pads[0]; 986 if (!(pad->flags & MEDIA_PAD_FL_SINK)) 987 break; 988 989 pad = media_entity_remote_pad(pad); 990 if (pad == NULL || 991 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) 992 break; 993 994 entity = pad->entity; 995 subdev = media_entity_to_v4l2_subdev(entity); 996 997 if (subdev == &isp->isp_ccdc.subdev) { 998 v4l2_subdev_call(&isp->isp_aewb.subdev, 999 video, s_stream, 0); 1000 v4l2_subdev_call(&isp->isp_af.subdev, 1001 video, s_stream, 0); 1002 v4l2_subdev_call(&isp->isp_hist.subdev, 1003 video, s_stream, 0); 1004 } 1005 1006 ret = v4l2_subdev_call(subdev, video, s_stream, 0); 1007 1008 if (subdev == &isp->isp_res.subdev) 1009 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer); 1010 else if (subdev == &isp->isp_prev.subdev) 1011 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview); 1012 else if (subdev == &isp->isp_ccdc.subdev) 1013 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc); 1014 1015 /* Handle stop failures. An entity that fails to stop can 1016 * usually just be restarted. Flag the stop failure nonetheless 1017 * to trigger an ISP reset the next time the device is released, 1018 * just in case. 1019 * 1020 * The preview engine is a special case. A failure to stop can 1021 * mean a hardware crash. When that happens the preview engine 1022 * won't respond to read/write operations on the L4 bus anymore, 1023 * resulting in a bus fault and a kernel oops next time it gets 1024 * accessed. Mark it as crashed to prevent pipelines including 1025 * it from being started. 1026 */ 1027 if (ret) { 1028 dev_info(isp->dev, "Unable to stop %s\n", subdev->name); 1029 isp->stop_failure = true; 1030 if (subdev == &isp->isp_prev.subdev) 1031 isp->crashed |= 1U << subdev->entity.id; 1032 failure = -ETIMEDOUT; 1033 } 1034 } 1035 1036 return failure; 1037} 1038 1039/* 1040 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline 1041 * @pipe: ISP pipeline 1042 * @state: Stream state (stopped, single shot or continuous) 1043 * 1044 * Set the pipeline to the given stream state. Pipelines can be started in 1045 * single-shot or continuous mode. 1046 * 1047 * Return 0 if successful, or the return value of the failed video::s_stream 1048 * operation otherwise. The pipeline state is not updated when the operation 1049 * fails, except when stopping the pipeline. 1050 */ 1051int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe, 1052 enum isp_pipeline_stream_state state) 1053{ 1054 int ret; 1055 1056 if (state == ISP_PIPELINE_STREAM_STOPPED) 1057 ret = isp_pipeline_disable(pipe); 1058 else 1059 ret = isp_pipeline_enable(pipe, state); 1060 1061 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED) 1062 pipe->stream_state = state; 1063 1064 return ret; 1065} 1066 1067/* 1068 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline 1069 * @pipe: ISP pipeline 1070 * 1071 * Cancelling a stream mark all buffers on all video nodes in the pipeline as 1072 * erroneous and makes sure no new buffer can be queued. This function is called 1073 * when a fatal error that prevents any further operation on the pipeline 1074 * occurs. 1075 */ 1076void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe) 1077{ 1078 if (pipe->input) 1079 omap3isp_video_cancel_stream(pipe->input); 1080 if (pipe->output) 1081 omap3isp_video_cancel_stream(pipe->output); 1082} 1083 1084/* 1085 * isp_pipeline_resume - Resume streaming on a pipeline 1086 * @pipe: ISP pipeline 1087 * 1088 * Resume video output and input and re-enable pipeline. 1089 */ 1090static void isp_pipeline_resume(struct isp_pipeline *pipe) 1091{ 1092 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT; 1093 1094 omap3isp_video_resume(pipe->output, !singleshot); 1095 if (singleshot) 1096 omap3isp_video_resume(pipe->input, 0); 1097 isp_pipeline_enable(pipe, pipe->stream_state); 1098} 1099 1100/* 1101 * isp_pipeline_suspend - Suspend streaming on a pipeline 1102 * @pipe: ISP pipeline 1103 * 1104 * Suspend pipeline. 1105 */ 1106static void isp_pipeline_suspend(struct isp_pipeline *pipe) 1107{ 1108 isp_pipeline_disable(pipe); 1109} 1110 1111/* 1112 * isp_pipeline_is_last - Verify if entity has an enabled link to the output 1113 * video node 1114 * @me: ISP module's media entity 1115 * 1116 * Returns 1 if the entity has an enabled link to the output video node or 0 1117 * otherwise. It's true only while pipeline can have no more than one output 1118 * node. 1119 */ 1120static int isp_pipeline_is_last(struct media_entity *me) 1121{ 1122 struct isp_pipeline *pipe; 1123 struct media_pad *pad; 1124 1125 if (!me->pipe) 1126 return 0; 1127 pipe = to_isp_pipeline(me); 1128 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED) 1129 return 0; 1130 pad = media_entity_remote_pad(&pipe->output->pad); 1131 return pad->entity == me; 1132} 1133 1134/* 1135 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module 1136 * @me: ISP module's media entity 1137 * 1138 * Suspend the whole pipeline if module's entity has an enabled link to the 1139 * output video node. It works only while pipeline can have no more than one 1140 * output node. 1141 */ 1142static void isp_suspend_module_pipeline(struct media_entity *me) 1143{ 1144 if (isp_pipeline_is_last(me)) 1145 isp_pipeline_suspend(to_isp_pipeline(me)); 1146} 1147 1148/* 1149 * isp_resume_module_pipeline - Resume pipeline to which belongs the module 1150 * @me: ISP module's media entity 1151 * 1152 * Resume the whole pipeline if module's entity has an enabled link to the 1153 * output video node. It works only while pipeline can have no more than one 1154 * output node. 1155 */ 1156static void isp_resume_module_pipeline(struct media_entity *me) 1157{ 1158 if (isp_pipeline_is_last(me)) 1159 isp_pipeline_resume(to_isp_pipeline(me)); 1160} 1161 1162/* 1163 * isp_suspend_modules - Suspend ISP submodules. 1164 * @isp: OMAP3 ISP device 1165 * 1166 * Returns 0 if suspend left in idle state all the submodules properly, 1167 * or returns 1 if a general Reset is required to suspend the submodules. 1168 */ 1169static int isp_suspend_modules(struct isp_device *isp) 1170{ 1171 unsigned long timeout; 1172 1173 omap3isp_stat_suspend(&isp->isp_aewb); 1174 omap3isp_stat_suspend(&isp->isp_af); 1175 omap3isp_stat_suspend(&isp->isp_hist); 1176 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity); 1177 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity); 1178 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity); 1179 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity); 1180 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity); 1181 1182 timeout = jiffies + ISP_STOP_TIMEOUT; 1183 while (omap3isp_stat_busy(&isp->isp_af) 1184 || omap3isp_stat_busy(&isp->isp_aewb) 1185 || omap3isp_stat_busy(&isp->isp_hist) 1186 || omap3isp_preview_busy(&isp->isp_prev) 1187 || omap3isp_resizer_busy(&isp->isp_res) 1188 || omap3isp_ccdc_busy(&isp->isp_ccdc)) { 1189 if (time_after(jiffies, timeout)) { 1190 dev_info(isp->dev, "can't stop modules.\n"); 1191 return 1; 1192 } 1193 msleep(1); 1194 } 1195 1196 return 0; 1197} 1198 1199/* 1200 * isp_resume_modules - Resume ISP submodules. 1201 * @isp: OMAP3 ISP device 1202 */ 1203static void isp_resume_modules(struct isp_device *isp) 1204{ 1205 omap3isp_stat_resume(&isp->isp_aewb); 1206 omap3isp_stat_resume(&isp->isp_af); 1207 omap3isp_stat_resume(&isp->isp_hist); 1208 isp_resume_module_pipeline(&isp->isp_res.subdev.entity); 1209 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity); 1210 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity); 1211 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity); 1212 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity); 1213} 1214 1215/* 1216 * isp_reset - Reset ISP with a timeout wait for idle. 1217 * @isp: OMAP3 ISP device 1218 */ 1219static int isp_reset(struct isp_device *isp) 1220{ 1221 unsigned long timeout = 0; 1222 1223 isp_reg_writel(isp, 1224 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG) 1225 | ISP_SYSCONFIG_SOFTRESET, 1226 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG); 1227 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, 1228 ISP_SYSSTATUS) & 0x1)) { 1229 if (timeout++ > 10000) { 1230 dev_alert(isp->dev, "cannot reset ISP\n"); 1231 return -ETIMEDOUT; 1232 } 1233 udelay(1); 1234 } 1235 1236 isp->stop_failure = false; 1237 isp->crashed = 0; 1238 return 0; 1239} 1240 1241/* 1242 * isp_save_context - Saves the values of the ISP module registers. 1243 * @isp: OMAP3 ISP device 1244 * @reg_list: Structure containing pairs of register address and value to 1245 * modify on OMAP. 1246 */ 1247static void 1248isp_save_context(struct isp_device *isp, struct isp_reg *reg_list) 1249{ 1250 struct isp_reg *next = reg_list; 1251 1252 for (; next->reg != ISP_TOK_TERM; next++) 1253 next->val = isp_reg_readl(isp, next->mmio_range, next->reg); 1254} 1255 1256/* 1257 * isp_restore_context - Restores the values of the ISP module registers. 1258 * @isp: OMAP3 ISP device 1259 * @reg_list: Structure containing pairs of register address and value to 1260 * modify on OMAP. 1261 */ 1262static void 1263isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list) 1264{ 1265 struct isp_reg *next = reg_list; 1266 1267 for (; next->reg != ISP_TOK_TERM; next++) 1268 isp_reg_writel(isp, next->val, next->mmio_range, next->reg); 1269} 1270 1271/* 1272 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context. 1273 * @isp: OMAP3 ISP device 1274 * 1275 * Routine for saving the context of each module in the ISP. 1276 * CCDC, HIST, H3A, PREV, RESZ and MMU. 1277 */ 1278static void isp_save_ctx(struct isp_device *isp) 1279{ 1280 isp_save_context(isp, isp_reg_list); 1281 omap_iommu_save_ctx(isp->dev); 1282} 1283 1284/* 1285 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context. 1286 * @isp: OMAP3 ISP device 1287 * 1288 * Routine for restoring the context of each module in the ISP. 1289 * CCDC, HIST, H3A, PREV, RESZ and MMU. 1290 */ 1291static void isp_restore_ctx(struct isp_device *isp) 1292{ 1293 isp_restore_context(isp, isp_reg_list); 1294 omap_iommu_restore_ctx(isp->dev); 1295 omap3isp_ccdc_restore_context(isp); 1296 omap3isp_preview_restore_context(isp); 1297} 1298 1299/* ----------------------------------------------------------------------------- 1300 * SBL resources management 1301 */ 1302#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \ 1303 OMAP3_ISP_SBL_CCDC_LSC_READ | \ 1304 OMAP3_ISP_SBL_PREVIEW_READ | \ 1305 OMAP3_ISP_SBL_RESIZER_READ) 1306#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \ 1307 OMAP3_ISP_SBL_CSI2A_WRITE | \ 1308 OMAP3_ISP_SBL_CSI2C_WRITE | \ 1309 OMAP3_ISP_SBL_CCDC_WRITE | \ 1310 OMAP3_ISP_SBL_PREVIEW_WRITE) 1311 1312void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res) 1313{ 1314 u32 sbl = 0; 1315 1316 isp->sbl_resources |= res; 1317 1318 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ) 1319 sbl |= ISPCTRL_SBL_SHARED_RPORTA; 1320 1321 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ) 1322 sbl |= ISPCTRL_SBL_SHARED_RPORTB; 1323 1324 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE) 1325 sbl |= ISPCTRL_SBL_SHARED_WPORTC; 1326 1327 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE) 1328 sbl |= ISPCTRL_SBL_WR0_RAM_EN; 1329 1330 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE) 1331 sbl |= ISPCTRL_SBL_WR1_RAM_EN; 1332 1333 if (isp->sbl_resources & OMAP3_ISP_SBL_READ) 1334 sbl |= ISPCTRL_SBL_RD_RAM_EN; 1335 1336 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl); 1337} 1338 1339void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res) 1340{ 1341 u32 sbl = 0; 1342 1343 isp->sbl_resources &= ~res; 1344 1345 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)) 1346 sbl |= ISPCTRL_SBL_SHARED_RPORTA; 1347 1348 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)) 1349 sbl |= ISPCTRL_SBL_SHARED_RPORTB; 1350 1351 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)) 1352 sbl |= ISPCTRL_SBL_SHARED_WPORTC; 1353 1354 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)) 1355 sbl |= ISPCTRL_SBL_WR0_RAM_EN; 1356 1357 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE)) 1358 sbl |= ISPCTRL_SBL_WR1_RAM_EN; 1359 1360 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ)) 1361 sbl |= ISPCTRL_SBL_RD_RAM_EN; 1362 1363 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl); 1364} 1365 1366/* 1367 * isp_module_sync_idle - Helper to sync module with its idle state 1368 * @me: ISP submodule's media entity 1369 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization 1370 * @stopping: flag which tells module wants to stop 1371 * 1372 * This function checks if ISP submodule needs to wait for next interrupt. If 1373 * yes, makes the caller to sleep while waiting for such event. 1374 */ 1375int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait, 1376 atomic_t *stopping) 1377{ 1378 struct isp_pipeline *pipe = to_isp_pipeline(me); 1379 1380 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED || 1381 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT && 1382 !isp_pipeline_ready(pipe))) 1383 return 0; 1384 1385 /* 1386 * atomic_set() doesn't include memory barrier on ARM platform for SMP 1387 * scenario. We'll call it here to avoid race conditions. 1388 */ 1389 atomic_set(stopping, 1); 1390 smp_mb(); 1391 1392 /* 1393 * If module is the last one, it's writing to memory. In this case, 1394 * it's necessary to check if the module is already paused due to 1395 * DMA queue underrun or if it has to wait for next interrupt to be 1396 * idle. 1397 * If it isn't the last one, the function won't sleep but *stopping 1398 * will still be set to warn next submodule caller's interrupt the 1399 * module wants to be idle. 1400 */ 1401 if (isp_pipeline_is_last(me)) { 1402 struct isp_video *video = pipe->output; 1403 unsigned long flags; 1404 spin_lock_irqsave(&video->irqlock, flags); 1405 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) { 1406 spin_unlock_irqrestore(&video->irqlock, flags); 1407 atomic_set(stopping, 0); 1408 smp_mb(); 1409 return 0; 1410 } 1411 spin_unlock_irqrestore(&video->irqlock, flags); 1412 if (!wait_event_timeout(*wait, !atomic_read(stopping), 1413 msecs_to_jiffies(1000))) { 1414 atomic_set(stopping, 0); 1415 smp_mb(); 1416 return -ETIMEDOUT; 1417 } 1418 } 1419 1420 return 0; 1421} 1422 1423/* 1424 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping 1425 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization 1426 * @stopping: flag which tells module wants to stop 1427 * 1428 * This function checks if ISP submodule was stopping. In case of yes, it 1429 * notices the caller by setting stopping to 0 and waking up the wait queue. 1430 * Returns 1 if it was stopping or 0 otherwise. 1431 */ 1432int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait, 1433 atomic_t *stopping) 1434{ 1435 if (atomic_cmpxchg(stopping, 1, 0)) { 1436 wake_up(wait); 1437 return 1; 1438 } 1439 1440 return 0; 1441} 1442 1443/* -------------------------------------------------------------------------- 1444 * Clock management 1445 */ 1446 1447#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \ 1448 ISPCTRL_HIST_CLK_EN | \ 1449 ISPCTRL_RSZ_CLK_EN | \ 1450 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \ 1451 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN)) 1452 1453static void __isp_subclk_update(struct isp_device *isp) 1454{ 1455 u32 clk = 0; 1456 1457 /* AEWB and AF share the same clock. */ 1458 if (isp->subclk_resources & 1459 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF)) 1460 clk |= ISPCTRL_H3A_CLK_EN; 1461 1462 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST) 1463 clk |= ISPCTRL_HIST_CLK_EN; 1464 1465 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER) 1466 clk |= ISPCTRL_RSZ_CLK_EN; 1467 1468 /* NOTE: For CCDC & Preview submodules, we need to affect internal 1469 * RAM as well. 1470 */ 1471 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC) 1472 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN; 1473 1474 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW) 1475 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN; 1476 1477 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 1478 ISPCTRL_CLKS_MASK, clk); 1479} 1480 1481void omap3isp_subclk_enable(struct isp_device *isp, 1482 enum isp_subclk_resource res) 1483{ 1484 isp->subclk_resources |= res; 1485 1486 __isp_subclk_update(isp); 1487} 1488 1489void omap3isp_subclk_disable(struct isp_device *isp, 1490 enum isp_subclk_resource res) 1491{ 1492 isp->subclk_resources &= ~res; 1493 1494 __isp_subclk_update(isp); 1495} 1496 1497/* 1498 * isp_enable_clocks - Enable ISP clocks 1499 * @isp: OMAP3 ISP device 1500 * 1501 * Return 0 if successful, or clk_prepare_enable return value if any of them 1502 * fails. 1503 */ 1504static int isp_enable_clocks(struct isp_device *isp) 1505{ 1506 int r; 1507 unsigned long rate; 1508 1509 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]); 1510 if (r) { 1511 dev_err(isp->dev, "failed to enable cam_ick clock\n"); 1512 goto out_clk_enable_ick; 1513 } 1514 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ); 1515 if (r) { 1516 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n"); 1517 goto out_clk_enable_mclk; 1518 } 1519 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]); 1520 if (r) { 1521 dev_err(isp->dev, "failed to enable cam_mclk clock\n"); 1522 goto out_clk_enable_mclk; 1523 } 1524 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]); 1525 if (rate != CM_CAM_MCLK_HZ) 1526 dev_warn(isp->dev, "unexpected cam_mclk rate:\n" 1527 " expected : %d\n" 1528 " actual : %ld\n", CM_CAM_MCLK_HZ, rate); 1529 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]); 1530 if (r) { 1531 dev_err(isp->dev, "failed to enable csi2_fck clock\n"); 1532 goto out_clk_enable_csi2_fclk; 1533 } 1534 return 0; 1535 1536out_clk_enable_csi2_fclk: 1537 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]); 1538out_clk_enable_mclk: 1539 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]); 1540out_clk_enable_ick: 1541 return r; 1542} 1543 1544/* 1545 * isp_disable_clocks - Disable ISP clocks 1546 * @isp: OMAP3 ISP device 1547 */ 1548static void isp_disable_clocks(struct isp_device *isp) 1549{ 1550 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]); 1551 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]); 1552 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]); 1553} 1554 1555static const char *isp_clocks[] = { 1556 "cam_ick", 1557 "cam_mclk", 1558 "csi2_96m_fck", 1559 "l3_ick", 1560}; 1561 1562static int isp_get_clocks(struct isp_device *isp) 1563{ 1564 struct clk *clk; 1565 unsigned int i; 1566 1567 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) { 1568 clk = devm_clk_get(isp->dev, isp_clocks[i]); 1569 if (IS_ERR(clk)) { 1570 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]); 1571 return PTR_ERR(clk); 1572 } 1573 1574 isp->clock[i] = clk; 1575 } 1576 1577 return 0; 1578} 1579 1580/* 1581 * omap3isp_get - Acquire the ISP resource. 1582 * 1583 * Initializes the clocks for the first acquire. 1584 * 1585 * Increment the reference count on the ISP. If the first reference is taken, 1586 * enable clocks and power-up all submodules. 1587 * 1588 * Return a pointer to the ISP device structure, or NULL if an error occurred. 1589 */ 1590static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq) 1591{ 1592 struct isp_device *__isp = isp; 1593 1594 if (isp == NULL) 1595 return NULL; 1596 1597 mutex_lock(&isp->isp_mutex); 1598 if (isp->ref_count > 0) 1599 goto out; 1600 1601 if (isp_enable_clocks(isp) < 0) { 1602 __isp = NULL; 1603 goto out; 1604 } 1605 1606 /* We don't want to restore context before saving it! */ 1607 if (isp->has_context) 1608 isp_restore_ctx(isp); 1609 1610 if (irq) 1611 isp_enable_interrupts(isp); 1612 1613out: 1614 if (__isp != NULL) 1615 isp->ref_count++; 1616 mutex_unlock(&isp->isp_mutex); 1617 1618 return __isp; 1619} 1620 1621struct isp_device *omap3isp_get(struct isp_device *isp) 1622{ 1623 return __omap3isp_get(isp, true); 1624} 1625 1626/* 1627 * omap3isp_put - Release the ISP 1628 * 1629 * Decrement the reference count on the ISP. If the last reference is released, 1630 * power-down all submodules, disable clocks and free temporary buffers. 1631 */ 1632static void __omap3isp_put(struct isp_device *isp, bool save_ctx) 1633{ 1634 if (isp == NULL) 1635 return; 1636 1637 mutex_lock(&isp->isp_mutex); 1638 BUG_ON(isp->ref_count == 0); 1639 if (--isp->ref_count == 0) { 1640 isp_disable_interrupts(isp); 1641 if (save_ctx) { 1642 isp_save_ctx(isp); 1643 isp->has_context = 1; 1644 } 1645 /* Reset the ISP if an entity has failed to stop. This is the 1646 * only way to recover from such conditions. 1647 */ 1648 if (isp->crashed || isp->stop_failure) 1649 isp_reset(isp); 1650 isp_disable_clocks(isp); 1651 } 1652 mutex_unlock(&isp->isp_mutex); 1653} 1654 1655void omap3isp_put(struct isp_device *isp) 1656{ 1657 __omap3isp_put(isp, true); 1658} 1659 1660/* -------------------------------------------------------------------------- 1661 * Platform device driver 1662 */ 1663 1664/* 1665 * omap3isp_print_status - Prints the values of the ISP Control Module registers 1666 * @isp: OMAP3 ISP device 1667 */ 1668#define ISP_PRINT_REGISTER(isp, name)\ 1669 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \ 1670 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name)) 1671#define SBL_PRINT_REGISTER(isp, name)\ 1672 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \ 1673 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name)) 1674 1675void omap3isp_print_status(struct isp_device *isp) 1676{ 1677 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n"); 1678 1679 ISP_PRINT_REGISTER(isp, SYSCONFIG); 1680 ISP_PRINT_REGISTER(isp, SYSSTATUS); 1681 ISP_PRINT_REGISTER(isp, IRQ0ENABLE); 1682 ISP_PRINT_REGISTER(isp, IRQ0STATUS); 1683 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH); 1684 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY); 1685 ISP_PRINT_REGISTER(isp, CTRL); 1686 ISP_PRINT_REGISTER(isp, TCTRL_CTRL); 1687 ISP_PRINT_REGISTER(isp, TCTRL_FRAME); 1688 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY); 1689 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY); 1690 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY); 1691 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH); 1692 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH); 1693 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH); 1694 1695 SBL_PRINT_REGISTER(isp, PCR); 1696 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP); 1697 1698 dev_dbg(isp->dev, "--------------------------------------------\n"); 1699} 1700 1701#ifdef CONFIG_PM 1702 1703/* 1704 * Power management support. 1705 * 1706 * As the ISP can't properly handle an input video stream interruption on a non 1707 * frame boundary, the ISP pipelines need to be stopped before sensors get 1708 * suspended. However, as suspending the sensors can require a running clock, 1709 * which can be provided by the ISP, the ISP can't be completely suspended 1710 * before the sensor. 1711 * 1712 * To solve this problem power management support is split into prepare/complete 1713 * and suspend/resume operations. The pipelines are stopped in prepare() and the 1714 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in 1715 * resume(), and the the pipelines are restarted in complete(). 1716 * 1717 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly 1718 * yet. 1719 */ 1720static int isp_pm_prepare(struct device *dev) 1721{ 1722 struct isp_device *isp = dev_get_drvdata(dev); 1723 int reset; 1724 1725 WARN_ON(mutex_is_locked(&isp->isp_mutex)); 1726 1727 if (isp->ref_count == 0) 1728 return 0; 1729 1730 reset = isp_suspend_modules(isp); 1731 isp_disable_interrupts(isp); 1732 isp_save_ctx(isp); 1733 if (reset) 1734 isp_reset(isp); 1735 1736 return 0; 1737} 1738 1739static int isp_pm_suspend(struct device *dev) 1740{ 1741 struct isp_device *isp = dev_get_drvdata(dev); 1742 1743 WARN_ON(mutex_is_locked(&isp->isp_mutex)); 1744 1745 if (isp->ref_count) 1746 isp_disable_clocks(isp); 1747 1748 return 0; 1749} 1750 1751static int isp_pm_resume(struct device *dev) 1752{ 1753 struct isp_device *isp = dev_get_drvdata(dev); 1754 1755 if (isp->ref_count == 0) 1756 return 0; 1757 1758 return isp_enable_clocks(isp); 1759} 1760 1761static void isp_pm_complete(struct device *dev) 1762{ 1763 struct isp_device *isp = dev_get_drvdata(dev); 1764 1765 if (isp->ref_count == 0) 1766 return; 1767 1768 isp_restore_ctx(isp); 1769 isp_enable_interrupts(isp); 1770 isp_resume_modules(isp); 1771} 1772 1773#else 1774 1775#define isp_pm_prepare NULL 1776#define isp_pm_suspend NULL 1777#define isp_pm_resume NULL 1778#define isp_pm_complete NULL 1779 1780#endif /* CONFIG_PM */ 1781 1782static void isp_unregister_entities(struct isp_device *isp) 1783{ 1784 omap3isp_csi2_unregister_entities(&isp->isp_csi2a); 1785 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2); 1786 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc); 1787 omap3isp_preview_unregister_entities(&isp->isp_prev); 1788 omap3isp_resizer_unregister_entities(&isp->isp_res); 1789 omap3isp_stat_unregister_entities(&isp->isp_aewb); 1790 omap3isp_stat_unregister_entities(&isp->isp_af); 1791 omap3isp_stat_unregister_entities(&isp->isp_hist); 1792 1793 v4l2_device_unregister(&isp->v4l2_dev); 1794 media_device_unregister(&isp->media_dev); 1795} 1796 1797static int isp_link_entity( 1798 struct isp_device *isp, struct media_entity *entity, 1799 enum isp_interface_type interface) 1800{ 1801 struct media_entity *input; 1802 unsigned int flags; 1803 unsigned int pad; 1804 unsigned int i; 1805 1806 /* Connect the sensor to the correct interface module. 1807 * Parallel sensors are connected directly to the CCDC, while 1808 * serial sensors are connected to the CSI2a, CCP2b or CSI2c 1809 * receiver through CSIPHY1 or CSIPHY2. 1810 */ 1811 switch (interface) { 1812 case ISP_INTERFACE_PARALLEL: 1813 input = &isp->isp_ccdc.subdev.entity; 1814 pad = CCDC_PAD_SINK; 1815 flags = 0; 1816 break; 1817 1818 case ISP_INTERFACE_CSI2A_PHY2: 1819 input = &isp->isp_csi2a.subdev.entity; 1820 pad = CSI2_PAD_SINK; 1821 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; 1822 break; 1823 1824 case ISP_INTERFACE_CCP2B_PHY1: 1825 case ISP_INTERFACE_CCP2B_PHY2: 1826 input = &isp->isp_ccp2.subdev.entity; 1827 pad = CCP2_PAD_SINK; 1828 flags = 0; 1829 break; 1830 1831 case ISP_INTERFACE_CSI2C_PHY1: 1832 input = &isp->isp_csi2c.subdev.entity; 1833 pad = CSI2_PAD_SINK; 1834 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; 1835 break; 1836 1837 default: 1838 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__, 1839 interface); 1840 return -EINVAL; 1841 } 1842 1843 /* 1844 * Not all interfaces are available on all revisions of the 1845 * ISP. The sub-devices of those interfaces aren't initialised 1846 * in such a case. Check this by ensuring the num_pads is 1847 * non-zero. 1848 */ 1849 if (!input->num_pads) { 1850 dev_err(isp->dev, "%s: invalid input %u\n", entity->name, 1851 interface); 1852 return -EINVAL; 1853 } 1854 1855 for (i = 0; i < entity->num_pads; i++) { 1856 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE) 1857 break; 1858 } 1859 if (i == entity->num_pads) { 1860 dev_err(isp->dev, "%s: no source pad in external entity\n", 1861 __func__); 1862 return -EINVAL; 1863 } 1864 1865 return media_entity_create_link(entity, i, input, pad, flags); 1866} 1867 1868static int isp_register_entities(struct isp_device *isp) 1869{ 1870 int ret; 1871 1872 isp->media_dev.dev = isp->dev; 1873 strlcpy(isp->media_dev.model, "TI OMAP3 ISP", 1874 sizeof(isp->media_dev.model)); 1875 isp->media_dev.hw_revision = isp->revision; 1876 isp->media_dev.link_notify = isp_pipeline_link_notify; 1877 ret = media_device_register(&isp->media_dev); 1878 if (ret < 0) { 1879 dev_err(isp->dev, "%s: Media device registration failed (%d)\n", 1880 __func__, ret); 1881 return ret; 1882 } 1883 1884 isp->v4l2_dev.mdev = &isp->media_dev; 1885 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev); 1886 if (ret < 0) { 1887 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n", 1888 __func__, ret); 1889 goto done; 1890 } 1891 1892 /* Register internal entities */ 1893 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev); 1894 if (ret < 0) 1895 goto done; 1896 1897 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev); 1898 if (ret < 0) 1899 goto done; 1900 1901 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev); 1902 if (ret < 0) 1903 goto done; 1904 1905 ret = omap3isp_preview_register_entities(&isp->isp_prev, 1906 &isp->v4l2_dev); 1907 if (ret < 0) 1908 goto done; 1909 1910 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev); 1911 if (ret < 0) 1912 goto done; 1913 1914 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev); 1915 if (ret < 0) 1916 goto done; 1917 1918 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev); 1919 if (ret < 0) 1920 goto done; 1921 1922 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev); 1923 if (ret < 0) 1924 goto done; 1925 1926done: 1927 if (ret < 0) 1928 isp_unregister_entities(isp); 1929 1930 return ret; 1931} 1932 1933static void isp_cleanup_modules(struct isp_device *isp) 1934{ 1935 omap3isp_h3a_aewb_cleanup(isp); 1936 omap3isp_h3a_af_cleanup(isp); 1937 omap3isp_hist_cleanup(isp); 1938 omap3isp_resizer_cleanup(isp); 1939 omap3isp_preview_cleanup(isp); 1940 omap3isp_ccdc_cleanup(isp); 1941 omap3isp_ccp2_cleanup(isp); 1942 omap3isp_csi2_cleanup(isp); 1943} 1944 1945static int isp_initialize_modules(struct isp_device *isp) 1946{ 1947 int ret; 1948 1949 ret = omap3isp_csiphy_init(isp); 1950 if (ret < 0) { 1951 dev_err(isp->dev, "CSI PHY initialization failed\n"); 1952 goto error_csiphy; 1953 } 1954 1955 ret = omap3isp_csi2_init(isp); 1956 if (ret < 0) { 1957 dev_err(isp->dev, "CSI2 initialization failed\n"); 1958 goto error_csi2; 1959 } 1960 1961 ret = omap3isp_ccp2_init(isp); 1962 if (ret < 0) { 1963 dev_err(isp->dev, "CCP2 initialization failed\n"); 1964 goto error_ccp2; 1965 } 1966 1967 ret = omap3isp_ccdc_init(isp); 1968 if (ret < 0) { 1969 dev_err(isp->dev, "CCDC initialization failed\n"); 1970 goto error_ccdc; 1971 } 1972 1973 ret = omap3isp_preview_init(isp); 1974 if (ret < 0) { 1975 dev_err(isp->dev, "Preview initialization failed\n"); 1976 goto error_preview; 1977 } 1978 1979 ret = omap3isp_resizer_init(isp); 1980 if (ret < 0) { 1981 dev_err(isp->dev, "Resizer initialization failed\n"); 1982 goto error_resizer; 1983 } 1984 1985 ret = omap3isp_hist_init(isp); 1986 if (ret < 0) { 1987 dev_err(isp->dev, "Histogram initialization failed\n"); 1988 goto error_hist; 1989 } 1990 1991 ret = omap3isp_h3a_aewb_init(isp); 1992 if (ret < 0) { 1993 dev_err(isp->dev, "H3A AEWB initialization failed\n"); 1994 goto error_h3a_aewb; 1995 } 1996 1997 ret = omap3isp_h3a_af_init(isp); 1998 if (ret < 0) { 1999 dev_err(isp->dev, "H3A AF initialization failed\n"); 2000 goto error_h3a_af; 2001 } 2002 2003 /* Connect the submodules. */ 2004 ret = media_entity_create_link( 2005 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE, 2006 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0); 2007 if (ret < 0) 2008 goto error_link; 2009 2010 ret = media_entity_create_link( 2011 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE, 2012 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0); 2013 if (ret < 0) 2014 goto error_link; 2015 2016 ret = media_entity_create_link( 2017 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP, 2018 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0); 2019 if (ret < 0) 2020 goto error_link; 2021 2022 ret = media_entity_create_link( 2023 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF, 2024 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0); 2025 if (ret < 0) 2026 goto error_link; 2027 2028 ret = media_entity_create_link( 2029 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE, 2030 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0); 2031 if (ret < 0) 2032 goto error_link; 2033 2034 ret = media_entity_create_link( 2035 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP, 2036 &isp->isp_aewb.subdev.entity, 0, 2037 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); 2038 if (ret < 0) 2039 goto error_link; 2040 2041 ret = media_entity_create_link( 2042 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP, 2043 &isp->isp_af.subdev.entity, 0, 2044 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); 2045 if (ret < 0) 2046 goto error_link; 2047 2048 ret = media_entity_create_link( 2049 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP, 2050 &isp->isp_hist.subdev.entity, 0, 2051 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); 2052 if (ret < 0) 2053 goto error_link; 2054 2055 return 0; 2056 2057error_link: 2058 omap3isp_h3a_af_cleanup(isp); 2059error_h3a_af: 2060 omap3isp_h3a_aewb_cleanup(isp); 2061error_h3a_aewb: 2062 omap3isp_hist_cleanup(isp); 2063error_hist: 2064 omap3isp_resizer_cleanup(isp); 2065error_resizer: 2066 omap3isp_preview_cleanup(isp); 2067error_preview: 2068 omap3isp_ccdc_cleanup(isp); 2069error_ccdc: 2070 omap3isp_ccp2_cleanup(isp); 2071error_ccp2: 2072 omap3isp_csi2_cleanup(isp); 2073error_csi2: 2074error_csiphy: 2075 return ret; 2076} 2077 2078static void isp_detach_iommu(struct isp_device *isp) 2079{ 2080 arm_iommu_release_mapping(isp->mapping); 2081 isp->mapping = NULL; 2082 iommu_group_remove_device(isp->dev); 2083} 2084 2085static int isp_attach_iommu(struct isp_device *isp) 2086{ 2087 struct dma_iommu_mapping *mapping; 2088 struct iommu_group *group; 2089 int ret; 2090 2091 /* Create a device group and add the device to it. */ 2092 group = iommu_group_alloc(); 2093 if (IS_ERR(group)) { 2094 dev_err(isp->dev, "failed to allocate IOMMU group\n"); 2095 return PTR_ERR(group); 2096 } 2097 2098 ret = iommu_group_add_device(group, isp->dev); 2099 iommu_group_put(group); 2100 2101 if (ret < 0) { 2102 dev_err(isp->dev, "failed to add device to IPMMU group\n"); 2103 return ret; 2104 } 2105 2106 /* 2107 * Create the ARM mapping, used by the ARM DMA mapping core to allocate 2108 * VAs. This will allocate a corresponding IOMMU domain. 2109 */ 2110 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G); 2111 if (IS_ERR(mapping)) { 2112 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n"); 2113 ret = PTR_ERR(mapping); 2114 goto error; 2115 } 2116 2117 isp->mapping = mapping; 2118 2119 /* Attach the ARM VA mapping to the device. */ 2120 ret = arm_iommu_attach_device(isp->dev, mapping); 2121 if (ret < 0) { 2122 dev_err(isp->dev, "failed to attach device to VA mapping\n"); 2123 goto error; 2124 } 2125 2126 return 0; 2127 2128error: 2129 isp_detach_iommu(isp); 2130 return ret; 2131} 2132 2133/* 2134 * isp_remove - Remove ISP platform device 2135 * @pdev: Pointer to ISP platform device 2136 * 2137 * Always returns 0. 2138 */ 2139static int isp_remove(struct platform_device *pdev) 2140{ 2141 struct isp_device *isp = platform_get_drvdata(pdev); 2142 2143 v4l2_async_notifier_unregister(&isp->notifier); 2144 isp_unregister_entities(isp); 2145 isp_cleanup_modules(isp); 2146 isp_xclk_cleanup(isp); 2147 2148 __omap3isp_get(isp, false); 2149 isp_detach_iommu(isp); 2150 __omap3isp_put(isp, false); 2151 2152 return 0; 2153} 2154 2155enum isp_of_phy { 2156 ISP_OF_PHY_PARALLEL = 0, 2157 ISP_OF_PHY_CSIPHY1, 2158 ISP_OF_PHY_CSIPHY2, 2159}; 2160 2161static int isp_of_parse_node(struct device *dev, struct device_node *node, 2162 struct isp_async_subdev *isd) 2163{ 2164 struct isp_bus_cfg *buscfg = &isd->bus; 2165 struct v4l2_of_endpoint vep; 2166 unsigned int i; 2167 2168 v4l2_of_parse_endpoint(node, &vep); 2169 2170 dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name, 2171 vep.base.port); 2172 2173 switch (vep.base.port) { 2174 case ISP_OF_PHY_PARALLEL: 2175 buscfg->interface = ISP_INTERFACE_PARALLEL; 2176 buscfg->bus.parallel.data_lane_shift = 2177 vep.bus.parallel.data_shift; 2178 buscfg->bus.parallel.clk_pol = 2179 !!(vep.bus.parallel.flags 2180 & V4L2_MBUS_PCLK_SAMPLE_FALLING); 2181 buscfg->bus.parallel.hs_pol = 2182 !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW); 2183 buscfg->bus.parallel.vs_pol = 2184 !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW); 2185 buscfg->bus.parallel.fld_pol = 2186 !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW); 2187 buscfg->bus.parallel.data_pol = 2188 !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW); 2189 break; 2190 2191 case ISP_OF_PHY_CSIPHY1: 2192 case ISP_OF_PHY_CSIPHY2: 2193 /* FIXME: always assume CSI-2 for now. */ 2194 switch (vep.base.port) { 2195 case ISP_OF_PHY_CSIPHY1: 2196 buscfg->interface = ISP_INTERFACE_CSI2C_PHY1; 2197 break; 2198 case ISP_OF_PHY_CSIPHY2: 2199 buscfg->interface = ISP_INTERFACE_CSI2A_PHY2; 2200 break; 2201 } 2202 buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane; 2203 buscfg->bus.csi2.lanecfg.clk.pol = 2204 vep.bus.mipi_csi2.lane_polarities[0]; 2205 dev_dbg(dev, "clock lane polarity %u, pos %u\n", 2206 buscfg->bus.csi2.lanecfg.clk.pol, 2207 buscfg->bus.csi2.lanecfg.clk.pos); 2208 2209 for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) { 2210 buscfg->bus.csi2.lanecfg.data[i].pos = 2211 vep.bus.mipi_csi2.data_lanes[i]; 2212 buscfg->bus.csi2.lanecfg.data[i].pol = 2213 vep.bus.mipi_csi2.lane_polarities[i + 1]; 2214 dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i, 2215 buscfg->bus.csi2.lanecfg.data[i].pol, 2216 buscfg->bus.csi2.lanecfg.data[i].pos); 2217 } 2218 2219 /* 2220 * FIXME: now we assume the CRC is always there. 2221 * Implement a way to obtain this information from the 2222 * sensor. Frame descriptors, perhaps? 2223 */ 2224 buscfg->bus.csi2.crc = 1; 2225 break; 2226 2227 default: 2228 dev_warn(dev, "%s: invalid interface %u\n", node->full_name, 2229 vep.base.port); 2230 break; 2231 } 2232 2233 return 0; 2234} 2235 2236static int isp_of_parse_nodes(struct device *dev, 2237 struct v4l2_async_notifier *notifier) 2238{ 2239 struct device_node *node = NULL; 2240 2241 notifier->subdevs = devm_kcalloc( 2242 dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL); 2243 if (!notifier->subdevs) 2244 return -ENOMEM; 2245 2246 while (notifier->num_subdevs < ISP_MAX_SUBDEVS && 2247 (node = of_graph_get_next_endpoint(dev->of_node, node))) { 2248 struct isp_async_subdev *isd; 2249 2250 isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL); 2251 if (!isd) { 2252 of_node_put(node); 2253 return -ENOMEM; 2254 } 2255 2256 notifier->subdevs[notifier->num_subdevs] = &isd->asd; 2257 2258 if (isp_of_parse_node(dev, node, isd)) { 2259 of_node_put(node); 2260 return -EINVAL; 2261 } 2262 2263 isd->asd.match.of.node = of_graph_get_remote_port_parent(node); 2264 of_node_put(node); 2265 if (!isd->asd.match.of.node) { 2266 dev_warn(dev, "bad remote port parent\n"); 2267 return -EINVAL; 2268 } 2269 2270 isd->asd.match_type = V4L2_ASYNC_MATCH_OF; 2271 notifier->num_subdevs++; 2272 } 2273 2274 return notifier->num_subdevs; 2275} 2276 2277static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async, 2278 struct v4l2_subdev *subdev, 2279 struct v4l2_async_subdev *asd) 2280{ 2281 struct isp_device *isp = container_of(async, struct isp_device, 2282 notifier); 2283 struct isp_async_subdev *isd = 2284 container_of(asd, struct isp_async_subdev, asd); 2285 int ret; 2286 2287 ret = isp_link_entity(isp, &subdev->entity, isd->bus.interface); 2288 if (ret < 0) 2289 return ret; 2290 2291 isd->sd = subdev; 2292 isd->sd->host_priv = &isd->bus; 2293 2294 return ret; 2295} 2296 2297static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async) 2298{ 2299 struct isp_device *isp = container_of(async, struct isp_device, 2300 notifier); 2301 2302 return v4l2_device_register_subdev_nodes(&isp->v4l2_dev); 2303} 2304 2305/* 2306 * isp_probe - Probe ISP platform device 2307 * @pdev: Pointer to ISP platform device 2308 * 2309 * Returns 0 if successful, 2310 * -ENOMEM if no memory available, 2311 * -ENODEV if no platform device resources found 2312 * or no space for remapping registers, 2313 * -EINVAL if couldn't install ISR, 2314 * or clk_get return error value. 2315 */ 2316static int isp_probe(struct platform_device *pdev) 2317{ 2318 struct isp_device *isp; 2319 struct resource *mem; 2320 int ret; 2321 int i, m; 2322 2323 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL); 2324 if (!isp) { 2325 dev_err(&pdev->dev, "could not allocate memory\n"); 2326 return -ENOMEM; 2327 } 2328 2329 ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type", 2330 &isp->phy_type); 2331 if (ret) 2332 return ret; 2333 2334 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, 2335 "syscon"); 2336 if (IS_ERR(isp->syscon)) 2337 return PTR_ERR(isp->syscon); 2338 2339 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, 2340 &isp->syscon_offset); 2341 if (ret) 2342 return ret; 2343 2344 ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier); 2345 if (ret < 0) 2346 return ret; 2347 2348 isp->autoidle = autoidle; 2349 2350 mutex_init(&isp->isp_mutex); 2351 spin_lock_init(&isp->stat_lock); 2352 2353 isp->dev = &pdev->dev; 2354 isp->ref_count = 0; 2355 2356 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32)); 2357 if (ret) 2358 goto error; 2359 2360 platform_set_drvdata(pdev, isp); 2361 2362 /* Regulators */ 2363 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1"); 2364 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2"); 2365 2366 /* Clocks 2367 * 2368 * The ISP clock tree is revision-dependent. We thus need to enable ICLK 2369 * manually to read the revision before calling __omap3isp_get(). 2370 * 2371 * Start by mapping the ISP MMIO area, which is in two pieces. 2372 * The ISP IOMMU is in between. Map both now, and fill in the 2373 * ISP revision specific portions a little later in the 2374 * function. 2375 */ 2376 for (i = 0; i < 2; i++) { 2377 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0; 2378 2379 mem = platform_get_resource(pdev, IORESOURCE_MEM, i); 2380 isp->mmio_base[map_idx] = 2381 devm_ioremap_resource(isp->dev, mem); 2382 if (IS_ERR(isp->mmio_base[map_idx])) 2383 return PTR_ERR(isp->mmio_base[map_idx]); 2384 } 2385 2386 ret = isp_get_clocks(isp); 2387 if (ret < 0) 2388 goto error; 2389 2390 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]); 2391 if (ret < 0) 2392 goto error; 2393 2394 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION); 2395 dev_info(isp->dev, "Revision %d.%d found\n", 2396 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f); 2397 2398 clk_disable(isp->clock[ISP_CLK_CAM_ICK]); 2399 2400 if (__omap3isp_get(isp, false) == NULL) { 2401 ret = -ENODEV; 2402 goto error; 2403 } 2404 2405 ret = isp_reset(isp); 2406 if (ret < 0) 2407 goto error_isp; 2408 2409 ret = isp_xclk_init(isp); 2410 if (ret < 0) 2411 goto error_isp; 2412 2413 /* Memory resources */ 2414 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++) 2415 if (isp->revision == isp_res_maps[m].isp_rev) 2416 break; 2417 2418 if (m == ARRAY_SIZE(isp_res_maps)) { 2419 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n", 2420 (isp->revision & 0xf0) >> 4, isp->revision & 0xf); 2421 ret = -ENODEV; 2422 goto error_isp; 2423 } 2424 2425 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++) 2426 isp->mmio_base[i] = 2427 isp->mmio_base[0] + isp_res_maps[m].offset[i]; 2428 2429 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++) 2430 isp->mmio_base[i] = 2431 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1] 2432 + isp_res_maps[m].offset[i]; 2433 2434 isp->mmio_hist_base_phys = 2435 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST]; 2436 2437 /* IOMMU */ 2438 ret = isp_attach_iommu(isp); 2439 if (ret < 0) { 2440 dev_err(&pdev->dev, "unable to attach to IOMMU\n"); 2441 goto error_isp; 2442 } 2443 2444 /* Interrupt */ 2445 isp->irq_num = platform_get_irq(pdev, 0); 2446 if (isp->irq_num <= 0) { 2447 dev_err(isp->dev, "No IRQ resource\n"); 2448 ret = -ENODEV; 2449 goto error_iommu; 2450 } 2451 2452 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED, 2453 "OMAP3 ISP", isp)) { 2454 dev_err(isp->dev, "Unable to request IRQ\n"); 2455 ret = -EINVAL; 2456 goto error_iommu; 2457 } 2458 2459 /* Entities */ 2460 ret = isp_initialize_modules(isp); 2461 if (ret < 0) 2462 goto error_iommu; 2463 2464 ret = isp_register_entities(isp); 2465 if (ret < 0) 2466 goto error_modules; 2467 2468 isp->notifier.bound = isp_subdev_notifier_bound; 2469 isp->notifier.complete = isp_subdev_notifier_complete; 2470 2471 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier); 2472 if (ret) 2473 goto error_register_entities; 2474 2475 isp_core_init(isp, 1); 2476 omap3isp_put(isp); 2477 2478 return 0; 2479 2480error_register_entities: 2481 isp_unregister_entities(isp); 2482error_modules: 2483 isp_cleanup_modules(isp); 2484error_iommu: 2485 isp_detach_iommu(isp); 2486error_isp: 2487 isp_xclk_cleanup(isp); 2488 __omap3isp_put(isp, false); 2489error: 2490 mutex_destroy(&isp->isp_mutex); 2491 2492 return ret; 2493} 2494 2495static const struct dev_pm_ops omap3isp_pm_ops = { 2496 .prepare = isp_pm_prepare, 2497 .suspend = isp_pm_suspend, 2498 .resume = isp_pm_resume, 2499 .complete = isp_pm_complete, 2500}; 2501 2502static struct platform_device_id omap3isp_id_table[] = { 2503 { "omap3isp", 0 }, 2504 { }, 2505}; 2506MODULE_DEVICE_TABLE(platform, omap3isp_id_table); 2507 2508static const struct of_device_id omap3isp_of_table[] = { 2509 { .compatible = "ti,omap3-isp" }, 2510 { }, 2511}; 2512 2513static struct platform_driver omap3isp_driver = { 2514 .probe = isp_probe, 2515 .remove = isp_remove, 2516 .id_table = omap3isp_id_table, 2517 .driver = { 2518 .name = "omap3isp", 2519 .pm = &omap3isp_pm_ops, 2520 .of_match_table = omap3isp_of_table, 2521 }, 2522}; 2523 2524module_platform_driver(omap3isp_driver); 2525 2526MODULE_AUTHOR("Nokia Corporation"); 2527MODULE_DESCRIPTION("TI OMAP3 ISP driver"); 2528MODULE_LICENSE("GPL"); 2529MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION); 2530