1/*
2 * OMAP hardware spinlock driver
3 *
4 * Copyright (C) 2010-2015 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Contact: Simon Que <sque@ti.com>
7 *          Hari Kanigeri <h-kanigeri2@ti.com>
8 *          Ohad Ben-Cohen <ohad@wizery.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * version 2 as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
17 * General Public License for more details.
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/device.h>
23#include <linux/delay.h>
24#include <linux/io.h>
25#include <linux/bitops.h>
26#include <linux/pm_runtime.h>
27#include <linux/slab.h>
28#include <linux/spinlock.h>
29#include <linux/hwspinlock.h>
30#include <linux/of.h>
31#include <linux/platform_device.h>
32
33#include "hwspinlock_internal.h"
34
35/* Spinlock register offsets */
36#define SYSSTATUS_OFFSET		0x0014
37#define LOCK_BASE_OFFSET		0x0800
38
39#define SPINLOCK_NUMLOCKS_BIT_OFFSET	(24)
40
41/* Possible values of SPINLOCK_LOCK_REG */
42#define SPINLOCK_NOTTAKEN		(0)	/* free */
43#define SPINLOCK_TAKEN			(1)	/* locked */
44
45static int omap_hwspinlock_trylock(struct hwspinlock *lock)
46{
47	void __iomem *lock_addr = lock->priv;
48
49	/* attempt to acquire the lock by reading its value */
50	return (SPINLOCK_NOTTAKEN == readl(lock_addr));
51}
52
53static void omap_hwspinlock_unlock(struct hwspinlock *lock)
54{
55	void __iomem *lock_addr = lock->priv;
56
57	/* release the lock by writing 0 to it */
58	writel(SPINLOCK_NOTTAKEN, lock_addr);
59}
60
61/*
62 * relax the OMAP interconnect while spinning on it.
63 *
64 * The specs recommended that the retry delay time will be
65 * just over half of the time that a requester would be
66 * expected to hold the lock.
67 *
68 * The number below is taken from an hardware specs example,
69 * obviously it is somewhat arbitrary.
70 */
71static void omap_hwspinlock_relax(struct hwspinlock *lock)
72{
73	ndelay(50);
74}
75
76static const struct hwspinlock_ops omap_hwspinlock_ops = {
77	.trylock = omap_hwspinlock_trylock,
78	.unlock = omap_hwspinlock_unlock,
79	.relax = omap_hwspinlock_relax,
80};
81
82static int omap_hwspinlock_probe(struct platform_device *pdev)
83{
84	struct device_node *node = pdev->dev.of_node;
85	struct hwspinlock_device *bank;
86	struct hwspinlock *hwlock;
87	struct resource *res;
88	void __iomem *io_base;
89	int num_locks, i, ret;
90	/* Only a single hwspinlock block device is supported */
91	int base_id = 0;
92
93	if (!node)
94		return -ENODEV;
95
96	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
97	if (!res)
98		return -ENODEV;
99
100	io_base = ioremap(res->start, resource_size(res));
101	if (!io_base)
102		return -ENOMEM;
103
104	/*
105	 * make sure the module is enabled and clocked before reading
106	 * the module SYSSTATUS register
107	 */
108	pm_runtime_enable(&pdev->dev);
109	ret = pm_runtime_get_sync(&pdev->dev);
110	if (ret < 0) {
111		pm_runtime_put_noidle(&pdev->dev);
112		goto iounmap_base;
113	}
114
115	/* Determine number of locks */
116	i = readl(io_base + SYSSTATUS_OFFSET);
117	i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
118
119	/*
120	 * runtime PM will make sure the clock of this module is
121	 * enabled again iff at least one lock is requested
122	 */
123	ret = pm_runtime_put(&pdev->dev);
124	if (ret < 0)
125		goto iounmap_base;
126
127	/* one of the four lsb's must be set, and nothing else */
128	if (hweight_long(i & 0xf) != 1 || i > 8) {
129		ret = -EINVAL;
130		goto iounmap_base;
131	}
132
133	num_locks = i * 32; /* actual number of locks in this device */
134
135	bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL);
136	if (!bank) {
137		ret = -ENOMEM;
138		goto iounmap_base;
139	}
140
141	platform_set_drvdata(pdev, bank);
142
143	for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
144		hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
145
146	ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
147						base_id, num_locks);
148	if (ret)
149		goto reg_fail;
150
151	return 0;
152
153reg_fail:
154	kfree(bank);
155iounmap_base:
156	pm_runtime_disable(&pdev->dev);
157	iounmap(io_base);
158	return ret;
159}
160
161static int omap_hwspinlock_remove(struct platform_device *pdev)
162{
163	struct hwspinlock_device *bank = platform_get_drvdata(pdev);
164	void __iomem *io_base = bank->lock[0].priv - LOCK_BASE_OFFSET;
165	int ret;
166
167	ret = hwspin_lock_unregister(bank);
168	if (ret) {
169		dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
170		return ret;
171	}
172
173	pm_runtime_disable(&pdev->dev);
174	iounmap(io_base);
175	kfree(bank);
176
177	return 0;
178}
179
180static const struct of_device_id omap_hwspinlock_of_match[] = {
181	{ .compatible = "ti,omap4-hwspinlock", },
182	{ /* end */ },
183};
184MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match);
185
186static struct platform_driver omap_hwspinlock_driver = {
187	.probe		= omap_hwspinlock_probe,
188	.remove		= omap_hwspinlock_remove,
189	.driver		= {
190		.name	= "omap_hwspinlock",
191		.of_match_table = of_match_ptr(omap_hwspinlock_of_match),
192	},
193};
194
195static int __init omap_hwspinlock_init(void)
196{
197	return platform_driver_register(&omap_hwspinlock_driver);
198}
199/* board init code might need to reserve hwspinlocks for predefined purposes */
200postcore_initcall(omap_hwspinlock_init);
201
202static void __exit omap_hwspinlock_exit(void)
203{
204	platform_driver_unregister(&omap_hwspinlock_driver);
205}
206module_exit(omap_hwspinlock_exit);
207
208MODULE_LICENSE("GPL v2");
209MODULE_DESCRIPTION("Hardware spinlock driver for OMAP");
210MODULE_AUTHOR("Simon Que <sque@ti.com>");
211MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>");
212MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>");
213