1/*
2 * coretemp.c - Linux kernel module for hardware monitoring
3 *
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Inspired from many hwmon drivers
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
21 */
22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/jiffies.h>
29#include <linux/hwmon.h>
30#include <linux/sysfs.h>
31#include <linux/hwmon-sysfs.h>
32#include <linux/err.h>
33#include <linux/mutex.h>
34#include <linux/list.h>
35#include <linux/platform_device.h>
36#include <linux/cpu.h>
37#include <linux/smp.h>
38#include <linux/moduleparam.h>
39#include <linux/pci.h>
40#include <asm/msr.h>
41#include <asm/processor.h>
42#include <asm/cpu_device_id.h>
43
44#define DRVNAME	"coretemp"
45
46/*
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
49 */
50static int force_tjmax;
51module_param_named(tjmax, force_tjmax, int, 0444);
52MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
53
54#define BASE_SYSFS_ATTR_NO	2	/* Sysfs Base attr no for coretemp */
55#define NUM_REAL_CORES		128	/* Number of Real cores per cpu */
56#define CORETEMP_NAME_LENGTH	19	/* String Length of attrs */
57#define MAX_CORE_ATTRS		4	/* Maximum no of basic attrs */
58#define TOTAL_ATTRS		(MAX_CORE_ATTRS + 1)
59#define MAX_CORE_DATA		(NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
60
61#define TO_PHYS_ID(cpu)		(cpu_data(cpu).phys_proc_id)
62#define TO_CORE_ID(cpu)		(cpu_data(cpu).cpu_core_id)
63#define TO_ATTR_NO(cpu)		(TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
64
65#ifdef CONFIG_SMP
66#define for_each_sibling(i, cpu) \
67	for_each_cpu(i, topology_sibling_cpumask(cpu))
68#else
69#define for_each_sibling(i, cpu)	for (i = 0; false; )
70#endif
71
72/*
73 * Per-Core Temperature Data
74 * @last_updated: The time when the current temperature value was updated
75 *		earlier (in jiffies).
76 * @cpu_core_id: The CPU Core from which temperature values should be read
77 *		This value is passed as "id" field to rdmsr/wrmsr functions.
78 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
79 *		from where the temperature values should be read.
80 * @attr_size:  Total number of pre-core attrs displayed in the sysfs.
81 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
82 *		Otherwise, temp_data holds coretemp data.
83 * @valid: If this is 1, the current temperature is valid.
84 */
85struct temp_data {
86	int temp;
87	int ttarget;
88	int tjmax;
89	unsigned long last_updated;
90	unsigned int cpu;
91	u32 cpu_core_id;
92	u32 status_reg;
93	int attr_size;
94	bool is_pkg_data;
95	bool valid;
96	struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
97	char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
98	struct attribute *attrs[TOTAL_ATTRS + 1];
99	struct attribute_group attr_group;
100	struct mutex update_lock;
101};
102
103/* Platform Data per Physical CPU */
104struct platform_data {
105	struct device *hwmon_dev;
106	u16 phys_proc_id;
107	struct temp_data *core_data[MAX_CORE_DATA];
108	struct device_attribute name_attr;
109};
110
111struct pdev_entry {
112	struct list_head list;
113	struct platform_device *pdev;
114	u16 phys_proc_id;
115};
116
117static LIST_HEAD(pdev_list);
118static DEFINE_MUTEX(pdev_list_mutex);
119
120static ssize_t show_label(struct device *dev,
121				struct device_attribute *devattr, char *buf)
122{
123	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
124	struct platform_data *pdata = dev_get_drvdata(dev);
125	struct temp_data *tdata = pdata->core_data[attr->index];
126
127	if (tdata->is_pkg_data)
128		return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
129
130	return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
131}
132
133static ssize_t show_crit_alarm(struct device *dev,
134				struct device_attribute *devattr, char *buf)
135{
136	u32 eax, edx;
137	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
138	struct platform_data *pdata = dev_get_drvdata(dev);
139	struct temp_data *tdata = pdata->core_data[attr->index];
140
141	rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
142
143	return sprintf(buf, "%d\n", (eax >> 5) & 1);
144}
145
146static ssize_t show_tjmax(struct device *dev,
147			struct device_attribute *devattr, char *buf)
148{
149	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
150	struct platform_data *pdata = dev_get_drvdata(dev);
151
152	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
153}
154
155static ssize_t show_ttarget(struct device *dev,
156				struct device_attribute *devattr, char *buf)
157{
158	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
159	struct platform_data *pdata = dev_get_drvdata(dev);
160
161	return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
162}
163
164static ssize_t show_temp(struct device *dev,
165			struct device_attribute *devattr, char *buf)
166{
167	u32 eax, edx;
168	struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
169	struct platform_data *pdata = dev_get_drvdata(dev);
170	struct temp_data *tdata = pdata->core_data[attr->index];
171
172	mutex_lock(&tdata->update_lock);
173
174	/* Check whether the time interval has elapsed */
175	if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
176		rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
177		/*
178		 * Ignore the valid bit. In all observed cases the register
179		 * value is either low or zero if the valid bit is 0.
180		 * Return it instead of reporting an error which doesn't
181		 * really help at all.
182		 */
183		tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000;
184		tdata->valid = 1;
185		tdata->last_updated = jiffies;
186	}
187
188	mutex_unlock(&tdata->update_lock);
189	return sprintf(buf, "%d\n", tdata->temp);
190}
191
192struct tjmax_pci {
193	unsigned int device;
194	int tjmax;
195};
196
197static const struct tjmax_pci tjmax_pci_table[] = {
198	{ 0x0708, 110000 },	/* CE41x0 (Sodaville ) */
199	{ 0x0c72, 102000 },	/* Atom S1240 (Centerton) */
200	{ 0x0c73, 95000 },	/* Atom S1220 (Centerton) */
201	{ 0x0c75, 95000 },	/* Atom S1260 (Centerton) */
202};
203
204struct tjmax {
205	char const *id;
206	int tjmax;
207};
208
209static const struct tjmax tjmax_table[] = {
210	{ "CPU  230", 100000 },		/* Model 0x1c, stepping 2	*/
211	{ "CPU  330", 125000 },		/* Model 0x1c, stepping 2	*/
212};
213
214struct tjmax_model {
215	u8 model;
216	u8 mask;
217	int tjmax;
218};
219
220#define ANY 0xff
221
222static const struct tjmax_model tjmax_model_table[] = {
223	{ 0x1c, 10, 100000 },	/* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */
224	{ 0x1c, ANY, 90000 },	/* Z5xx, N2xx, possibly others
225				 * Note: Also matches 230 and 330,
226				 * which are covered by tjmax_table
227				 */
228	{ 0x26, ANY, 90000 },	/* Atom Tunnel Creek (Exx), Lincroft (Z6xx)
229				 * Note: TjMax for E6xxT is 110C, but CPU type
230				 * is undetectable by software
231				 */
232	{ 0x27, ANY, 90000 },	/* Atom Medfield (Z2460) */
233	{ 0x35, ANY, 90000 },	/* Atom Clover Trail/Cloverview (Z27x0) */
234	{ 0x36, ANY, 100000 },	/* Atom Cedar Trail/Cedarview (N2xxx, D2xxx)
235				 * Also matches S12x0 (stepping 9), covered by
236				 * PCI table
237				 */
238};
239
240static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
241{
242	/* The 100C is default for both mobile and non mobile CPUs */
243
244	int tjmax = 100000;
245	int tjmax_ee = 85000;
246	int usemsr_ee = 1;
247	int err;
248	u32 eax, edx;
249	int i;
250	struct pci_dev *host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
251
252	/*
253	 * Explicit tjmax table entries override heuristics.
254	 * First try PCI host bridge IDs, followed by model ID strings
255	 * and model/stepping information.
256	 */
257	if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) {
258		for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) {
259			if (host_bridge->device == tjmax_pci_table[i].device)
260				return tjmax_pci_table[i].tjmax;
261		}
262	}
263
264	for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) {
265		if (strstr(c->x86_model_id, tjmax_table[i].id))
266			return tjmax_table[i].tjmax;
267	}
268
269	for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) {
270		const struct tjmax_model *tm = &tjmax_model_table[i];
271		if (c->x86_model == tm->model &&
272		    (tm->mask == ANY || c->x86_mask == tm->mask))
273			return tm->tjmax;
274	}
275
276	/* Early chips have no MSR for TjMax */
277
278	if (c->x86_model == 0xf && c->x86_mask < 4)
279		usemsr_ee = 0;
280
281	if (c->x86_model > 0xe && usemsr_ee) {
282		u8 platform_id;
283
284		/*
285		 * Now we can detect the mobile CPU using Intel provided table
286		 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
287		 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
288		 */
289		err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
290		if (err) {
291			dev_warn(dev,
292				 "Unable to access MSR 0x17, assuming desktop"
293				 " CPU\n");
294			usemsr_ee = 0;
295		} else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
296			/*
297			 * Trust bit 28 up to Penryn, I could not find any
298			 * documentation on that; if you happen to know
299			 * someone at Intel please ask
300			 */
301			usemsr_ee = 0;
302		} else {
303			/* Platform ID bits 52:50 (EDX starts at bit 32) */
304			platform_id = (edx >> 18) & 0x7;
305
306			/*
307			 * Mobile Penryn CPU seems to be platform ID 7 or 5
308			 * (guesswork)
309			 */
310			if (c->x86_model == 0x17 &&
311			    (platform_id == 5 || platform_id == 7)) {
312				/*
313				 * If MSR EE bit is set, set it to 90 degrees C,
314				 * otherwise 105 degrees C
315				 */
316				tjmax_ee = 90000;
317				tjmax = 105000;
318			}
319		}
320	}
321
322	if (usemsr_ee) {
323		err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
324		if (err) {
325			dev_warn(dev,
326				 "Unable to access MSR 0xEE, for Tjmax, left"
327				 " at default\n");
328		} else if (eax & 0x40000000) {
329			tjmax = tjmax_ee;
330		}
331	} else if (tjmax == 100000) {
332		/*
333		 * If we don't use msr EE it means we are desktop CPU
334		 * (with exeception of Atom)
335		 */
336		dev_warn(dev, "Using relative temperature scale!\n");
337	}
338
339	return tjmax;
340}
341
342static bool cpu_has_tjmax(struct cpuinfo_x86 *c)
343{
344	u8 model = c->x86_model;
345
346	return model > 0xe &&
347	       model != 0x1c &&
348	       model != 0x26 &&
349	       model != 0x27 &&
350	       model != 0x35 &&
351	       model != 0x36;
352}
353
354static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
355{
356	int err;
357	u32 eax, edx;
358	u32 val;
359
360	/*
361	 * A new feature of current Intel(R) processors, the
362	 * IA32_TEMPERATURE_TARGET contains the TjMax value
363	 */
364	err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
365	if (err) {
366		if (cpu_has_tjmax(c))
367			dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
368	} else {
369		val = (eax >> 16) & 0xff;
370		/*
371		 * If the TjMax is not plausible, an assumption
372		 * will be used
373		 */
374		if (val) {
375			dev_dbg(dev, "TjMax is %d degrees C\n", val);
376			return val * 1000;
377		}
378	}
379
380	if (force_tjmax) {
381		dev_notice(dev, "TjMax forced to %d degrees C by user\n",
382			   force_tjmax);
383		return force_tjmax * 1000;
384	}
385
386	/*
387	 * An assumption is made for early CPUs and unreadable MSR.
388	 * NOTE: the calculated value may not be correct.
389	 */
390	return adjust_tjmax(c, id, dev);
391}
392
393static int create_core_attrs(struct temp_data *tdata, struct device *dev,
394			     int attr_no)
395{
396	int i;
397	static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
398			struct device_attribute *devattr, char *buf) = {
399			show_label, show_crit_alarm, show_temp, show_tjmax,
400			show_ttarget };
401	static const char *const suffixes[TOTAL_ATTRS] = {
402		"label", "crit_alarm", "input", "crit", "max"
403	};
404
405	for (i = 0; i < tdata->attr_size; i++) {
406		snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH,
407			 "temp%d_%s", attr_no, suffixes[i]);
408		sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
409		tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
410		tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
411		tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
412		tdata->sd_attrs[i].index = attr_no;
413		tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr;
414	}
415	tdata->attr_group.attrs = tdata->attrs;
416	return sysfs_create_group(&dev->kobj, &tdata->attr_group);
417}
418
419
420static int chk_ucode_version(unsigned int cpu)
421{
422	struct cpuinfo_x86 *c = &cpu_data(cpu);
423
424	/*
425	 * Check if we have problem with errata AE18 of Core processors:
426	 * Readings might stop update when processor visited too deep sleep,
427	 * fixed for stepping D0 (6EC).
428	 */
429	if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
430		pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n");
431		return -ENODEV;
432	}
433	return 0;
434}
435
436static struct platform_device *coretemp_get_pdev(unsigned int cpu)
437{
438	u16 phys_proc_id = TO_PHYS_ID(cpu);
439	struct pdev_entry *p;
440
441	mutex_lock(&pdev_list_mutex);
442
443	list_for_each_entry(p, &pdev_list, list)
444		if (p->phys_proc_id == phys_proc_id) {
445			mutex_unlock(&pdev_list_mutex);
446			return p->pdev;
447		}
448
449	mutex_unlock(&pdev_list_mutex);
450	return NULL;
451}
452
453static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
454{
455	struct temp_data *tdata;
456
457	tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
458	if (!tdata)
459		return NULL;
460
461	tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
462							MSR_IA32_THERM_STATUS;
463	tdata->is_pkg_data = pkg_flag;
464	tdata->cpu = cpu;
465	tdata->cpu_core_id = TO_CORE_ID(cpu);
466	tdata->attr_size = MAX_CORE_ATTRS;
467	mutex_init(&tdata->update_lock);
468	return tdata;
469}
470
471static int create_core_data(struct platform_device *pdev, unsigned int cpu,
472			    int pkg_flag)
473{
474	struct temp_data *tdata;
475	struct platform_data *pdata = platform_get_drvdata(pdev);
476	struct cpuinfo_x86 *c = &cpu_data(cpu);
477	u32 eax, edx;
478	int err, attr_no;
479
480	/*
481	 * Find attr number for sysfs:
482	 * We map the attr number to core id of the CPU
483	 * The attr number is always core id + 2
484	 * The Pkgtemp will always show up as temp1_*, if available
485	 */
486	attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
487
488	if (attr_no > MAX_CORE_DATA - 1)
489		return -ERANGE;
490
491	/*
492	 * Provide a single set of attributes for all HT siblings of a core
493	 * to avoid duplicate sensors (the processor ID and core ID of all
494	 * HT siblings of a core are the same).
495	 * Skip if a HT sibling of this core is already registered.
496	 * This is not an error.
497	 */
498	if (pdata->core_data[attr_no] != NULL)
499		return 0;
500
501	tdata = init_temp_data(cpu, pkg_flag);
502	if (!tdata)
503		return -ENOMEM;
504
505	/* Test if we can access the status register */
506	err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
507	if (err)
508		goto exit_free;
509
510	/* We can access status register. Get Critical Temperature */
511	tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
512
513	/*
514	 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
515	 * The target temperature is available on older CPUs but not in this
516	 * register. Atoms don't have the register at all.
517	 */
518	if (c->x86_model > 0xe && c->x86_model != 0x1c) {
519		err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
520					&eax, &edx);
521		if (!err) {
522			tdata->ttarget
523			  = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
524			tdata->attr_size++;
525		}
526	}
527
528	pdata->core_data[attr_no] = tdata;
529
530	/* Create sysfs interfaces */
531	err = create_core_attrs(tdata, pdata->hwmon_dev, attr_no);
532	if (err)
533		goto exit_free;
534
535	return 0;
536exit_free:
537	pdata->core_data[attr_no] = NULL;
538	kfree(tdata);
539	return err;
540}
541
542static void coretemp_add_core(unsigned int cpu, int pkg_flag)
543{
544	struct platform_device *pdev = coretemp_get_pdev(cpu);
545	int err;
546
547	if (!pdev)
548		return;
549
550	err = create_core_data(pdev, cpu, pkg_flag);
551	if (err)
552		dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
553}
554
555static void coretemp_remove_core(struct platform_data *pdata,
556				 int indx)
557{
558	struct temp_data *tdata = pdata->core_data[indx];
559
560	/* Remove the sysfs attributes */
561	sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group);
562
563	kfree(pdata->core_data[indx]);
564	pdata->core_data[indx] = NULL;
565}
566
567static int coretemp_probe(struct platform_device *pdev)
568{
569	struct device *dev = &pdev->dev;
570	struct platform_data *pdata;
571
572	/* Initialize the per-package data structures */
573	pdata = devm_kzalloc(dev, sizeof(struct platform_data), GFP_KERNEL);
574	if (!pdata)
575		return -ENOMEM;
576
577	pdata->phys_proc_id = pdev->id;
578	platform_set_drvdata(pdev, pdata);
579
580	pdata->hwmon_dev = devm_hwmon_device_register_with_groups(dev, DRVNAME,
581								  pdata, NULL);
582	return PTR_ERR_OR_ZERO(pdata->hwmon_dev);
583}
584
585static int coretemp_remove(struct platform_device *pdev)
586{
587	struct platform_data *pdata = platform_get_drvdata(pdev);
588	int i;
589
590	for (i = MAX_CORE_DATA - 1; i >= 0; --i)
591		if (pdata->core_data[i])
592			coretemp_remove_core(pdata, i);
593
594	return 0;
595}
596
597static struct platform_driver coretemp_driver = {
598	.driver = {
599		.name = DRVNAME,
600	},
601	.probe = coretemp_probe,
602	.remove = coretemp_remove,
603};
604
605static int coretemp_device_add(unsigned int cpu)
606{
607	int err;
608	struct platform_device *pdev;
609	struct pdev_entry *pdev_entry;
610
611	mutex_lock(&pdev_list_mutex);
612
613	pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
614	if (!pdev) {
615		err = -ENOMEM;
616		pr_err("Device allocation failed\n");
617		goto exit;
618	}
619
620	pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
621	if (!pdev_entry) {
622		err = -ENOMEM;
623		goto exit_device_put;
624	}
625
626	err = platform_device_add(pdev);
627	if (err) {
628		pr_err("Device addition failed (%d)\n", err);
629		goto exit_device_free;
630	}
631
632	pdev_entry->pdev = pdev;
633	pdev_entry->phys_proc_id = pdev->id;
634
635	list_add_tail(&pdev_entry->list, &pdev_list);
636	mutex_unlock(&pdev_list_mutex);
637
638	return 0;
639
640exit_device_free:
641	kfree(pdev_entry);
642exit_device_put:
643	platform_device_put(pdev);
644exit:
645	mutex_unlock(&pdev_list_mutex);
646	return err;
647}
648
649static void coretemp_device_remove(unsigned int cpu)
650{
651	struct pdev_entry *p, *n;
652	u16 phys_proc_id = TO_PHYS_ID(cpu);
653
654	mutex_lock(&pdev_list_mutex);
655	list_for_each_entry_safe(p, n, &pdev_list, list) {
656		if (p->phys_proc_id != phys_proc_id)
657			continue;
658		platform_device_unregister(p->pdev);
659		list_del(&p->list);
660		kfree(p);
661	}
662	mutex_unlock(&pdev_list_mutex);
663}
664
665static bool is_any_core_online(struct platform_data *pdata)
666{
667	int i;
668
669	/* Find online cores, except pkgtemp data */
670	for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
671		if (pdata->core_data[i] &&
672			!pdata->core_data[i]->is_pkg_data) {
673			return true;
674		}
675	}
676	return false;
677}
678
679static void get_core_online(unsigned int cpu)
680{
681	struct cpuinfo_x86 *c = &cpu_data(cpu);
682	struct platform_device *pdev = coretemp_get_pdev(cpu);
683	int err;
684
685	/*
686	 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
687	 * sensors. We check this bit only, all the early CPUs
688	 * without thermal sensors will be filtered out.
689	 */
690	if (!cpu_has(c, X86_FEATURE_DTHERM))
691		return;
692
693	if (!pdev) {
694		/* Check the microcode version of the CPU */
695		if (chk_ucode_version(cpu))
696			return;
697
698		/*
699		 * Alright, we have DTS support.
700		 * We are bringing the _first_ core in this pkg
701		 * online. So, initialize per-pkg data structures and
702		 * then bring this core online.
703		 */
704		err = coretemp_device_add(cpu);
705		if (err)
706			return;
707		/*
708		 * Check whether pkgtemp support is available.
709		 * If so, add interfaces for pkgtemp.
710		 */
711		if (cpu_has(c, X86_FEATURE_PTS))
712			coretemp_add_core(cpu, 1);
713	}
714	/*
715	 * Physical CPU device already exists.
716	 * So, just add interfaces for this core.
717	 */
718	coretemp_add_core(cpu, 0);
719}
720
721static void put_core_offline(unsigned int cpu)
722{
723	int i, indx;
724	struct platform_data *pdata;
725	struct platform_device *pdev = coretemp_get_pdev(cpu);
726
727	/* If the physical CPU device does not exist, just return */
728	if (!pdev)
729		return;
730
731	pdata = platform_get_drvdata(pdev);
732
733	indx = TO_ATTR_NO(cpu);
734
735	/* The core id is too big, just return */
736	if (indx > MAX_CORE_DATA - 1)
737		return;
738
739	if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
740		coretemp_remove_core(pdata, indx);
741
742	/*
743	 * If a HT sibling of a core is taken offline, but another HT sibling
744	 * of the same core is still online, register the alternate sibling.
745	 * This ensures that exactly one set of attributes is provided as long
746	 * as at least one HT sibling of a core is online.
747	 */
748	for_each_sibling(i, cpu) {
749		if (i != cpu) {
750			get_core_online(i);
751			/*
752			 * Display temperature sensor data for one HT sibling
753			 * per core only, so abort the loop after one such
754			 * sibling has been found.
755			 */
756			break;
757		}
758	}
759	/*
760	 * If all cores in this pkg are offline, remove the device.
761	 * coretemp_device_remove calls unregister_platform_device,
762	 * which in turn calls coretemp_remove. This removes the
763	 * pkgtemp entry and does other clean ups.
764	 */
765	if (!is_any_core_online(pdata))
766		coretemp_device_remove(cpu);
767}
768
769static int coretemp_cpu_callback(struct notifier_block *nfb,
770				 unsigned long action, void *hcpu)
771{
772	unsigned int cpu = (unsigned long) hcpu;
773
774	switch (action) {
775	case CPU_ONLINE:
776	case CPU_DOWN_FAILED:
777		get_core_online(cpu);
778		break;
779	case CPU_DOWN_PREPARE:
780		put_core_offline(cpu);
781		break;
782	}
783	return NOTIFY_OK;
784}
785
786static struct notifier_block coretemp_cpu_notifier __refdata = {
787	.notifier_call = coretemp_cpu_callback,
788};
789
790static const struct x86_cpu_id __initconst coretemp_ids[] = {
791	{ X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTHERM },
792	{}
793};
794MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
795
796static int __init coretemp_init(void)
797{
798	int i, err;
799
800	/*
801	 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
802	 * sensors. We check this bit only, all the early CPUs
803	 * without thermal sensors will be filtered out.
804	 */
805	if (!x86_match_cpu(coretemp_ids))
806		return -ENODEV;
807
808	err = platform_driver_register(&coretemp_driver);
809	if (err)
810		goto exit;
811
812	cpu_notifier_register_begin();
813	for_each_online_cpu(i)
814		get_core_online(i);
815
816#ifndef CONFIG_HOTPLUG_CPU
817	if (list_empty(&pdev_list)) {
818		cpu_notifier_register_done();
819		err = -ENODEV;
820		goto exit_driver_unreg;
821	}
822#endif
823
824	__register_hotcpu_notifier(&coretemp_cpu_notifier);
825	cpu_notifier_register_done();
826	return 0;
827
828#ifndef CONFIG_HOTPLUG_CPU
829exit_driver_unreg:
830	platform_driver_unregister(&coretemp_driver);
831#endif
832exit:
833	return err;
834}
835
836static void __exit coretemp_exit(void)
837{
838	struct pdev_entry *p, *n;
839
840	cpu_notifier_register_begin();
841	__unregister_hotcpu_notifier(&coretemp_cpu_notifier);
842	mutex_lock(&pdev_list_mutex);
843	list_for_each_entry_safe(p, n, &pdev_list, list) {
844		platform_device_unregister(p->pdev);
845		list_del(&p->list);
846		kfree(p);
847	}
848	mutex_unlock(&pdev_list_mutex);
849	cpu_notifier_register_done();
850	platform_driver_unregister(&coretemp_driver);
851}
852
853MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
854MODULE_DESCRIPTION("Intel Core temperature monitor");
855MODULE_LICENSE("GPL");
856
857module_init(coretemp_init)
858module_exit(coretemp_exit)
859