1#ifndef __NV40_GR_H__ 2#define __NV40_GR_H__ 3#define nv40_gr(p) container_of((p), struct nv40_gr, base) 4#include "priv.h" 5 6struct nv40_gr { 7 struct nvkm_gr base; 8 u32 size; 9 struct list_head chan; 10}; 11 12int nv40_gr_new_(const struct nvkm_gr_func *, struct nvkm_device *, int index, 13 struct nvkm_gr **); 14int nv40_gr_init(struct nvkm_gr *); 15void nv40_gr_intr(struct nvkm_gr *); 16u64 nv40_gr_units(struct nvkm_gr *); 17 18#define nv40_gr_chan(p) container_of((p), struct nv40_gr_chan, object) 19 20struct nv40_gr_chan { 21 struct nvkm_object object; 22 struct nv40_gr *gr; 23 struct nvkm_fifo_chan *fifo; 24 u32 inst; 25 struct list_head head; 26}; 27 28int nv40_gr_chan_new(struct nvkm_gr *, struct nvkm_fifo_chan *, 29 const struct nvkm_oclass *, struct nvkm_object **); 30 31extern const struct nvkm_object_func nv40_gr_object; 32 33/* returns 1 if device is one of the nv4x using the 0x4497 object class, 34 * helpful to determine a number of other hardware features 35 */ 36static inline int 37nv44_gr_class(struct nvkm_device *device) 38{ 39 if ((device->chipset & 0xf0) == 0x60) 40 return 1; 41 42 return !(0x0aaf & (1 << (device->chipset & 0x0f))); 43} 44 45int nv40_grctx_init(struct nvkm_device *, u32 *size); 46void nv40_grctx_fill(struct nvkm_device *, struct nvkm_gpuobj *); 47#endif 48