1#ifndef __MACH_IMX_CLK_H
2#define __MACH_IMX_CLK_H
3
4#include <linux/spinlock.h>
5#include <linux/clk-provider.h>
6
7extern spinlock_t imx_ccm_lock;
8
9void imx_check_clocks(struct clk *clks[], unsigned int count);
10void imx_register_uart_clocks(struct clk ** const clks[]);
11
12extern void imx_cscmr1_fixup(u32 *val);
13
14enum imx_pllv1_type {
15	IMX_PLLV1_IMX1,
16	IMX_PLLV1_IMX21,
17	IMX_PLLV1_IMX25,
18	IMX_PLLV1_IMX27,
19	IMX_PLLV1_IMX31,
20	IMX_PLLV1_IMX35,
21};
22
23struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name,
24		const char *parent, void __iomem *base);
25
26struct clk *imx_clk_pllv2(const char *name, const char *parent,
27		void __iomem *base);
28
29enum imx_pllv3_type {
30	IMX_PLLV3_GENERIC,
31	IMX_PLLV3_SYS,
32	IMX_PLLV3_USB,
33	IMX_PLLV3_USB_VF610,
34	IMX_PLLV3_AV,
35	IMX_PLLV3_ENET,
36	IMX_PLLV3_ENET_IMX7,
37};
38
39struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
40		const char *parent_name, void __iomem *base, u32 div_mask);
41
42struct clk *clk_register_gate2(struct device *dev, const char *name,
43		const char *parent_name, unsigned long flags,
44		void __iomem *reg, u8 bit_idx,
45		u8 clk_gate_flags, spinlock_t *lock,
46		unsigned int *share_count);
47
48struct clk * imx_obtain_fixed_clock(
49			const char *name, unsigned long rate);
50
51struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
52	 void __iomem *reg, u8 shift, u32 exclusive_mask);
53
54static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
55		void __iomem *reg, u8 shift)
56{
57	return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
58			shift, 0, &imx_ccm_lock, NULL);
59}
60
61static inline struct clk *imx_clk_gate2_shared(const char *name,
62		const char *parent, void __iomem *reg, u8 shift,
63		unsigned int *share_count)
64{
65	return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
66			shift, 0, &imx_ccm_lock, share_count);
67}
68
69struct clk *imx_clk_pfd(const char *name, const char *parent_name,
70		void __iomem *reg, u8 idx);
71
72struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
73				 void __iomem *reg, u8 shift, u8 width,
74				 void __iomem *busy_reg, u8 busy_shift);
75
76struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
77			     u8 width, void __iomem *busy_reg, u8 busy_shift,
78			     const char **parent_names, int num_parents);
79
80struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
81				  void __iomem *reg, u8 shift, u8 width,
82				  void (*fixup)(u32 *val));
83
84struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
85			      u8 shift, u8 width, const char **parents,
86			      int num_parents, void (*fixup)(u32 *val));
87
88static inline struct clk *imx_clk_fixed(const char *name, int rate)
89{
90	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
91}
92
93static inline struct clk *imx_clk_divider(const char *name, const char *parent,
94		void __iomem *reg, u8 shift, u8 width)
95{
96	return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
97			reg, shift, width, 0, &imx_ccm_lock);
98}
99
100static inline struct clk *imx_clk_divider_flags(const char *name,
101		const char *parent, void __iomem *reg, u8 shift, u8 width,
102		unsigned long flags)
103{
104	return clk_register_divider(NULL, name, parent, flags,
105			reg, shift, width, 0, &imx_ccm_lock);
106}
107
108static inline struct clk *imx_clk_gate(const char *name, const char *parent,
109		void __iomem *reg, u8 shift)
110{
111	return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
112			shift, 0, &imx_ccm_lock);
113}
114
115static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
116		void __iomem *reg, u8 shift)
117{
118	return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
119			shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
120}
121
122static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
123		u8 shift, u8 width, const char **parents, int num_parents)
124{
125	return clk_register_mux(NULL, name, parents, num_parents,
126			CLK_SET_RATE_NO_REPARENT, reg, shift,
127			width, 0, &imx_ccm_lock);
128}
129
130static inline struct clk *imx_clk_mux_flags(const char *name,
131		void __iomem *reg, u8 shift, u8 width, const char **parents,
132		int num_parents, unsigned long flags)
133{
134	return clk_register_mux(NULL, name, parents, num_parents,
135			flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
136			&imx_ccm_lock);
137}
138
139static inline struct clk *imx_clk_fixed_factor(const char *name,
140		const char *parent, unsigned int mult, unsigned int div)
141{
142	return clk_register_fixed_factor(NULL, name, parent,
143			CLK_SET_RATE_PARENT, mult, div);
144}
145
146struct clk *imx_clk_cpu(const char *name, const char *parent_name,
147		struct clk *div, struct clk *mux, struct clk *pll,
148		struct clk *step);
149
150#endif
151