1/* 2 * Common header for the legacy SH DMA driver and the new dmaengine driver 3 * 4 * extracted from arch/sh/include/asm/dma-sh.h: 5 * 6 * Copyright (C) 2000 Takashi YOSHII 7 * Copyright (C) 2003 Paul Mundt 8 * 9 * This file is subject to the terms and conditions of the GNU General Public 10 * License. See the file "COPYING" in the main directory of this archive 11 * for more details. 12 */ 13#ifndef DMA_REGISTER_H 14#define DMA_REGISTER_H 15 16/* DMA registers */ 17#define SAR 0x00 /* Source Address Register */ 18#define DAR 0x04 /* Destination Address Register */ 19#define TCR 0x08 /* Transfer Count Register */ 20#define CHCR 0x0C /* Channel Control Register */ 21#define DMAOR 0x40 /* DMA Operation Register */ 22 23/* DMAOR definitions */ 24#define DMAOR_AE 0x00000004 /* Address Error Flag */ 25#define DMAOR_NMIF 0x00000002 26#define DMAOR_DME 0x00000001 /* DMA Master Enable */ 27 28/* Definitions for the SuperH DMAC */ 29#define REQ_L 0x00000000 30#define REQ_E 0x00080000 31#define RACK_H 0x00000000 32#define RACK_L 0x00040000 33#define ACK_R 0x00000000 34#define ACK_W 0x00020000 35#define ACK_H 0x00000000 36#define ACK_L 0x00010000 37#define DM_INC 0x00004000 /* Destination addresses are incremented */ 38#define DM_DEC 0x00008000 /* Destination addresses are decremented */ 39#define DM_FIX 0x0000c000 /* Destination address is fixed */ 40#define SM_INC 0x00001000 /* Source addresses are incremented */ 41#define SM_DEC 0x00002000 /* Source addresses are decremented */ 42#define SM_FIX 0x00003000 /* Source address is fixed */ 43#define RS_IN 0x00000200 44#define RS_OUT 0x00000300 45#define RS_AUTO 0x00000400 /* Auto Request */ 46#define RS_ERS 0x00000800 /* DMA extended resource selector */ 47#define TS_BLK 0x00000040 48#define TM_BUR 0x00000020 49#define CHCR_DE 0x00000001 /* DMA Enable */ 50#define CHCR_TE 0x00000002 /* Transfer End Flag */ 51#define CHCR_IE 0x00000004 /* Interrupt Enable */ 52 53#endif 54