1/* 2 * Adding PCI-E MSI support for PPC4XX SoCs. 3 * 4 * Copyright (c) 2010, Applied Micro Circuits Corporation 5 * Authors: Tirumala R Marri <tmarri@apm.com> 6 * Feng Kan <fkan@apm.com> 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24#include <linux/irq.h> 25#include <linux/pci.h> 26#include <linux/msi.h> 27#include <linux/of_platform.h> 28#include <linux/interrupt.h> 29#include <linux/export.h> 30#include <linux/kernel.h> 31#include <asm/prom.h> 32#include <asm/hw_irq.h> 33#include <asm/ppc-pci.h> 34#include <asm/dcr.h> 35#include <asm/dcr-regs.h> 36#include <asm/msi_bitmap.h> 37 38#define PEIH_TERMADH 0x00 39#define PEIH_TERMADL 0x08 40#define PEIH_MSIED 0x10 41#define PEIH_MSIMK 0x18 42#define PEIH_MSIASS 0x20 43#define PEIH_FLUSH0 0x30 44#define PEIH_FLUSH1 0x38 45#define PEIH_CNTRST 0x48 46 47static int msi_irqs; 48 49struct ppc4xx_msi { 50 u32 msi_addr_lo; 51 u32 msi_addr_hi; 52 void __iomem *msi_regs; 53 int *msi_virqs; 54 struct msi_bitmap bitmap; 55 struct device_node *msi_dev; 56}; 57 58static struct ppc4xx_msi ppc4xx_msi; 59 60static int ppc4xx_msi_init_allocator(struct platform_device *dev, 61 struct ppc4xx_msi *msi_data) 62{ 63 int err; 64 65 err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs, 66 dev->dev.of_node); 67 if (err) 68 return err; 69 70 err = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap); 71 if (err < 0) { 72 msi_bitmap_free(&msi_data->bitmap); 73 return err; 74 } 75 76 return 0; 77} 78 79static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) 80{ 81 int int_no = -ENOMEM; 82 unsigned int virq; 83 struct msi_msg msg; 84 struct msi_desc *entry; 85 struct ppc4xx_msi *msi_data = &ppc4xx_msi; 86 87 dev_dbg(&dev->dev, "PCIE-MSI:%s called. vec %x type %d\n", 88 __func__, nvec, type); 89 if (type == PCI_CAP_ID_MSIX) 90 pr_debug("ppc4xx msi: MSI-X untested, trying anyway.\n"); 91 92 msi_data->msi_virqs = kmalloc((msi_irqs) * sizeof(int), GFP_KERNEL); 93 if (!msi_data->msi_virqs) 94 return -ENOMEM; 95 96 for_each_pci_msi_entry(entry, dev) { 97 int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1); 98 if (int_no >= 0) 99 break; 100 if (int_no < 0) { 101 pr_debug("%s: fail allocating msi interrupt\n", 102 __func__); 103 } 104 virq = irq_of_parse_and_map(msi_data->msi_dev, int_no); 105 if (virq == NO_IRQ) { 106 dev_err(&dev->dev, "%s: fail mapping irq\n", __func__); 107 msi_bitmap_free_hwirqs(&msi_data->bitmap, int_no, 1); 108 return -ENOSPC; 109 } 110 dev_dbg(&dev->dev, "%s: virq = %d\n", __func__, virq); 111 112 /* Setup msi address space */ 113 msg.address_hi = msi_data->msi_addr_hi; 114 msg.address_lo = msi_data->msi_addr_lo; 115 116 irq_set_msi_desc(virq, entry); 117 msg.data = int_no; 118 pci_write_msi_msg(virq, &msg); 119 } 120 return 0; 121} 122 123void ppc4xx_teardown_msi_irqs(struct pci_dev *dev) 124{ 125 struct msi_desc *entry; 126 struct ppc4xx_msi *msi_data = &ppc4xx_msi; 127 irq_hw_number_t hwirq; 128 129 dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n"); 130 131 for_each_pci_msi_entry(entry, dev) { 132 if (entry->irq == NO_IRQ) 133 continue; 134 hwirq = virq_to_hw(entry->irq); 135 irq_set_msi_desc(entry->irq, NULL); 136 irq_dispose_mapping(entry->irq); 137 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1); 138 } 139} 140 141static int ppc4xx_setup_pcieh_hw(struct platform_device *dev, 142 struct resource res, struct ppc4xx_msi *msi) 143{ 144 const u32 *msi_data; 145 const u32 *msi_mask; 146 const u32 *sdr_addr; 147 dma_addr_t msi_phys; 148 void *msi_virt; 149 150 sdr_addr = of_get_property(dev->dev.of_node, "sdr-base", NULL); 151 if (!sdr_addr) 152 return -1; 153 154 mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */ 155 mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */ 156 157 msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi"); 158 if (!msi->msi_dev) 159 return -ENODEV; 160 161 msi->msi_regs = of_iomap(msi->msi_dev, 0); 162 if (!msi->msi_regs) { 163 dev_err(&dev->dev, "of_iomap problem failed\n"); 164 return -ENOMEM; 165 } 166 dev_dbg(&dev->dev, "PCIE-MSI: msi register mapped 0x%x 0x%x\n", 167 (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs)); 168 169 msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL); 170 if (!msi_virt) 171 return -ENOMEM; 172 msi->msi_addr_hi = upper_32_bits(msi_phys); 173 msi->msi_addr_lo = lower_32_bits(msi_phys & 0xffffffff); 174 dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n", 175 msi->msi_addr_hi, msi->msi_addr_lo); 176 177 /* Progam the Interrupt handler Termination addr registers */ 178 out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi); 179 out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo); 180 181 msi_data = of_get_property(dev->dev.of_node, "msi-data", NULL); 182 if (!msi_data) 183 return -1; 184 msi_mask = of_get_property(dev->dev.of_node, "msi-mask", NULL); 185 if (!msi_mask) 186 return -1; 187 /* Program MSI Expected data and Mask bits */ 188 out_be32(msi->msi_regs + PEIH_MSIED, *msi_data); 189 out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask); 190 191 dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys); 192 193 return 0; 194} 195 196static int ppc4xx_of_msi_remove(struct platform_device *dev) 197{ 198 struct ppc4xx_msi *msi = dev->dev.platform_data; 199 int i; 200 int virq; 201 202 for (i = 0; i < msi_irqs; i++) { 203 virq = msi->msi_virqs[i]; 204 if (virq != NO_IRQ) 205 irq_dispose_mapping(virq); 206 } 207 208 if (msi->bitmap.bitmap) 209 msi_bitmap_free(&msi->bitmap); 210 iounmap(msi->msi_regs); 211 of_node_put(msi->msi_dev); 212 kfree(msi); 213 214 return 0; 215} 216 217static int ppc4xx_msi_probe(struct platform_device *dev) 218{ 219 struct ppc4xx_msi *msi; 220 struct resource res; 221 int err = 0; 222 struct pci_controller *phb; 223 224 dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n"); 225 226 msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL); 227 if (!msi) { 228 dev_err(&dev->dev, "No memory for MSI structure\n"); 229 return -ENOMEM; 230 } 231 dev->dev.platform_data = msi; 232 233 /* Get MSI ranges */ 234 err = of_address_to_resource(dev->dev.of_node, 0, &res); 235 if (err) { 236 dev_err(&dev->dev, "%s resource error!\n", 237 dev->dev.of_node->full_name); 238 goto error_out; 239 } 240 241 msi_irqs = of_irq_count(dev->dev.of_node); 242 if (!msi_irqs) 243 return -ENODEV; 244 245 if (ppc4xx_setup_pcieh_hw(dev, res, msi)) 246 goto error_out; 247 248 err = ppc4xx_msi_init_allocator(dev, msi); 249 if (err) { 250 dev_err(&dev->dev, "Error allocating MSI bitmap\n"); 251 goto error_out; 252 } 253 ppc4xx_msi = *msi; 254 255 list_for_each_entry(phb, &hose_list, list_node) { 256 phb->controller_ops.setup_msi_irqs = ppc4xx_setup_msi_irqs; 257 phb->controller_ops.teardown_msi_irqs = ppc4xx_teardown_msi_irqs; 258 } 259 return err; 260 261error_out: 262 ppc4xx_of_msi_remove(dev); 263 return err; 264} 265static const struct of_device_id ppc4xx_msi_ids[] = { 266 { 267 .compatible = "amcc,ppc4xx-msi", 268 }, 269 {} 270}; 271static struct platform_driver ppc4xx_msi_driver = { 272 .probe = ppc4xx_msi_probe, 273 .remove = ppc4xx_of_msi_remove, 274 .driver = { 275 .name = "ppc4xx-msi", 276 .of_match_table = ppc4xx_msi_ids, 277 }, 278 279}; 280 281static __init int ppc4xx_msi_init(void) 282{ 283 return platform_driver_register(&ppc4xx_msi_driver); 284} 285 286subsys_initcall(ppc4xx_msi_init); 287