1/*
2 * smp.h: PowerPC-specific SMP code.
3 *
4 * Original was a copy of sparc smp.h.  Now heavily modified
5 * for PPC.
6 *
7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#ifndef _ASM_POWERPC_SMP_H
17#define _ASM_POWERPC_SMP_H
18#ifdef __KERNEL__
19
20#include <linux/threads.h>
21#include <linux/cpumask.h>
22#include <linux/kernel.h>
23#include <linux/irqreturn.h>
24
25#ifndef __ASSEMBLY__
26
27#ifdef CONFIG_PPC64
28#include <asm/paca.h>
29#endif
30#include <asm/percpu.h>
31
32extern int boot_cpuid;
33extern int spinning_secondaries;
34
35extern void cpu_die(void);
36extern int cpu_to_chip_id(int cpu);
37
38#ifdef CONFIG_SMP
39
40struct smp_ops_t {
41	void  (*message_pass)(int cpu, int msg);
42#ifdef CONFIG_PPC_SMP_MUXED_IPI
43	void  (*cause_ipi)(int cpu, unsigned long data);
44#endif
45	void  (*probe)(void);
46	int   (*kick_cpu)(int nr);
47	void  (*setup_cpu)(int nr);
48	void  (*bringup_done)(void);
49	void  (*take_timebase)(void);
50	void  (*give_timebase)(void);
51	int   (*cpu_disable)(void);
52	void  (*cpu_die)(unsigned int nr);
53	int   (*cpu_bootable)(unsigned int nr);
54};
55
56extern void smp_send_debugger_break(void);
57extern void start_secondary_resume(void);
58extern void smp_generic_give_timebase(void);
59extern void smp_generic_take_timebase(void);
60
61DECLARE_PER_CPU(unsigned int, cpu_pvr);
62
63#ifdef CONFIG_HOTPLUG_CPU
64extern void migrate_irqs(void);
65int generic_cpu_disable(void);
66void generic_cpu_die(unsigned int cpu);
67void generic_set_cpu_dead(unsigned int cpu);
68void generic_set_cpu_up(unsigned int cpu);
69int generic_check_cpu_restart(unsigned int cpu);
70#endif
71
72#ifdef CONFIG_PPC64
73#define raw_smp_processor_id()	(local_paca->paca_index)
74#define hard_smp_processor_id() (get_paca()->hw_cpu_id)
75#else
76/* 32-bit */
77extern int smp_hw_index[];
78
79#define raw_smp_processor_id()	(current_thread_info()->cpu)
80#define hard_smp_processor_id() 	(smp_hw_index[smp_processor_id()])
81
82static inline int get_hard_smp_processor_id(int cpu)
83{
84	return smp_hw_index[cpu];
85}
86
87static inline void set_hard_smp_processor_id(int cpu, int phys)
88{
89	smp_hw_index[cpu] = phys;
90}
91#endif
92
93DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
94DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
95
96static inline struct cpumask *cpu_sibling_mask(int cpu)
97{
98	return per_cpu(cpu_sibling_map, cpu);
99}
100
101static inline struct cpumask *cpu_core_mask(int cpu)
102{
103	return per_cpu(cpu_core_map, cpu);
104}
105
106extern int cpu_to_core_id(int cpu);
107
108/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
109 *
110 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
111 * in /proc/interrupts will be wrong!!! --Troy */
112#define PPC_MSG_CALL_FUNCTION   0
113#define PPC_MSG_RESCHEDULE      1
114#define PPC_MSG_TICK_BROADCAST	2
115#define PPC_MSG_DEBUGGER_BREAK  3
116
117/* for irq controllers that have dedicated ipis per message (4) */
118extern int smp_request_message_ipi(int virq, int message);
119extern const char *smp_ipi_name[];
120
121/* for irq controllers with only a single ipi */
122extern void smp_muxed_ipi_set_data(int cpu, unsigned long data);
123extern void smp_muxed_ipi_message_pass(int cpu, int msg);
124extern irqreturn_t smp_ipi_demux(void);
125
126void smp_init_pSeries(void);
127void smp_init_cell(void);
128void smp_setup_cpu_maps(void);
129
130extern int __cpu_disable(void);
131extern void __cpu_die(unsigned int cpu);
132
133#else
134/* for UP */
135#define hard_smp_processor_id()		get_hard_smp_processor_id(0)
136#define smp_setup_cpu_maps()
137static inline void inhibit_secondary_onlining(void) {}
138static inline void uninhibit_secondary_onlining(void) {}
139static inline const struct cpumask *cpu_sibling_mask(int cpu)
140{
141	return cpumask_of(cpu);
142}
143
144#endif /* CONFIG_SMP */
145
146#ifdef CONFIG_PPC64
147static inline int get_hard_smp_processor_id(int cpu)
148{
149	return paca[cpu].hw_cpu_id;
150}
151
152static inline void set_hard_smp_processor_id(int cpu, int phys)
153{
154	paca[cpu].hw_cpu_id = phys;
155}
156
157extern void smp_release_cpus(void);
158
159#else
160/* 32-bit */
161#ifndef CONFIG_SMP
162extern int boot_cpuid_phys;
163static inline int get_hard_smp_processor_id(int cpu)
164{
165	return boot_cpuid_phys;
166}
167
168static inline void set_hard_smp_processor_id(int cpu, int phys)
169{
170	boot_cpuid_phys = phys;
171}
172#endif /* !CONFIG_SMP */
173#endif /* !CONFIG_PPC64 */
174
175extern int smt_enabled_at_boot;
176
177extern void smp_mpic_probe(void);
178extern void smp_mpic_setup_cpu(int cpu);
179extern int smp_generic_kick_cpu(int nr);
180extern int smp_generic_cpu_bootable(unsigned int nr);
181
182
183extern void smp_generic_give_timebase(void);
184extern void smp_generic_take_timebase(void);
185
186extern struct smp_ops_t *smp_ops;
187
188extern void arch_send_call_function_single_ipi(int cpu);
189extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
190
191/* Definitions relative to the secondary CPU spin loop
192 * and entry point. Not all of them exist on both 32 and
193 * 64-bit but defining them all here doesn't harm
194 */
195extern void generic_secondary_smp_init(void);
196extern void generic_secondary_thread_init(void);
197extern unsigned long __secondary_hold_spinloop;
198extern unsigned long __secondary_hold_acknowledge;
199extern char __secondary_hold;
200
201extern void __early_start(void);
202#endif /* __ASSEMBLY__ */
203
204#endif /* __KERNEL__ */
205#endif /* _ASM_POWERPC_SMP_H) */
206