1/*
2 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
3 * Copyright (C) 2009 Wind River Systems Inc
4 *
5 * This file is subject to the terms and conditions of the GNU General
6 * Public License.  See the file COPYING in the main directory of this
7 * archive for more details.
8 */
9
10#ifndef _ASM_NIOS2_DMA_MAPPING_H
11#define _ASM_NIOS2_DMA_MAPPING_H
12
13#include <linux/scatterlist.h>
14#include <linux/cache.h>
15#include <asm/cacheflush.h>
16
17static inline void __dma_sync_for_device(void *vaddr, size_t size,
18			      enum dma_data_direction direction)
19{
20	switch (direction) {
21	case DMA_FROM_DEVICE:
22		invalidate_dcache_range((unsigned long)vaddr,
23			(unsigned long)(vaddr + size));
24		break;
25	case DMA_TO_DEVICE:
26		/*
27		 * We just need to flush the caches here , but Nios2 flush
28		 * instruction will do both writeback and invalidate.
29		 */
30	case DMA_BIDIRECTIONAL: /* flush and invalidate */
31		flush_dcache_range((unsigned long)vaddr,
32			(unsigned long)(vaddr + size));
33		break;
34	default:
35		BUG();
36	}
37}
38
39static inline void __dma_sync_for_cpu(void *vaddr, size_t size,
40			      enum dma_data_direction direction)
41{
42	switch (direction) {
43	case DMA_BIDIRECTIONAL:
44	case DMA_FROM_DEVICE:
45		invalidate_dcache_range((unsigned long)vaddr,
46			(unsigned long)(vaddr + size));
47		break;
48	case DMA_TO_DEVICE:
49		break;
50	default:
51		BUG();
52	}
53}
54
55#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
56#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
57
58void *dma_alloc_coherent(struct device *dev, size_t size,
59			   dma_addr_t *dma_handle, gfp_t flag);
60
61void dma_free_coherent(struct device *dev, size_t size,
62			 void *vaddr, dma_addr_t dma_handle);
63
64static inline dma_addr_t dma_map_single(struct device *dev, void *ptr,
65					size_t size,
66					enum dma_data_direction direction)
67{
68	BUG_ON(!valid_dma_direction(direction));
69	__dma_sync_for_device(ptr, size, direction);
70	return virt_to_phys(ptr);
71}
72
73static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
74				size_t size, enum dma_data_direction direction)
75{
76}
77
78extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
79	enum dma_data_direction direction);
80extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
81	unsigned long offset, size_t size, enum dma_data_direction direction);
82extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
83	size_t size, enum dma_data_direction direction);
84extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
85	int nhwentries, enum dma_data_direction direction);
86extern void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
87	size_t size, enum dma_data_direction direction);
88extern void dma_sync_single_for_device(struct device *dev,
89	dma_addr_t dma_handle, size_t size, enum dma_data_direction direction);
90extern void dma_sync_single_range_for_cpu(struct device *dev,
91	dma_addr_t dma_handle, unsigned long offset, size_t size,
92	enum dma_data_direction direction);
93extern void dma_sync_single_range_for_device(struct device *dev,
94	dma_addr_t dma_handle, unsigned long offset, size_t size,
95	enum dma_data_direction direction);
96extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
97	int nelems, enum dma_data_direction direction);
98extern void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
99	int nelems, enum dma_data_direction direction);
100
101static inline int dma_supported(struct device *dev, u64 mask)
102{
103	return 1;
104}
105
106static inline int dma_set_mask(struct device *dev, u64 mask)
107{
108	if (!dev->dma_mask || !dma_supported(dev, mask))
109		return -EIO;
110
111	*dev->dma_mask = mask;
112
113	return 0;
114}
115
116static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
117{
118	return 0;
119}
120
121/*
122* dma_alloc_noncoherent() returns non-cacheable memory, so there's no need to
123* do any flushing here.
124*/
125static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
126				  enum dma_data_direction direction)
127{
128}
129
130/* drivers/base/dma-mapping.c */
131extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
132		void *cpu_addr, dma_addr_t dma_addr, size_t size);
133extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
134		void *cpu_addr, dma_addr_t dma_addr,
135		size_t size);
136
137#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
138#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
139
140#endif /* _ASM_NIOS2_DMA_MAPPING_H */
141