1/* 2 * Copyright (c) 2003-2012 Broadcom Corporation 3 * All Rights Reserved 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the Broadcom 9 * license below: 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in 19 * the documentation and/or other materials provided with the 20 * distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35#include <asm/cpu-info.h> 36#include <linux/irq.h> 37#include <linux/interrupt.h> 38 39#include <asm/cpu.h> 40#include <asm/mipsregs.h> 41#include <asm/netlogic/xlr/fmn.h> 42#include <asm/netlogic/xlr/xlr.h> 43#include <asm/netlogic/common.h> 44#include <asm/netlogic/haldefs.h> 45 46struct xlr_board_fmn_config xlr_board_fmn_config; 47 48static void __maybe_unused print_credit_config(struct xlr_fmn_info *fmn_info) 49{ 50 int bkt; 51 52 pr_info("Bucket size :\n"); 53 pr_info("Station\t: Size\n"); 54 for (bkt = 0; bkt < 16; bkt++) 55 pr_info(" %d %d %d %d %d %d %d %d\n", 56 xlr_board_fmn_config.bucket_size[(bkt * 8) + 0], 57 xlr_board_fmn_config.bucket_size[(bkt * 8) + 1], 58 xlr_board_fmn_config.bucket_size[(bkt * 8) + 2], 59 xlr_board_fmn_config.bucket_size[(bkt * 8) + 3], 60 xlr_board_fmn_config.bucket_size[(bkt * 8) + 4], 61 xlr_board_fmn_config.bucket_size[(bkt * 8) + 5], 62 xlr_board_fmn_config.bucket_size[(bkt * 8) + 6], 63 xlr_board_fmn_config.bucket_size[(bkt * 8) + 7]); 64 pr_info("\n"); 65 66 pr_info("Credits distribution :\n"); 67 pr_info("Station\t: Size\n"); 68 for (bkt = 0; bkt < 16; bkt++) 69 pr_info(" %d %d %d %d %d %d %d %d\n", 70 fmn_info->credit_config[(bkt * 8) + 0], 71 fmn_info->credit_config[(bkt * 8) + 1], 72 fmn_info->credit_config[(bkt * 8) + 2], 73 fmn_info->credit_config[(bkt * 8) + 3], 74 fmn_info->credit_config[(bkt * 8) + 4], 75 fmn_info->credit_config[(bkt * 8) + 5], 76 fmn_info->credit_config[(bkt * 8) + 6], 77 fmn_info->credit_config[(bkt * 8) + 7]); 78 pr_info("\n"); 79} 80 81static void check_credit_distribution(void) 82{ 83 struct xlr_board_fmn_config *cfg = &xlr_board_fmn_config; 84 int bkt, n, total_credits, ncores; 85 86 ncores = hweight32(nlm_current_node()->coremask); 87 for (bkt = 0; bkt < 128; bkt++) { 88 total_credits = 0; 89 for (n = 0; n < ncores; n++) 90 total_credits += cfg->cpu[n].credit_config[bkt]; 91 total_credits += cfg->gmac[0].credit_config[bkt]; 92 total_credits += cfg->gmac[1].credit_config[bkt]; 93 total_credits += cfg->dma.credit_config[bkt]; 94 total_credits += cfg->cmp.credit_config[bkt]; 95 total_credits += cfg->sae.credit_config[bkt]; 96 total_credits += cfg->xgmac[0].credit_config[bkt]; 97 total_credits += cfg->xgmac[1].credit_config[bkt]; 98 if (total_credits > cfg->bucket_size[bkt]) 99 pr_err("ERROR: Bucket %d: credits (%d) > size (%d)\n", 100 bkt, total_credits, cfg->bucket_size[bkt]); 101 } 102 pr_info("Credit distribution complete.\n"); 103} 104 105/** 106 * Configure bucket size and credits for a device. 'size' is the size of 107 * the buckets for the device. This size is distributed among all the CPUs 108 * so that all of them can send messages to the device. 109 * 110 * The device is also given 'cpu_credits' to send messages to the CPUs 111 * 112 * @dev_info: FMN information structure for each devices 113 * @start_stn_id: Starting station id of dev_info 114 * @end_stn_id: End station id of dev_info 115 * @num_buckets: Total number of buckets for den_info 116 * @cpu_credits: Allowed credits to cpu for each devices pointing by dev_info 117 * @size: Size of the each buckets in the device station 118 */ 119static void setup_fmn_cc(struct xlr_fmn_info *dev_info, int start_stn_id, 120 int end_stn_id, int num_buckets, int cpu_credits, int size) 121{ 122 int i, j, num_core, n, credits_per_cpu; 123 struct xlr_fmn_info *cpu = xlr_board_fmn_config.cpu; 124 125 num_core = hweight32(nlm_current_node()->coremask); 126 dev_info->num_buckets = num_buckets; 127 dev_info->start_stn_id = start_stn_id; 128 dev_info->end_stn_id = end_stn_id; 129 130 n = num_core; 131 if (num_core == 3) 132 n = 4; 133 134 for (i = start_stn_id; i <= end_stn_id; i++) { 135 xlr_board_fmn_config.bucket_size[i] = size; 136 137 /* Dividing device credits equally to cpus */ 138 credits_per_cpu = size / n; 139 for (j = 0; j < num_core; j++) 140 cpu[j].credit_config[i] = credits_per_cpu; 141 142 /* credits left to distribute */ 143 credits_per_cpu = size - (credits_per_cpu * num_core); 144 145 /* distribute the remaining credits (if any), among cores */ 146 for (j = 0; (j < num_core) && (credits_per_cpu >= 4); j++) { 147 cpu[j].credit_config[i] += 4; 148 credits_per_cpu -= 4; 149 } 150 } 151 152 /* Distributing cpu per bucket credits to devices */ 153 for (i = 0; i < num_core; i++) { 154 for (j = 0; j < FMN_CORE_NBUCKETS; j++) 155 dev_info->credit_config[(i * 8) + j] = cpu_credits; 156 } 157} 158 159/* 160 * Each core has 256 slots and 8 buckets, 161 * Configure the 8 buckets each with 32 slots 162 */ 163static void setup_cpu_fmninfo(struct xlr_fmn_info *cpu, int num_core) 164{ 165 int i, j; 166 167 for (i = 0; i < num_core; i++) { 168 cpu[i].start_stn_id = (8 * i); 169 cpu[i].end_stn_id = (8 * i + 8); 170 171 for (j = cpu[i].start_stn_id; j < cpu[i].end_stn_id; j++) 172 xlr_board_fmn_config.bucket_size[j] = 32; 173 } 174} 175 176/** 177 * Setup the FMN details for each devices according to the device available 178 * in each variant of XLR/XLS processor 179 */ 180void xlr_board_info_setup(void) 181{ 182 struct xlr_fmn_info *cpu = xlr_board_fmn_config.cpu; 183 struct xlr_fmn_info *gmac = xlr_board_fmn_config.gmac; 184 struct xlr_fmn_info *xgmac = xlr_board_fmn_config.xgmac; 185 struct xlr_fmn_info *dma = &xlr_board_fmn_config.dma; 186 struct xlr_fmn_info *cmp = &xlr_board_fmn_config.cmp; 187 struct xlr_fmn_info *sae = &xlr_board_fmn_config.sae; 188 int processor_id, num_core; 189 190 num_core = hweight32(nlm_current_node()->coremask); 191 processor_id = read_c0_prid() & PRID_IMP_MASK; 192 193 setup_cpu_fmninfo(cpu, num_core); 194 switch (processor_id) { 195 case PRID_IMP_NETLOGIC_XLS104: 196 case PRID_IMP_NETLOGIC_XLS108: 197 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, 198 FMN_STNID_GMAC0_TX3, 8, 16, 32); 199 setup_fmn_cc(dma, FMN_STNID_DMA_0, 200 FMN_STNID_DMA_3, 4, 8, 64); 201 setup_fmn_cc(sae, FMN_STNID_SEC0, 202 FMN_STNID_SEC1, 2, 8, 128); 203 break; 204 205 case PRID_IMP_NETLOGIC_XLS204: 206 case PRID_IMP_NETLOGIC_XLS208: 207 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, 208 FMN_STNID_GMAC0_TX3, 8, 16, 32); 209 setup_fmn_cc(dma, FMN_STNID_DMA_0, 210 FMN_STNID_DMA_3, 4, 8, 64); 211 setup_fmn_cc(sae, FMN_STNID_SEC0, 212 FMN_STNID_SEC1, 2, 8, 128); 213 break; 214 215 case PRID_IMP_NETLOGIC_XLS404: 216 case PRID_IMP_NETLOGIC_XLS408: 217 case PRID_IMP_NETLOGIC_XLS404B: 218 case PRID_IMP_NETLOGIC_XLS408B: 219 case PRID_IMP_NETLOGIC_XLS416B: 220 case PRID_IMP_NETLOGIC_XLS608B: 221 case PRID_IMP_NETLOGIC_XLS616B: 222 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, 223 FMN_STNID_GMAC0_TX3, 8, 8, 32); 224 setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0, 225 FMN_STNID_GMAC1_TX3, 8, 8, 32); 226 setup_fmn_cc(dma, FMN_STNID_DMA_0, 227 FMN_STNID_DMA_3, 4, 4, 64); 228 setup_fmn_cc(cmp, FMN_STNID_CMP_0, 229 FMN_STNID_CMP_3, 4, 4, 64); 230 setup_fmn_cc(sae, FMN_STNID_SEC0, 231 FMN_STNID_SEC1, 2, 8, 128); 232 break; 233 234 case PRID_IMP_NETLOGIC_XLS412B: 235 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, 236 FMN_STNID_GMAC0_TX3, 8, 8, 32); 237 setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0, 238 FMN_STNID_GMAC1_TX3, 8, 8, 32); 239 setup_fmn_cc(dma, FMN_STNID_DMA_0, 240 FMN_STNID_DMA_3, 4, 4, 64); 241 setup_fmn_cc(cmp, FMN_STNID_CMP_0, 242 FMN_STNID_CMP_3, 4, 4, 64); 243 setup_fmn_cc(sae, FMN_STNID_SEC0, 244 FMN_STNID_SEC1, 2, 8, 128); 245 break; 246 247 case PRID_IMP_NETLOGIC_XLR308: 248 case PRID_IMP_NETLOGIC_XLR308C: 249 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, 250 FMN_STNID_GMAC0_TX3, 8, 16, 32); 251 setup_fmn_cc(dma, FMN_STNID_DMA_0, 252 FMN_STNID_DMA_3, 4, 8, 64); 253 setup_fmn_cc(sae, FMN_STNID_SEC0, 254 FMN_STNID_SEC1, 2, 4, 128); 255 break; 256 257 case PRID_IMP_NETLOGIC_XLR532: 258 case PRID_IMP_NETLOGIC_XLR532C: 259 case PRID_IMP_NETLOGIC_XLR516C: 260 case PRID_IMP_NETLOGIC_XLR508C: 261 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, 262 FMN_STNID_GMAC0_TX3, 8, 16, 32); 263 setup_fmn_cc(dma, FMN_STNID_DMA_0, 264 FMN_STNID_DMA_3, 4, 8, 64); 265 setup_fmn_cc(sae, FMN_STNID_SEC0, 266 FMN_STNID_SEC1, 2, 4, 128); 267 break; 268 269 case PRID_IMP_NETLOGIC_XLR732: 270 case PRID_IMP_NETLOGIC_XLR716: 271 setup_fmn_cc(&xgmac[0], FMN_STNID_XMAC0_00_TX, 272 FMN_STNID_XMAC0_15_TX, 8, 0, 32); 273 setup_fmn_cc(&xgmac[1], FMN_STNID_XMAC1_00_TX, 274 FMN_STNID_XMAC1_15_TX, 8, 0, 32); 275 setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0, 276 FMN_STNID_GMAC0_TX3, 8, 24, 32); 277 setup_fmn_cc(dma, FMN_STNID_DMA_0, 278 FMN_STNID_DMA_3, 4, 4, 64); 279 setup_fmn_cc(sae, FMN_STNID_SEC0, 280 FMN_STNID_SEC1, 2, 4, 128); 281 break; 282 default: 283 pr_err("Unknown CPU with processor ID [%d]\n", processor_id); 284 pr_err("Error: Cannot initialize FMN credits.\n"); 285 } 286 287 check_credit_distribution(); 288 289#if 0 /* debug */ 290 print_credit_config(&cpu[0]); 291 print_credit_config(&gmac[0]); 292#endif 293} 294