1# .gdbinit file 2# $Id: dot.gdbinit.vdec2,v 1.2 2004/11/11 02:03:15 takata Exp $ 3 4# setting 5set width 0d70 6set radix 0d16 7use_debug_dma 8 9# Initialize SDRAM controller for Mappi 10define sdram_init 11 # SDIR0 12 set *(unsigned long *)0x00ef6008=0x00000182 13 # SDIR1 14 set *(unsigned long *)0x00ef600c=0x00000001 15 # Initialize wait 16 shell sleep 1 17 # Ch0-MOD 18 set *(unsigned long *)0x00ef602c=0x00000020 19 # Ch0-TR 20 set *(unsigned long *)0x00ef6028=0x00041302 21 # Ch0-ADR 22 set *(unsigned long *)0x00ef6020=0x08000004 23 # AutoRef On 24 set *(unsigned long *)0x00ef6004=0x00010705 25 # Access enable 26 set *(unsigned long *)0x00ef6024=0x00000001 27end 28document sdram_init 29 Mappi SDRAM controller initialization 30 0x08000000 - 0x0bffffff (64MB) 31end 32 33# Initialize SDRAM controller for Mappi 34define sdram_init2 35 # SDIR0 36 set *(unsigned long *)0x00ef6008=0x00000182 37 # Ch0-MOD 38 set *(unsigned long *)0x00ef602c=0x00000020 39 # Ch0-TR 40 set *(unsigned long *)0x00ef6028=0x00010002 41 # Ch0-ADR 42 set *(unsigned long *)0x00ef6020=0x08000004 43 # AutoRef On 44 set *(unsigned long *)0x00ef6004=0x00010107 45 # SDIR1 46 set *(unsigned long *)0x00ef600c=0x00000001 47 # Initialize wait 48 shell sleep 1 49 # Access enable 50 set *(unsigned long *)0x00ef6024=0x00000001 51 shell sleep 1 52end 53document sdram_init 54 Mappi SDRAM controller initialization 55 0x08000000 - 0x0bffffff (64MB) 56end 57 58# Initialize LAN controller for Mappi 59define lanc_init 60 # Set BSEL1 (BSEL3 for the Chaos's bselc) 61 #set *(unsigned long *)0x00ef5004 = 0x0fff330f 62 #set *(unsigned long *)0x00ef5004 = 0x01113301 63 64# set *(unsigned long *)0x00ef5004 = 0x02011101 65# set *(unsigned long *)0x00ef5004 = 0x04441104 66 67 # BSEL5 68# set *(unsigned long *)0x00ef5014 = 0x0ccc310c 69# set *(unsigned long *)0x00ef5014 = 0x0303310f 70# set *(unsigned long *)0x00ef5014 = 0x01011102 -> NG 71# set *(unsigned long *)0x00ef5014 = 0x03033103 72 73 set *(unsigned long *)0x00ef500c = 0x0b0b1304 74 set *(unsigned long *)0x00ef5010 = 0x03033302 75# set *(unsigned long *)0x00ef5018 = 0x02223302 76end 77 78# MMU enable 79define mmu_enable 80 set $evb=0x88000000 81 set *(unsigned long *)0xffff0024=1 82end 83 84# MMU disable 85define mmu_disable 86 set $evb=0 87 set *(unsigned long *)0xffff0024=0 88end 89 90# Show TLB entries 91define show_tlb_entries 92 set $i = 0 93 set $addr = $arg0 94 while ($i < 0d16 ) 95 set $tlb_tag = *(unsigned long*)$addr 96 set $tlb_data = *(unsigned long*)($addr + 4) 97 printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data 98 set $i = $i + 1 99 set $addr = $addr + 8 100 end 101end 102define itlb 103 set $itlb=0xfe000000 104 show_tlb_entries $itlb 105end 106define dtlb 107 set $dtlb=0xfe000800 108 show_tlb_entries $dtlb 109end 110 111# Cache ON 112define set_cache_type 113 set $mctype = (void*)0xfffffff8 114# chaos 115# set *(unsigned long *)($mctype) = 0x0000c000 116# m32102 i-cache only 117 set *(unsigned long *)($mctype) = 0x00008000 118# m32102 d-cache only 119# set *(unsigned long *)($mctype) = 0x00004000 120end 121define cache_on 122 set $param = (void*)0x08001000 123 set *(unsigned long *)($param) = 0x60ff6102 124end 125 126 127# Show current task structure 128define show_current 129 set $current = $spi & 0xffffe000 130 printf "$current=0x%08lX\n",$current 131 print *(struct task_struct *)$current 132end 133 134# Show user assigned task structure 135define show_task 136 set $task = $arg0 & 0xffffe000 137 printf "$task=0x%08lX\n",$task 138 print *(struct task_struct *)$task 139end 140document show_task 141 Show user assigned task structure 142 arg0 : task structure address 143end 144 145# Show M32R registers 146define show_regs 147 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3 148 printf " R4[0x%08lX] R5[0x%08lX] R6[0x%08lX] R7[0x%08lX]\n",$r4,$r5,$r6,$r7 149 printf " R8[0x%08lX] R9[0x%08lX] R10[0x%08lX] R11[0x%08lX]\n",$r8,$r9,$r10,$r11 150 printf "R12[0x%08lX] FP[0x%08lX] LR[0x%08lX] SP[0x%08lX]\n",$r12,$fp,$lr,$sp 151 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu 152 printf "BPC[0x%08lX] PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch 153 printf "EVB[0x%08lX]\n",$evb 154 155 set $mests = *(unsigned long *)0xffff000c 156 set $mdeva = *(unsigned long *)0xffff0010 157 printf "MESTS[0x%08lX] MDEVA[0x%08lX]\n",$mests,$mdeva 158end 159 160 161# Setup all 162define setup 163 sdram_init 164# lanc_init 165# dispc_init 166# set $evb=0x08000000 167end 168 169# Load modules 170define load_modules 171 use_debug_dma 172 load 173# load busybox.mot 174end 175 176# Set kernel parameters 177define set_kernel_parameters 178 set $param = (void*)0x08001000 179 180 ## MOUNT_ROOT_RDONLY 181 set {long}($param+0x00)=0 182 ## RAMDISK_FLAGS 183 #set {long}($param+0x04)=0 184 ## ORIG_ROOT_DEV 185 #set {long}($param+0x08)=0x00000100 186 ## LOADER_TYPE 187 #set {long}($param+0x0C)=0 188 ## INITRD_START 189 set {long}($param+0x10)=0x082a0000 190 ## INITRD_SIZE 191 set {long}($param+0x14)=0d6200000 192 193 # M32R_CPUCLK 194 set *(unsigned long *)($param + 0x0018) = 0d25000000 195 # M32R_BUSCLK 196 set *(unsigned long *)($param + 0x001c) = 0d25000000 197 # M32R_TIMER_DIVIDE 198 set *(unsigned long *)($param + 0x0020) = 0d128 199 200 201 set {char[0x200]}($param + 0x100) = "console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.2.6 nfsaddrs=192.168.0.102:192.168.0.1:192.168.0.1:255.255.255.0:mappi: \0" 202 203 204end 205 206# Boot 207define boot 208 set_kernel_parameters 209 debug_chaos 210 set $pc=0x08002000 211 set $fp=0 212 del b 213 si 214end 215 216# Restart 217define restart 218 sdireset 219 sdireset 220 setup 221 load_modules 222 boot 223end 224 225sdireset 226sdireset 227file vmlinux 228target m32rsdi 229 230restart 231boot 232 233 234