1# .gdbinit file
2# $Id$
3
4# setting
5set width 0d70
6set radix 0d16
7debug_chaos
8
9# clk xin:cpu:bif:bus=1:4:2:1
10define clock_init_on
11  set *(unsigned long *)0x00ef4024 = 2
12  set *(unsigned long *)0x00ef4020 = 1
13  set *(unsigned long *)0x00ef4010 = 0
14  set *(unsigned long *)0x00ef4014 = 0
15  set *(unsigned long *)0x00ef4004 = 0x1
16  shell sleep 0.1
17  set *(unsigned long *)0x00ef4008 = 0x0200
18#  set *(unsigned long *)0x00ef4008 = 0x0201
19end
20
21# clk xin:cpu:bif:bus=1:4:1:1
22define clock_init_on_1411
23  set *(unsigned long *)0x00ef4024 = 2
24  set *(unsigned long *)0x00ef4020 = 2
25  set *(unsigned long *)0x00ef4010 = 0
26  set *(unsigned long *)0x00ef4014 = 0
27  set *(unsigned long *)0x00ef4004 = 0x1
28  shell sleep 0.1
29  set *(unsigned long *)0x00ef4008 = 0x0200
30end
31
32# clk xin:cpu:bif:bus=1:4:2:1
33define clock_init_on_1421
34  set *(unsigned long *)0x00ef4024 = 2
35  set *(unsigned long *)0x00ef4020 = 1
36  set *(unsigned long *)0x00ef4010 = 0
37  set *(unsigned long *)0x00ef4014 = 0
38  set *(unsigned long *)0x00ef4004 = 0x1
39  shell sleep 0.1
40  set *(unsigned long *)0x00ef4008 = 0x0200
41end
42
43# clk xin:cpu:bif:bus=1:8:2:1
44define clock_init_on_1821
45  set *(unsigned long *)0x00ef4024 = 3
46  set *(unsigned long *)0x00ef4020 = 2
47  set *(unsigned long *)0x00ef4010 = 0
48  set *(unsigned long *)0x00ef4014 = 0
49  set *(unsigned long *)0x00ef4004 = 0x3
50  shell sleep 0.1
51  set *(unsigned long *)0x00ef4008 = 0x0200
52end
53
54# clk xin:cpu:bif:bus=1:8:4:1
55define clock_init_on_1841
56  set *(unsigned long *)0x00ef4024 = 3
57  set *(unsigned long *)0x00ef4020 = 1
58  set *(unsigned long *)0x00ef4010 = 0
59  set *(unsigned long *)0x00ef4014 = 0
60  set *(unsigned long *)0x00ef4004 = 0x3
61  shell sleep 0.1
62  set *(unsigned long *)0x00ef4008 = 0x0200
63end
64
65# clk xin:cpu:bif:bus=1:16:8:1
66define clock_init_on_11681
67  set *(unsigned long *)0x00ef4024 = 4
68  set *(unsigned long *)0x00ef4020 = 2
69  set *(unsigned long *)0x00ef4010 = 0
70  set *(unsigned long *)0x00ef4014 = 0
71  set *(unsigned long *)0x00ef4004 = 0x7
72  shell sleep 0.1
73  set *(unsigned long *)0x00ef4008 = 0x0200
74end
75
76# clk xin:cpu:bif:bus=1:1:1:1
77define clock_init_off
78  # CPU
79  set *(unsigned long *)0x00ef4010 = 0
80  set *(unsigned long *)0x00ef4014 = 0
81  # BIF
82  set *(unsigned long *)0x00ef4020 = 0
83  # BUS
84  set *(unsigned long *)0x00ef4024 = 0
85  # PLL
86  set *(unsigned long *)0x00ef4008 = 0x0000
87end
88
89# Initialize programmable ports
90define port_init
91  set $sfrbase = 0x00ef0000
92  set *(unsigned short *)0x00ef1060 = 0x5555
93  set *(unsigned short *)0x00ef1062 = 0x5555
94  set *(unsigned short *)0x00ef1064 = 0x5555
95  set *(unsigned short *)0x00ef1066 = 0x5555
96  set *(unsigned short *)0x00ef1068 = 0x5555
97  set *(unsigned short *)0x00ef106a = 0x0000
98  set *(unsigned short *)0x00ef106e = 0x5555
99  set *(unsigned short *)0x00ef1070 = 0x5555
100  # LED ON
101  set *(unsigned char *)($sfrbase + 0x1015) = 0xff
102  set *(unsigned char *)($sfrbase + 0x1085) = 0xff
103  shell sleep 0.1
104  # LED OFF
105  set *(unsigned char *)($sfrbase + 0x1085) = 0x00
106end
107document port_init
108  P5=LED(output), P6.b4=LAN_RESET(output)
109end
110
111# Initialize SDRAM controller for Mappi
112define sdram_init
113  # SDIR0
114  set *(unsigned long *)0x00ef6008 = 0x00000182
115  # SDIR1
116  set *(unsigned long *)0x00ef600c = 0x00000001
117  # Initialize wait
118  shell sleep 0.1
119  # Ch0-MOD
120  set *(unsigned long *)0x00ef602c = 0x00000020
121  # Ch0-TR
122  set *(unsigned long *)0x00ef6028 = 0x00010002
123  # Ch0-ADR
124  set *(unsigned long *)0x00ef6020 = 0x08000004
125  # AutoRef On
126  set *(unsigned long *)0x00ef6004 = 0x00010107
127  # Access enable
128  set *(unsigned long *)0x00ef6024 = 0x00000001
129end
130document sdram_init
131  Mappi SDRAM controller initialization
132  0x08000000 - 0x0bffffff (64MB)
133end
134
135# Initialize LAN controller for Mappi
136define lanc_init
137  set $sfrbase = 0x00ef0000
138  # Set BSEL3 (BSEL3 for the Chaos's bselc)
139#  set *(unsigned long *)($sfrbase + 0x5300) = 0x01018040
140#  set *(unsigned long *)($sfrbase + 0x5304) = 0x01011101
141  set *(unsigned long *)($sfrbase + 0x5300) = 0x04048000
142  set *(unsigned long *)($sfrbase + 0x5304) = 0x01011103
143  set *(unsigned long *)($sfrbase + 0x5308) = 0x00000001
144  # Reset (P5=LED,P6.b4=LAN_RESET)
145  set *(unsigned short *)($sfrbase + 0x106c) = 0x0000
146  set *(unsigned char *)($sfrbase + 0x1016) = 0xff
147  set *(unsigned char *)($sfrbase + 0x1086) = 0xff
148  shell sleep 0.1
149#  set *(unsigned char *)($sfrbase + 0x1086) = 0x00
150  set *(unsigned char *)($sfrbase + 0x1086) = 0x04
151  set *(unsigned long *)(0x0c000330) = 0xffffffff
152  # Set mac address
153  set $lanc = (void*)0x0c000300
154  set *(unsigned long *)($lanc + 0x0000) = 0x00610010
155  set *(unsigned long *)($lanc + 0x0004) = 0x00200030
156  set *(unsigned long *)($lanc + 0x0008) = 0x00400050
157  set *(unsigned long *)($lanc + 0x000c) = 0x00600007
158end
159document lanc_init
160  Mappi LAN controller initialization
161  ex.) MAC address:  10 20 30 40 50 60
162end
163
164# LCD & CRT dual-head setting (8bpp)
165define dispc_init
166  set $sfrbase = 0x00ef0000
167  # BSEL4 Dispc
168  # 20MHz
169#  set *(unsigned long *)($sfrbase + 0x5400) = 0x02028282
170#  set *(unsigned long *)($sfrbase + 0x5404) = 0x00122202
171  # 40MHz
172  set *(unsigned long *)($sfrbase + 0x5400) = 0x04048000
173  set *(unsigned long *)($sfrbase + 0x5404) = 0x00101103
174end
175
176# MMU enable
177define mmu_enable
178  set $evb=0x88000000
179  set *(unsigned long *)0xffff0024=1
180end
181
182# MMU disable
183define mmu_disable
184  set $evb=0
185  set *(unsigned long *)0xffff0024=0
186end
187
188# Show TLB entries
189define show_tlb_entries
190  set $i = 0
191  set $addr = $arg0
192  use_mon_code
193  while ($i < 0d32 )
194    set $tlb_tag = *(unsigned long*)$addr
195    set $tlb_data = *(unsigned long*)($addr + 4)
196    printf " [%2d] 0x%08lx : 0x%08lx - 0x%08lx\n", $i, $addr, $tlb_tag, $tlb_data
197    set $i = $i + 1
198    set $addr = $addr + 8
199  end
200  use_debug_dma
201end
202define itlb
203  set $itlb=0xfe000000
204  show_tlb_entries $itlb
205end
206define dtlb
207  set $dtlb=0xfe000800
208  show_tlb_entries $dtlb
209end
210
211
212# Show current task structure
213define show_current
214  set $current = $spi & 0xffffe000
215  printf "$current=0x%08lX\n",$current
216  print *(struct task_struct *)$current
217end
218
219# Show user assigned task structure
220define show_task
221  set $task = $arg0 & 0xffffe000
222  printf "$task=0x%08lX\n",$task
223  print *(struct task_struct *)$task
224end
225document show_task
226  Show user assigned task structure
227  arg0 : task structure address
228end
229
230# Show M32R registers
231define show_regs
232  printf " R0[0x%08lX]   R1[0x%08lX]   R2[0x%08lX]   R3[0x%08lX]\n",$r0,$r1,$r2,$r3
233  printf " R4[0x%08lX]   R5[0x%08lX]   R6[0x%08lX]   R7[0x%08lX]\n",$r4,$r5,$r6,$r7
234  printf " R8[0x%08lX]   R9[0x%08lX]  R10[0x%08lX]  R11[0x%08lX]\n",$r8,$r9,$r10,$r11
235  printf "R12[0x%08lX]   FP[0x%08lX]   LR[0x%08lX]   SP[0x%08lX]\n",$r12,$fp,$lr,$fp
236  printf "PSW[0x%08lX]  CBR[0x%08lX]  SPI[0x%08lX]  SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
237  printf "BPC[0x%08lX]   PC[0x%08lX] ACCL[0x%08lX] ACCH[0x%08lX]\n",$bpc,$pc,$accl,$acch
238  printf "EVB[0x%08lX]\n",$evb
239end
240
241
242# Setup all
243define setup
244  use_mon_code
245  set *(unsigned int)0xfffffffc=0x60
246  shell sleep 0.1
247#  clock_init_on_1411
248  clock_init_on_1421
249#  clock_init_on_1821
250#  clock_init_on_1841
251#  clock_init_on_11681
252#  clock_init_off
253  shell sleep 0.1
254  port_init
255  sdram_init
256  lanc_init
257  dispc_init
258  set $evb=0x08000000
259end
260
261# Load modules
262define load_modules
263  use_debug_dma
264  load
265#  load ramdisk_082a0000.mot
266#  load romfs_082a0000.mot
267#  use_mon_code
268end
269
270# Set kernel parameters
271define set_kernel_parameters
272  set $param = (void*)0x08001000
273  # INITRD_START
274# set *(unsigned long *)($param + 0x0010) = 0x082a0000
275  # INITRD_SIZE
276#  set *(unsigned long *)($param + 0x0014) = 0x00000000
277  # M32R_CPUCLK
278  set *(unsigned long *)($param + 0x0018) = 0d160000000
279#  set *(unsigned long *)($param + 0x0018) = 0d80000000
280#  set *(unsigned long *)($param + 0x0018) = 0d40000000
281  # M32R_BUSCLK
282  set *(unsigned long *)($param + 0x001c) = 0d40000000
283
284  # M32R_TIMER_DIVIDE
285  set *(unsigned long *)($param + 0x0020) = 0d128
286
287  set {char[0x200]}($param + 0x100) = "console=tty1 console=ttyS0,115200n8x root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
288#  set {char[0x200]}($param + 0x100) = "console=tty1 root=/dev/nfsroot nfsroot=192.168.0.1:/project/m32r-linux/export/root.x nfsaddrs=192.168.0.101:192.168.0.1:192.168.0.1:255.255.255.0:mappi001 \0"
289end
290
291# Boot
292define boot
293  set_kernel_parameters
294  set $pc=0x08002000
295  set *(unsigned char *)0x08001003=0x03
296  si
297  c
298end
299
300# Set breakpoints
301define set_breakpoints
302  b *0x08000030
303end
304
305## Boot MP
306define boot_mp
307  set_kernel_parameters
308  set *(unsigned long *)0x00f00000 = boot - 0x80000000
309  set *(unsigned long *)0x00eff2f8 = 0x2
310  x 0x00eff2f8
311
312  set $pc=0x08002000
313  si
314  c
315end
316document boot_mp
317  Boot BSP
318end
319
320## Boot UP
321define boot_up
322  set_kernel_parameters
323  set $pc=0x08002000
324  si
325  c
326end
327document boot_up
328  Boot BSP
329end
330
331# Restart
332define restart
333  sdireset
334  sdireset
335  setup
336  load_modules
337  boot_mp
338end
339
340sdireset
341sdireset
342file vmlinux
343target m32rsdi
344setup
345