1/* 2 * Copyright 2004-2009 Analog Devices Inc. 3 * 2005 National ICT Australia (NICTA) 4 * Aidan Williams <aidan@nicta.com.au> 5 * 6 * Licensed under the GPL-2 7 */ 8 9#include <linux/device.h> 10#include <linux/platform_device.h> 11#include <linux/mtd/mtd.h> 12#include <linux/mtd/physmap.h> 13#include <linux/mtd/partitions.h> 14#include <linux/spi/spi.h> 15#include <linux/spi/flash.h> 16#include <linux/irq.h> 17#include <linux/interrupt.h> 18#include <asm/bfin5xx_spi.h> 19#include <asm/dma.h> 20#include <asm/gpio.h> 21#include <asm/nand.h> 22#include <asm/portmux.h> 23#include <asm/dpmc.h> 24#include <linux/input.h> 25 26/* 27 * Name the Board for the /proc/cpuinfo 28 */ 29const char bfin_board_name[] = "ADI BF538-EZKIT"; 30 31/* 32 * Driver needs to know address, irq and flag pin. 33 */ 34 35 36#if IS_ENABLED(CONFIG_RTC_DRV_BFIN) 37static struct platform_device rtc_device = { 38 .name = "rtc-bfin", 39 .id = -1, 40}; 41#endif /* CONFIG_RTC_DRV_BFIN */ 42 43#if IS_ENABLED(CONFIG_SERIAL_BFIN) 44#ifdef CONFIG_SERIAL_BFIN_UART0 45static struct resource bfin_uart0_resources[] = { 46 { 47 .start = UART0_THR, 48 .end = UART0_GCTL+2, 49 .flags = IORESOURCE_MEM, 50 }, 51 { 52 .start = IRQ_UART0_TX, 53 .end = IRQ_UART0_TX, 54 .flags = IORESOURCE_IRQ, 55 }, 56 { 57 .start = IRQ_UART0_RX, 58 .end = IRQ_UART0_RX, 59 .flags = IORESOURCE_IRQ, 60 }, 61 { 62 .start = IRQ_UART0_ERROR, 63 .end = IRQ_UART0_ERROR, 64 .flags = IORESOURCE_IRQ, 65 }, 66 { 67 .start = CH_UART0_TX, 68 .end = CH_UART0_TX, 69 .flags = IORESOURCE_DMA, 70 }, 71 { 72 .start = CH_UART0_RX, 73 .end = CH_UART0_RX, 74 .flags = IORESOURCE_DMA, 75 }, 76#ifdef CONFIG_BFIN_UART0_CTSRTS 77 { /* CTS pin */ 78 .start = GPIO_PG7, 79 .end = GPIO_PG7, 80 .flags = IORESOURCE_IO, 81 }, 82 { /* RTS pin */ 83 .start = GPIO_PG6, 84 .end = GPIO_PG6, 85 .flags = IORESOURCE_IO, 86 }, 87#endif 88}; 89 90static unsigned short bfin_uart0_peripherals[] = { 91 P_UART0_TX, P_UART0_RX, 0 92}; 93 94static struct platform_device bfin_uart0_device = { 95 .name = "bfin-uart", 96 .id = 0, 97 .num_resources = ARRAY_SIZE(bfin_uart0_resources), 98 .resource = bfin_uart0_resources, 99 .dev = { 100 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ 101 }, 102}; 103#endif /* CONFIG_SERIAL_BFIN_UART0 */ 104#ifdef CONFIG_SERIAL_BFIN_UART1 105static struct resource bfin_uart1_resources[] = { 106 { 107 .start = UART1_THR, 108 .end = UART1_GCTL+2, 109 .flags = IORESOURCE_MEM, 110 }, 111 { 112 .start = IRQ_UART1_TX, 113 .end = IRQ_UART1_TX, 114 .flags = IORESOURCE_IRQ, 115 }, 116 { 117 .start = IRQ_UART1_RX, 118 .end = IRQ_UART1_RX, 119 .flags = IORESOURCE_IRQ, 120 }, 121 { 122 .start = IRQ_UART1_ERROR, 123 .end = IRQ_UART1_ERROR, 124 .flags = IORESOURCE_IRQ, 125 }, 126 { 127 .start = CH_UART1_TX, 128 .end = CH_UART1_TX, 129 .flags = IORESOURCE_DMA, 130 }, 131 { 132 .start = CH_UART1_RX, 133 .end = CH_UART1_RX, 134 .flags = IORESOURCE_DMA, 135 }, 136}; 137 138static unsigned short bfin_uart1_peripherals[] = { 139 P_UART1_TX, P_UART1_RX, 0 140}; 141 142static struct platform_device bfin_uart1_device = { 143 .name = "bfin-uart", 144 .id = 1, 145 .num_resources = ARRAY_SIZE(bfin_uart1_resources), 146 .resource = bfin_uart1_resources, 147 .dev = { 148 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ 149 }, 150}; 151#endif /* CONFIG_SERIAL_BFIN_UART1 */ 152#ifdef CONFIG_SERIAL_BFIN_UART2 153static struct resource bfin_uart2_resources[] = { 154 { 155 .start = UART2_THR, 156 .end = UART2_GCTL+2, 157 .flags = IORESOURCE_MEM, 158 }, 159 { 160 .start = IRQ_UART2_TX, 161 .end = IRQ_UART2_TX, 162 .flags = IORESOURCE_IRQ, 163 }, 164 { 165 .start = IRQ_UART2_RX, 166 .end = IRQ_UART2_RX, 167 .flags = IORESOURCE_IRQ, 168 }, 169 { 170 .start = IRQ_UART2_ERROR, 171 .end = IRQ_UART2_ERROR, 172 .flags = IORESOURCE_IRQ, 173 }, 174 { 175 .start = CH_UART2_TX, 176 .end = CH_UART2_TX, 177 .flags = IORESOURCE_DMA, 178 }, 179 { 180 .start = CH_UART2_RX, 181 .end = CH_UART2_RX, 182 .flags = IORESOURCE_DMA, 183 }, 184}; 185 186static unsigned short bfin_uart2_peripherals[] = { 187 P_UART2_TX, P_UART2_RX, 0 188}; 189 190static struct platform_device bfin_uart2_device = { 191 .name = "bfin-uart", 192 .id = 2, 193 .num_resources = ARRAY_SIZE(bfin_uart2_resources), 194 .resource = bfin_uart2_resources, 195 .dev = { 196 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */ 197 }, 198}; 199#endif /* CONFIG_SERIAL_BFIN_UART2 */ 200#endif /* CONFIG_SERIAL_BFIN */ 201 202#if IS_ENABLED(CONFIG_BFIN_SIR) 203#ifdef CONFIG_BFIN_SIR0 204static struct resource bfin_sir0_resources[] = { 205 { 206 .start = 0xFFC00400, 207 .end = 0xFFC004FF, 208 .flags = IORESOURCE_MEM, 209 }, 210 { 211 .start = IRQ_UART0_RX, 212 .end = IRQ_UART0_RX+1, 213 .flags = IORESOURCE_IRQ, 214 }, 215 { 216 .start = CH_UART0_RX, 217 .end = CH_UART0_RX+1, 218 .flags = IORESOURCE_DMA, 219 }, 220}; 221static struct platform_device bfin_sir0_device = { 222 .name = "bfin_sir", 223 .id = 0, 224 .num_resources = ARRAY_SIZE(bfin_sir0_resources), 225 .resource = bfin_sir0_resources, 226}; 227#endif /* CONFIG_BFIN_SIR0 */ 228#ifdef CONFIG_BFIN_SIR1 229static struct resource bfin_sir1_resources[] = { 230 { 231 .start = 0xFFC02000, 232 .end = 0xFFC020FF, 233 .flags = IORESOURCE_MEM, 234 }, 235 { 236 .start = IRQ_UART1_RX, 237 .end = IRQ_UART1_RX+1, 238 .flags = IORESOURCE_IRQ, 239 }, 240 { 241 .start = CH_UART1_RX, 242 .end = CH_UART1_RX+1, 243 .flags = IORESOURCE_DMA, 244 }, 245}; 246static struct platform_device bfin_sir1_device = { 247 .name = "bfin_sir", 248 .id = 1, 249 .num_resources = ARRAY_SIZE(bfin_sir1_resources), 250 .resource = bfin_sir1_resources, 251}; 252#endif /* CONFIG_BFIN_SIR1 */ 253#ifdef CONFIG_BFIN_SIR2 254static struct resource bfin_sir2_resources[] = { 255 { 256 .start = 0xFFC02100, 257 .end = 0xFFC021FF, 258 .flags = IORESOURCE_MEM, 259 }, 260 { 261 .start = IRQ_UART2_RX, 262 .end = IRQ_UART2_RX+1, 263 .flags = IORESOURCE_IRQ, 264 }, 265 { 266 .start = CH_UART2_RX, 267 .end = CH_UART2_RX+1, 268 .flags = IORESOURCE_DMA, 269 }, 270}; 271static struct platform_device bfin_sir2_device = { 272 .name = "bfin_sir", 273 .id = 2, 274 .num_resources = ARRAY_SIZE(bfin_sir2_resources), 275 .resource = bfin_sir2_resources, 276}; 277#endif /* CONFIG_BFIN_SIR2 */ 278#endif /* CONFIG_BFIN_SIR */ 279 280#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT) 281#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 282static struct resource bfin_sport0_uart_resources[] = { 283 { 284 .start = SPORT0_TCR1, 285 .end = SPORT0_MRCS3+4, 286 .flags = IORESOURCE_MEM, 287 }, 288 { 289 .start = IRQ_SPORT0_RX, 290 .end = IRQ_SPORT0_RX+1, 291 .flags = IORESOURCE_IRQ, 292 }, 293 { 294 .start = IRQ_SPORT0_ERROR, 295 .end = IRQ_SPORT0_ERROR, 296 .flags = IORESOURCE_IRQ, 297 }, 298}; 299 300static unsigned short bfin_sport0_peripherals[] = { 301 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, 302 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 303}; 304 305static struct platform_device bfin_sport0_uart_device = { 306 .name = "bfin-sport-uart", 307 .id = 0, 308 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources), 309 .resource = bfin_sport0_uart_resources, 310 .dev = { 311 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */ 312 }, 313}; 314#endif /* CONFIG_SERIAL_BFIN_SPORT0_UART */ 315#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 316static struct resource bfin_sport1_uart_resources[] = { 317 { 318 .start = SPORT1_TCR1, 319 .end = SPORT1_MRCS3+4, 320 .flags = IORESOURCE_MEM, 321 }, 322 { 323 .start = IRQ_SPORT1_RX, 324 .end = IRQ_SPORT1_RX+1, 325 .flags = IORESOURCE_IRQ, 326 }, 327 { 328 .start = IRQ_SPORT1_ERROR, 329 .end = IRQ_SPORT1_ERROR, 330 .flags = IORESOURCE_IRQ, 331 }, 332}; 333 334static unsigned short bfin_sport1_peripherals[] = { 335 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, 336 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 337}; 338 339static struct platform_device bfin_sport1_uart_device = { 340 .name = "bfin-sport-uart", 341 .id = 1, 342 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources), 343 .resource = bfin_sport1_uart_resources, 344 .dev = { 345 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */ 346 }, 347}; 348#endif /* CONFIG_SERIAL_BFIN_SPORT1_UART */ 349#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART 350static struct resource bfin_sport2_uart_resources[] = { 351 { 352 .start = SPORT2_TCR1, 353 .end = SPORT2_MRCS3+4, 354 .flags = IORESOURCE_MEM, 355 }, 356 { 357 .start = IRQ_SPORT2_RX, 358 .end = IRQ_SPORT2_RX+1, 359 .flags = IORESOURCE_IRQ, 360 }, 361 { 362 .start = IRQ_SPORT2_ERROR, 363 .end = IRQ_SPORT2_ERROR, 364 .flags = IORESOURCE_IRQ, 365 }, 366}; 367 368static unsigned short bfin_sport2_peripherals[] = { 369 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS, 370 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0 371}; 372 373static struct platform_device bfin_sport2_uart_device = { 374 .name = "bfin-sport-uart", 375 .id = 2, 376 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources), 377 .resource = bfin_sport2_uart_resources, 378 .dev = { 379 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */ 380 }, 381}; 382#endif /* CONFIG_SERIAL_BFIN_SPORT2_UART */ 383#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART 384static struct resource bfin_sport3_uart_resources[] = { 385 { 386 .start = SPORT3_TCR1, 387 .end = SPORT3_MRCS3+4, 388 .flags = IORESOURCE_MEM, 389 }, 390 { 391 .start = IRQ_SPORT3_RX, 392 .end = IRQ_SPORT3_RX+1, 393 .flags = IORESOURCE_IRQ, 394 }, 395 { 396 .start = IRQ_SPORT3_ERROR, 397 .end = IRQ_SPORT3_ERROR, 398 .flags = IORESOURCE_IRQ, 399 }, 400}; 401 402static unsigned short bfin_sport3_peripherals[] = { 403 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS, 404 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0 405}; 406 407static struct platform_device bfin_sport3_uart_device = { 408 .name = "bfin-sport-uart", 409 .id = 3, 410 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources), 411 .resource = bfin_sport3_uart_resources, 412 .dev = { 413 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */ 414 }, 415}; 416#endif /* CONFIG_SERIAL_BFIN_SPORT3_UART */ 417#endif /* CONFIG_SERIAL_BFIN_SPORT */ 418 419#if IS_ENABLED(CONFIG_CAN_BFIN) 420static unsigned short bfin_can_peripherals[] = { 421 P_CAN0_RX, P_CAN0_TX, 0 422}; 423 424static struct resource bfin_can_resources[] = { 425 { 426 .start = 0xFFC02A00, 427 .end = 0xFFC02FFF, 428 .flags = IORESOURCE_MEM, 429 }, 430 { 431 .start = IRQ_CAN_RX, 432 .end = IRQ_CAN_RX, 433 .flags = IORESOURCE_IRQ, 434 }, 435 { 436 .start = IRQ_CAN_TX, 437 .end = IRQ_CAN_TX, 438 .flags = IORESOURCE_IRQ, 439 }, 440 { 441 .start = IRQ_CAN_ERROR, 442 .end = IRQ_CAN_ERROR, 443 .flags = IORESOURCE_IRQ, 444 }, 445}; 446 447static struct platform_device bfin_can_device = { 448 .name = "bfin_can", 449 .num_resources = ARRAY_SIZE(bfin_can_resources), 450 .resource = bfin_can_resources, 451 .dev = { 452 .platform_data = &bfin_can_peripherals, /* Passed to driver */ 453 }, 454}; 455#endif /* CONFIG_CAN_BFIN */ 456 457/* 458 * USB-LAN EzExtender board 459 * Driver needs to know address, irq and flag pin. 460 */ 461#if IS_ENABLED(CONFIG_SMC91X) 462#include <linux/smc91x.h> 463 464static struct smc91x_platdata smc91x_info = { 465 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, 466 .leda = RPC_LED_100_10, 467 .ledb = RPC_LED_TX_RX, 468}; 469 470static struct resource smc91x_resources[] = { 471 { 472 .name = "smc91x-regs", 473 .start = 0x20310300, 474 .end = 0x20310300 + 16, 475 .flags = IORESOURCE_MEM, 476 }, { 477 .start = IRQ_PF0, 478 .end = IRQ_PF0, 479 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, 480 }, 481}; 482static struct platform_device smc91x_device = { 483 .name = "smc91x", 484 .id = 0, 485 .num_resources = ARRAY_SIZE(smc91x_resources), 486 .resource = smc91x_resources, 487 .dev = { 488 .platform_data = &smc91x_info, 489 }, 490}; 491#endif /* CONFIG_SMC91X */ 492 493#if IS_ENABLED(CONFIG_SPI_BFIN5XX) 494/* all SPI peripherals info goes here */ 495#if IS_ENABLED(CONFIG_MTD_M25P80) 496/* SPI flash chip (m25p16) */ 497static struct mtd_partition bfin_spi_flash_partitions[] = { 498 { 499 .name = "bootloader(spi)", 500 .size = 0x00040000, 501 .offset = 0, 502 .mask_flags = MTD_CAP_ROM 503 }, { 504 .name = "linux kernel(spi)", 505 .size = 0x1c0000, 506 .offset = 0x40000 507 } 508}; 509 510static struct flash_platform_data bfin_spi_flash_data = { 511 .name = "m25p80", 512 .parts = bfin_spi_flash_partitions, 513 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), 514 .type = "m25p16", 515}; 516 517static struct bfin5xx_spi_chip spi_flash_chip_info = { 518 .enable_dma = 0, /* use dma transfer with this chip*/ 519}; 520#endif /* CONFIG_MTD_M25P80 */ 521#endif /* CONFIG_SPI_BFIN5XX */ 522 523#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879) 524#include <linux/spi/ad7879.h> 525static const struct ad7879_platform_data bfin_ad7879_ts_info = { 526 .model = 7879, /* Model = AD7879 */ 527 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */ 528 .pressure_max = 10000, 529 .pressure_min = 0, 530 .first_conversion_delay = 3, /* wait 512us before do a first conversion */ 531 .acquisition_time = 1, /* 4us acquisition time per sample */ 532 .median = 2, /* do 8 measurements */ 533 .averaging = 1, /* take the average of 4 middle samples */ 534 .pen_down_acc_interval = 255, /* 9.4 ms */ 535 .gpio_export = 1, /* Export GPIO to gpiolib */ 536 .gpio_base = -1, /* Dynamic allocation */ 537}; 538#endif /* CONFIG_TOUCHSCREEN_AD7879 */ 539 540#if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1) 541#include <asm/bfin-lq035q1.h> 542 543static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = { 544 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB, 545 .ppi_mode = USE_RGB565_16_BIT_PPI, 546 .use_bl = 0, /* let something else control the LCD Blacklight */ 547 .gpio_bl = GPIO_PF7, 548}; 549 550static struct resource bfin_lq035q1_resources[] = { 551 { 552 .start = IRQ_PPI_ERROR, 553 .end = IRQ_PPI_ERROR, 554 .flags = IORESOURCE_IRQ, 555 }, 556}; 557 558static struct platform_device bfin_lq035q1_device = { 559 .name = "bfin-lq035q1", 560 .id = -1, 561 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources), 562 .resource = bfin_lq035q1_resources, 563 .dev = { 564 .platform_data = &bfin_lq035q1_data, 565 }, 566}; 567#endif /* CONFIG_FB_BFIN_LQ035Q1 */ 568 569static struct spi_board_info bf538_spi_board_info[] __initdata = { 570#if IS_ENABLED(CONFIG_MTD_M25P80) 571 { 572 /* the modalias must be the same as spi device driver name */ 573 .modalias = "m25p80", /* Name of spi_driver for this device */ 574 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ 575 .bus_num = 0, /* Framework bus number */ 576 .chip_select = 1, /* SPI_SSEL1*/ 577 .platform_data = &bfin_spi_flash_data, 578 .controller_data = &spi_flash_chip_info, 579 .mode = SPI_MODE_3, 580 }, 581#endif /* CONFIG_MTD_M25P80 */ 582#if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7879_SPI) 583 { 584 .modalias = "ad7879", 585 .platform_data = &bfin_ad7879_ts_info, 586 .irq = IRQ_PF3, 587 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ 588 .bus_num = 0, 589 .chip_select = 1, 590 .mode = SPI_CPHA | SPI_CPOL, 591 }, 592#endif /* CONFIG_TOUCHSCREEN_AD7879_SPI */ 593#if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1) 594 { 595 .modalias = "bfin-lq035q1-spi", 596 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ 597 .bus_num = 0, 598 .chip_select = 2, 599 .mode = SPI_CPHA | SPI_CPOL, 600 }, 601#endif /* CONFIG_FB_BFIN_LQ035Q1 */ 602#if IS_ENABLED(CONFIG_SPI_SPIDEV) 603 { 604 .modalias = "spidev", 605 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ 606 .bus_num = 0, 607 .chip_select = 1, 608 }, 609#endif /* CONFIG_SPI_SPIDEV */ 610}; 611 612/* SPI (0) */ 613static struct resource bfin_spi0_resource[] = { 614 [0] = { 615 .start = SPI0_REGBASE, 616 .end = SPI0_REGBASE + 0xFF, 617 .flags = IORESOURCE_MEM, 618 }, 619 [1] = { 620 .start = CH_SPI0, 621 .end = CH_SPI0, 622 .flags = IORESOURCE_DMA, 623 }, 624 [2] = { 625 .start = IRQ_SPI0, 626 .end = IRQ_SPI0, 627 .flags = IORESOURCE_IRQ, 628 } 629}; 630 631/* SPI (1) */ 632static struct resource bfin_spi1_resource[] = { 633 [0] = { 634 .start = SPI1_REGBASE, 635 .end = SPI1_REGBASE + 0xFF, 636 .flags = IORESOURCE_MEM, 637 }, 638 [1] = { 639 .start = CH_SPI1, 640 .end = CH_SPI1, 641 .flags = IORESOURCE_DMA, 642 }, 643 [2] = { 644 .start = IRQ_SPI1, 645 .end = IRQ_SPI1, 646 .flags = IORESOURCE_IRQ, 647 } 648}; 649 650/* SPI (2) */ 651static struct resource bfin_spi2_resource[] = { 652 [0] = { 653 .start = SPI2_REGBASE, 654 .end = SPI2_REGBASE + 0xFF, 655 .flags = IORESOURCE_MEM, 656 }, 657 [1] = { 658 .start = CH_SPI2, 659 .end = CH_SPI2, 660 .flags = IORESOURCE_DMA, 661 }, 662 [2] = { 663 .start = IRQ_SPI2, 664 .end = IRQ_SPI2, 665 .flags = IORESOURCE_IRQ, 666 } 667}; 668 669/* SPI controller data */ 670static struct bfin5xx_spi_master bf538_spi_master_info0 = { 671 .num_chipselect = 8, 672 .enable_dma = 1, /* master has the ability to do dma transfer */ 673 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, 674}; 675 676static struct platform_device bf538_spi_master0 = { 677 .name = "bfin-spi", 678 .id = 0, /* Bus number */ 679 .num_resources = ARRAY_SIZE(bfin_spi0_resource), 680 .resource = bfin_spi0_resource, 681 .dev = { 682 .platform_data = &bf538_spi_master_info0, /* Passed to driver */ 683 }, 684}; 685 686static struct bfin5xx_spi_master bf538_spi_master_info1 = { 687 .num_chipselect = 2, 688 .enable_dma = 1, /* master has the ability to do dma transfer */ 689 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, 690}; 691 692static struct platform_device bf538_spi_master1 = { 693 .name = "bfin-spi", 694 .id = 1, /* Bus number */ 695 .num_resources = ARRAY_SIZE(bfin_spi1_resource), 696 .resource = bfin_spi1_resource, 697 .dev = { 698 .platform_data = &bf538_spi_master_info1, /* Passed to driver */ 699 }, 700}; 701 702static struct bfin5xx_spi_master bf538_spi_master_info2 = { 703 .num_chipselect = 2, 704 .enable_dma = 1, /* master has the ability to do dma transfer */ 705 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0}, 706}; 707 708static struct platform_device bf538_spi_master2 = { 709 .name = "bfin-spi", 710 .id = 2, /* Bus number */ 711 .num_resources = ARRAY_SIZE(bfin_spi2_resource), 712 .resource = bfin_spi2_resource, 713 .dev = { 714 .platform_data = &bf538_spi_master_info2, /* Passed to driver */ 715 }, 716}; 717 718#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI) 719static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0}; 720 721static struct resource bfin_twi0_resource[] = { 722 [0] = { 723 .start = TWI0_REGBASE, 724 .end = TWI0_REGBASE + 0xFF, 725 .flags = IORESOURCE_MEM, 726 }, 727 [1] = { 728 .start = IRQ_TWI0, 729 .end = IRQ_TWI0, 730 .flags = IORESOURCE_IRQ, 731 }, 732}; 733 734static struct platform_device i2c_bfin_twi0_device = { 735 .name = "i2c-bfin-twi", 736 .id = 0, 737 .num_resources = ARRAY_SIZE(bfin_twi0_resource), 738 .resource = bfin_twi0_resource, 739 .dev = { 740 .platform_data = &bfin_twi0_pins, 741 }, 742}; 743 744static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0}; 745 746static struct resource bfin_twi1_resource[] = { 747 [0] = { 748 .start = TWI1_REGBASE, 749 .end = TWI1_REGBASE + 0xFF, 750 .flags = IORESOURCE_MEM, 751 }, 752 [1] = { 753 .start = IRQ_TWI1, 754 .end = IRQ_TWI1, 755 .flags = IORESOURCE_IRQ, 756 }, 757}; 758 759static struct platform_device i2c_bfin_twi1_device = { 760 .name = "i2c-bfin-twi", 761 .id = 1, 762 .num_resources = ARRAY_SIZE(bfin_twi1_resource), 763 .resource = bfin_twi1_resource, 764}; 765#endif /* CONFIG_I2C_BLACKFIN_TWI */ 766 767#if IS_ENABLED(CONFIG_KEYBOARD_GPIO) 768#include <linux/gpio_keys.h> 769 770static struct gpio_keys_button bfin_gpio_keys_table[] = { 771 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"}, 772}; 773 774static struct gpio_keys_platform_data bfin_gpio_keys_data = { 775 .buttons = bfin_gpio_keys_table, 776 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), 777}; 778 779static struct platform_device bfin_device_gpiokeys = { 780 .name = "gpio-keys", 781 .dev = { 782 .platform_data = &bfin_gpio_keys_data, 783 }, 784}; 785#endif 786 787static const unsigned int cclk_vlev_datasheet[] = 788{ 789/* 790 * Internal VLEV BF538SBBC1533 791 ****temporarily using these values until data sheet is updated 792 */ 793 VRPAIR(VLEV_100, 150000000), 794 VRPAIR(VLEV_100, 250000000), 795 VRPAIR(VLEV_110, 276000000), 796 VRPAIR(VLEV_115, 301000000), 797 VRPAIR(VLEV_120, 525000000), 798 VRPAIR(VLEV_125, 550000000), 799 VRPAIR(VLEV_130, 600000000), 800}; 801 802static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { 803 .tuple_tab = cclk_vlev_datasheet, 804 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), 805 .vr_settling_time = 25 /* us */, 806}; 807 808static struct platform_device bfin_dpmc = { 809 .name = "bfin dpmc", 810 .dev = { 811 .platform_data = &bfin_dmpc_vreg_data, 812 }, 813}; 814 815#if IS_ENABLED(CONFIG_MTD_PHYSMAP) 816static struct mtd_partition ezkit_partitions[] = { 817 { 818 .name = "bootloader(nor)", 819 .size = 0x40000, 820 .offset = 0, 821 }, { 822 .name = "linux kernel(nor)", 823 .size = 0x180000, 824 .offset = MTDPART_OFS_APPEND, 825 }, { 826 .name = "file system(nor)", 827 .size = MTDPART_SIZ_FULL, 828 .offset = MTDPART_OFS_APPEND, 829 } 830}; 831 832static struct physmap_flash_data ezkit_flash_data = { 833 .width = 2, 834 .parts = ezkit_partitions, 835 .nr_parts = ARRAY_SIZE(ezkit_partitions), 836}; 837 838static struct resource ezkit_flash_resource = { 839 .start = 0x20000000, 840#if IS_ENABLED(CONFIG_SMC91X) 841 .end = 0x202fffff, 842#else 843 .end = 0x203fffff, 844#endif 845 .flags = IORESOURCE_MEM, 846}; 847 848static struct platform_device ezkit_flash_device = { 849 .name = "physmap-flash", 850 .id = 0, 851 .dev = { 852 .platform_data = &ezkit_flash_data, 853 }, 854 .num_resources = 1, 855 .resource = &ezkit_flash_resource, 856}; 857#endif 858 859static struct platform_device *cm_bf538_devices[] __initdata = { 860 861 &bfin_dpmc, 862 863#if IS_ENABLED(CONFIG_RTC_DRV_BFIN) 864 &rtc_device, 865#endif 866 867#if IS_ENABLED(CONFIG_SERIAL_BFIN) 868#ifdef CONFIG_SERIAL_BFIN_UART0 869 &bfin_uart0_device, 870#endif 871#ifdef CONFIG_SERIAL_BFIN_UART1 872 &bfin_uart1_device, 873#endif 874#ifdef CONFIG_SERIAL_BFIN_UART2 875 &bfin_uart2_device, 876#endif 877#endif 878 879#if IS_ENABLED(CONFIG_SPI_BFIN5XX) 880 &bf538_spi_master0, 881 &bf538_spi_master1, 882 &bf538_spi_master2, 883#endif 884 885#if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI) 886 &i2c_bfin_twi0_device, 887 &i2c_bfin_twi1_device, 888#endif 889 890#if IS_ENABLED(CONFIG_BFIN_SIR) 891#ifdef CONFIG_BFIN_SIR0 892 &bfin_sir0_device, 893#endif 894#ifdef CONFIG_BFIN_SIR1 895 &bfin_sir1_device, 896#endif 897#ifdef CONFIG_BFIN_SIR2 898 &bfin_sir2_device, 899#endif 900#endif 901 902#if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT) 903#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 904 &bfin_sport0_uart_device, 905#endif 906#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 907 &bfin_sport1_uart_device, 908#endif 909#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART 910 &bfin_sport2_uart_device, 911#endif 912#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART 913 &bfin_sport3_uart_device, 914#endif 915#endif 916 917#if IS_ENABLED(CONFIG_CAN_BFIN) 918 &bfin_can_device, 919#endif 920 921#if IS_ENABLED(CONFIG_SMC91X) 922 &smc91x_device, 923#endif 924 925#if IS_ENABLED(CONFIG_FB_BFIN_LQ035Q1) 926 &bfin_lq035q1_device, 927#endif 928 929#if IS_ENABLED(CONFIG_KEYBOARD_GPIO) 930 &bfin_device_gpiokeys, 931#endif 932 933#if IS_ENABLED(CONFIG_MTD_PHYSMAP) 934 &ezkit_flash_device, 935#endif 936}; 937 938static int __init ezkit_init(void) 939{ 940 printk(KERN_INFO "%s(): registering device resources\n", __func__); 941 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices)); 942 943#if IS_ENABLED(CONFIG_SPI_BFIN5XX) 944 spi_register_board_info(bf538_spi_board_info, 945 ARRAY_SIZE(bf538_spi_board_info)); 946#endif 947 948 return 0; 949} 950 951arch_initcall(ezkit_init); 952 953static struct platform_device *ezkit_early_devices[] __initdata = { 954#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) 955#ifdef CONFIG_SERIAL_BFIN_UART0 956 &bfin_uart0_device, 957#endif 958#ifdef CONFIG_SERIAL_BFIN_UART1 959 &bfin_uart1_device, 960#endif 961#ifdef CONFIG_SERIAL_BFIN_UART2 962 &bfin_uart2_device, 963#endif 964#endif 965 966#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE) 967#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART 968 &bfin_sport0_uart_device, 969#endif 970#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART 971 &bfin_sport1_uart_device, 972#endif 973#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART 974 &bfin_sport2_uart_device, 975#endif 976#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART 977 &bfin_sport3_uart_device, 978#endif 979#endif 980}; 981 982void __init native_machine_early_platform_add_devices(void) 983{ 984 printk(KERN_INFO "register early platform devices\n"); 985 early_platform_add_devices(ezkit_early_devices, 986 ARRAY_SIZE(ezkit_early_devices)); 987} 988