1/* The pxa3xx skeleton simply augments the 2xx version */ 2#include "pxa2xx.dtsi" 3 4/ { 5 model = "Marvell PXA3xx familiy SoC"; 6 compatible = "marvell,pxa3xx"; 7 8 pxabus { 9 pdma: dma-controller@40000000 { 10 compatible = "marvell,pdma-1.0"; 11 reg = <0x40000000 0x10000>; 12 interrupts = <25>; 13 #dma-channels = <32>; 14 #dma-cells = <2>; 15 status = "okay"; 16 }; 17 18 pwri2c: i2c@40f500c0 { 19 compatible = "mrvl,pwri2c"; 20 reg = <0x40f500c0 0x30>; 21 interrupts = <6>; 22 clocks = <&clks CLK_PWRI2C>; 23 #address-cells = <0x1>; 24 #size-cells = <0>; 25 status = "disabled"; 26 }; 27 28 nand0: nand@43100000 { 29 compatible = "marvell,pxa3xx-nand"; 30 reg = <0x43100000 90>; 31 interrupts = <45>; 32 clocks = <&clks CLK_NAND>; 33 dmas = <&pdma 97 3>; 34 dma-names = "data"; 35 #address-cells = <1>; 36 #size-cells = <1>; 37 status = "disabled"; 38 }; 39 40 pxairq: interrupt-controller@40d00000 { 41 marvell,intc-priority; 42 marvell,intc-nr-irqs = <56>; 43 }; 44 45 gpio: gpio@40e00000 { 46 compatible = "intel,pxa3xx-gpio"; 47 reg = <0x40e00000 0x10000>; 48 clocks = <&clks CLK_GPIO>; 49 interrupt-names = "gpio0", "gpio1", "gpio_mux"; 50 interrupts = <8 9 10>; 51 gpio-controller; 52 #gpio-cells = <0x2>; 53 interrupt-controller; 54 #interrupt-cells = <0x2>; 55 }; 56 57 mmc0: mmc@41100000 { 58 compatible = "marvell,pxa-mmc"; 59 reg = <0x41100000 0x1000>; 60 interrupts = <23>; 61 clocks = <&clks CLK_MMC>; 62 dmas = <&pdma 21 3 63 &pdma 22 3>; 64 dma-names = "rx", "tx"; 65 status = "disabled"; 66 }; 67 68 mmc1: mmc@42000000 { 69 compatible = "marvell,pxa-mmc"; 70 reg = <0x42000000 0x1000>; 71 interrupts = <41>; 72 clocks = <&clks CLK_MMC1>; 73 dmas = <&pdma 93 3 74 &pdma 94 3>; 75 dma-names = "rx", "tx"; 76 status = "disabled"; 77 }; 78 79 mmc2: mmc@42500000 { 80 compatible = "marvell,pxa-mmc"; 81 reg = <0x42500000 0x1000>; 82 interrupts = <55>; 83 clocks = <&clks CLK_MMC2>; 84 dmas = <&pdma 46 3 85 &pdma 47 3>; 86 dma-names = "rx", "tx"; 87 status = "disabled"; 88 }; 89 90 pxa3xx_ohci: usb@4c000000 { 91 compatible = "marvell,pxa-ohci"; 92 reg = <0x4c000000 0x10000>; 93 interrupts = <3>; 94 clocks = <&clks CLK_USBHOST>; 95 status = "disabled"; 96 }; 97 }; 98 99 clocks { 100 /* 101 * The muxing of external clocks/internal dividers for osc* clock 102 * sources has been hidden under the carpet by now. 103 */ 104 #address-cells = <1>; 105 #size-cells = <1>; 106 ranges; 107 108 clks: pxa3xx_clks@41300004 { 109 compatible = "marvell,pxa300-clocks"; 110 #clock-cells = <1>; 111 status = "okay"; 112 }; 113 }; 114 115 timer@40a00000 { 116 compatible = "marvell,pxa-timer"; 117 reg = <0x40a00000 0x20>; 118 interrupts = <26>; 119 clocks = <&clks CLK_OSTIMER>; 120 status = "okay"; 121 }; 122}; 123