1/* 2 * Hardkernel Odroid XU3 board device tree source 3 * 4 * Copyright (c) 2014 Collabora Ltd. 5 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 6 * http://www.samsung.com 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11*/ 12 13#include <dt-bindings/clock/samsung,s2mps11.h> 14#include <dt-bindings/interrupt-controller/irq.h> 15#include <dt-bindings/gpio/gpio.h> 16#include <dt-bindings/sound/samsung-i2s.h> 17#include "exynos5800.dtsi" 18#include "exynos5422-cpus.dtsi" 19#include "exynos5422-cpu-thermal.dtsi" 20 21/ { 22 memory { 23 reg = <0x40000000 0x7EA00000>; 24 }; 25 26 chosen { 27 linux,stdout-path = &serial_2; 28 }; 29 30 firmware@02073000 { 31 compatible = "samsung,secure-firmware"; 32 reg = <0x02073000 0x1000>; 33 }; 34 35 fixed-rate-clocks { 36 oscclk { 37 compatible = "samsung,exynos5420-oscclk"; 38 clock-frequency = <24000000>; 39 }; 40 }; 41 42 emmc_pwrseq: pwrseq { 43 pinctrl-0 = <&emmc_nrst_pin>; 44 pinctrl-names = "default"; 45 compatible = "mmc-pwrseq-emmc"; 46 reset-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>; 47 }; 48 49 fan0: pwm-fan { 50 compatible = "pwm-fan"; 51 pwms = <&pwm 0 20972 0>; 52 cooling-min-state = <0>; 53 cooling-max-state = <3>; 54 #cooling-cells = <2>; 55 cooling-levels = <0 130 170 230>; 56 }; 57}; 58 59&clock_audss { 60 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, 61 <&clock_audss EXYNOS_MOUT_I2S>, 62 <&clock_audss EXYNOS_DOUT_AUD_BUS>; 63 assigned-clock-parents = <&clock CLK_FIN_PLL>, 64 <&clock_audss EXYNOS_MOUT_AUDSS>; 65 assigned-clock-rates = <0>, 66 <0>, 67 <19200000>; 68}; 69 70&fimd { 71 status = "okay"; 72}; 73 74 75&hdmi { 76 status = "okay"; 77 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>; 78 pinctrl-names = "default"; 79 pinctrl-0 = <&hdmi_hpd_irq>; 80 81 vdd_osc-supply = <&ldo7_reg>; 82 vdd_pll-supply = <&ldo6_reg>; 83 vdd-supply = <&ldo6_reg>; 84}; 85 86&hsi2c_4 { 87 status = "okay"; 88 89 s2mps11_pmic@66 { 90 compatible = "samsung,s2mps11-pmic"; 91 reg = <0x66>; 92 s2mps11,buck2-ramp-delay = <12>; 93 s2mps11,buck34-ramp-delay = <12>; 94 s2mps11,buck16-ramp-delay = <12>; 95 s2mps11,buck6-ramp-enable = <1>; 96 s2mps11,buck2-ramp-enable = <1>; 97 s2mps11,buck3-ramp-enable = <1>; 98 s2mps11,buck4-ramp-enable = <1>; 99 samsung,s2mps11-acokb-ground; 100 101 interrupt-parent = <&gpx0>; 102 interrupts = <4 IRQ_TYPE_EDGE_FALLING>; 103 pinctrl-names = "default"; 104 pinctrl-0 = <&s2mps11_irq>; 105 106 s2mps11_osc: clocks { 107 #clock-cells = <1>; 108 clock-output-names = "s2mps11_ap", 109 "s2mps11_cp", "s2mps11_bt"; 110 }; 111 112 regulators { 113 ldo1_reg: LDO1 { 114 regulator-name = "vdd_ldo1"; 115 regulator-min-microvolt = <1000000>; 116 regulator-max-microvolt = <1000000>; 117 regulator-always-on; 118 }; 119 120 ldo3_reg: LDO3 { 121 regulator-name = "vdd_ldo3"; 122 regulator-min-microvolt = <1800000>; 123 regulator-max-microvolt = <1800000>; 124 regulator-always-on; 125 }; 126 127 ldo5_reg: LDO5 { 128 regulator-name = "vdd_ldo5"; 129 regulator-min-microvolt = <1800000>; 130 regulator-max-microvolt = <1800000>; 131 regulator-always-on; 132 }; 133 134 ldo6_reg: LDO6 { 135 regulator-name = "vdd_ldo6"; 136 regulator-min-microvolt = <1000000>; 137 regulator-max-microvolt = <1000000>; 138 regulator-always-on; 139 }; 140 141 ldo7_reg: LDO7 { 142 regulator-name = "vdd_ldo7"; 143 regulator-min-microvolt = <1800000>; 144 regulator-max-microvolt = <1800000>; 145 regulator-always-on; 146 }; 147 148 ldo8_reg: LDO8 { 149 regulator-name = "vdd_ldo8"; 150 regulator-min-microvolt = <1800000>; 151 regulator-max-microvolt = <1800000>; 152 regulator-always-on; 153 }; 154 155 ldo9_reg: LDO9 { 156 regulator-name = "vdd_ldo9"; 157 regulator-min-microvolt = <3000000>; 158 regulator-max-microvolt = <3000000>; 159 regulator-always-on; 160 }; 161 162 ldo10_reg: LDO10 { 163 regulator-name = "vdd_ldo10"; 164 regulator-min-microvolt = <1800000>; 165 regulator-max-microvolt = <1800000>; 166 regulator-always-on; 167 }; 168 169 ldo11_reg: LDO11 { 170 regulator-name = "vdd_ldo11"; 171 regulator-min-microvolt = <1000000>; 172 regulator-max-microvolt = <1000000>; 173 regulator-always-on; 174 }; 175 176 ldo12_reg: LDO12 { 177 regulator-name = "vdd_ldo12"; 178 regulator-min-microvolt = <1800000>; 179 regulator-max-microvolt = <1800000>; 180 regulator-always-on; 181 }; 182 183 ldo13_reg: LDO13 { 184 regulator-name = "vdd_ldo13"; 185 regulator-min-microvolt = <2800000>; 186 regulator-max-microvolt = <2800000>; 187 regulator-always-on; 188 }; 189 190 ldo15_reg: LDO15 { 191 regulator-name = "vdd_ldo15"; 192 regulator-min-microvolt = <3100000>; 193 regulator-max-microvolt = <3100000>; 194 regulator-always-on; 195 }; 196 197 ldo16_reg: LDO16 { 198 regulator-name = "vdd_ldo16"; 199 regulator-min-microvolt = <2200000>; 200 regulator-max-microvolt = <2200000>; 201 regulator-always-on; 202 }; 203 204 ldo17_reg: LDO17 { 205 regulator-name = "tsp_avdd"; 206 regulator-min-microvolt = <3300000>; 207 regulator-max-microvolt = <3300000>; 208 regulator-always-on; 209 }; 210 211 ldo19_reg: LDO19 { 212 regulator-name = "vdd_sd"; 213 regulator-min-microvolt = <2800000>; 214 regulator-max-microvolt = <2800000>; 215 regulator-always-on; 216 }; 217 218 ldo24_reg: LDO24 { 219 regulator-name = "tsp_io"; 220 regulator-min-microvolt = <2800000>; 221 regulator-max-microvolt = <2800000>; 222 regulator-always-on; 223 }; 224 225 ldo26_reg: LDO26 { 226 regulator-name = "vdd_ldo26"; 227 regulator-min-microvolt = <3000000>; 228 regulator-max-microvolt = <3000000>; 229 regulator-always-on; 230 }; 231 232 buck1_reg: BUCK1 { 233 regulator-name = "vdd_mif"; 234 regulator-min-microvolt = <800000>; 235 regulator-max-microvolt = <1300000>; 236 regulator-always-on; 237 regulator-boot-on; 238 }; 239 240 buck2_reg: BUCK2 { 241 regulator-name = "vdd_arm"; 242 regulator-min-microvolt = <800000>; 243 regulator-max-microvolt = <1500000>; 244 regulator-always-on; 245 regulator-boot-on; 246 }; 247 248 buck3_reg: BUCK3 { 249 regulator-name = "vdd_int"; 250 regulator-min-microvolt = <800000>; 251 regulator-max-microvolt = <1400000>; 252 regulator-always-on; 253 regulator-boot-on; 254 }; 255 256 buck4_reg: BUCK4 { 257 regulator-name = "vdd_g3d"; 258 regulator-min-microvolt = <800000>; 259 regulator-max-microvolt = <1400000>; 260 regulator-always-on; 261 regulator-boot-on; 262 }; 263 264 buck5_reg: BUCK5 { 265 regulator-name = "vdd_mem"; 266 regulator-min-microvolt = <800000>; 267 regulator-max-microvolt = <1400000>; 268 regulator-always-on; 269 regulator-boot-on; 270 }; 271 272 buck6_reg: BUCK6 { 273 regulator-name = "vdd_kfc"; 274 regulator-min-microvolt = <800000>; 275 regulator-max-microvolt = <1500000>; 276 regulator-always-on; 277 regulator-boot-on; 278 }; 279 280 buck7_reg: BUCK7 { 281 regulator-name = "vdd_1.0v_ldo"; 282 regulator-min-microvolt = <800000>; 283 regulator-max-microvolt = <1500000>; 284 regulator-always-on; 285 regulator-boot-on; 286 }; 287 288 buck8_reg: BUCK8 { 289 regulator-name = "vdd_1.8v_ldo"; 290 regulator-min-microvolt = <800000>; 291 regulator-max-microvolt = <1500000>; 292 regulator-always-on; 293 regulator-boot-on; 294 }; 295 296 buck9_reg: BUCK9 { 297 regulator-name = "vdd_2.8v_ldo"; 298 regulator-min-microvolt = <3000000>; 299 regulator-max-microvolt = <3750000>; 300 regulator-always-on; 301 regulator-boot-on; 302 }; 303 304 buck10_reg: BUCK10 { 305 regulator-name = "vdd_vmem"; 306 regulator-min-microvolt = <2850000>; 307 regulator-max-microvolt = <2850000>; 308 regulator-always-on; 309 regulator-boot-on; 310 }; 311 }; 312 }; 313}; 314 315&i2c_2 { 316 samsung,i2c-sda-delay = <100>; 317 samsung,i2c-max-bus-freq = <66000>; 318 status = "okay"; 319 320 hdmiddc@50 { 321 compatible = "samsung,exynos4210-hdmiddc"; 322 reg = <0x50>; 323 }; 324}; 325 326&mfc { 327 samsung,mfc-r = <0x43000000 0x800000>; 328 samsung,mfc-l = <0x51000000 0x800000>; 329}; 330 331&mmc_0 { 332 status = "okay"; 333 mmc-pwrseq = <&emmc_pwrseq>; 334 cd-gpios = <&gpc0 2 GPIO_ACTIVE_LOW>; 335 card-detect-delay = <200>; 336 samsung,dw-mshc-ciu-div = <3>; 337 samsung,dw-mshc-sdr-timing = <0 4>; 338 samsung,dw-mshc-ddr-timing = <0 2>; 339 samsung,dw-mshc-hs400-timing = <0 2>; 340 samsung,read-strobe-delay = <90>; 341 pinctrl-names = "default"; 342 pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8 &sd0_cd &sd0_rclk>; 343 bus-width = <8>; 344 cap-mmc-highspeed; 345 mmc-hs200-1_8v; 346 mmc-hs400-1_8v; 347}; 348 349&mmc_2 { 350 status = "okay"; 351 card-detect-delay = <200>; 352 samsung,dw-mshc-ciu-div = <3>; 353 samsung,dw-mshc-sdr-timing = <0 4>; 354 samsung,dw-mshc-ddr-timing = <0 2>; 355 pinctrl-names = "default"; 356 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; 357 bus-width = <4>; 358 cap-sd-highspeed; 359}; 360 361&pinctrl_0 { 362 hdmi_hpd_irq: hdmi-hpd-irq { 363 samsung,pins = "gpx3-7"; 364 samsung,pin-function = <0>; 365 samsung,pin-pud = <1>; 366 samsung,pin-drv = <0>; 367 }; 368 369 s2mps11_irq: s2mps11-irq { 370 samsung,pins = "gpx0-4"; 371 samsung,pin-function = <0xf>; 372 samsung,pin-pud = <0>; 373 samsung,pin-drv = <0>; 374 }; 375}; 376 377&pinctrl_1 { 378 emmc_nrst_pin: emmc-nrst { 379 samsung,pins = "gpd1-0"; 380 samsung,pin-function = <0>; 381 samsung,pin-pud = <0>; 382 samsung,pin-drv = <0>; 383 }; 384}; 385 386&tmu_cpu0 { 387 vtmu-supply = <&ldo7_reg>; 388 status = "okay"; 389}; 390 391&tmu_cpu1 { 392 vtmu-supply = <&ldo7_reg>; 393 status = "okay"; 394}; 395 396&tmu_cpu2 { 397 vtmu-supply = <&ldo7_reg>; 398 status = "okay"; 399}; 400 401&tmu_cpu3 { 402 vtmu-supply = <&ldo7_reg>; 403 status = "okay"; 404}; 405 406&tmu_gpu { 407 vtmu-supply = <&ldo7_reg>; 408 status = "okay"; 409}; 410 411&rtc { 412 status = "okay"; 413 clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; 414 clock-names = "rtc", "rtc_src"; 415}; 416 417&usbdrd_dwc3_0 { 418 dr_mode = "host"; 419}; 420 421/* usbdrd_dwc3_1 mode customized in each board */ 422 423&usbdrd3_0 { 424 vdd33-supply = <&ldo9_reg>; 425 vdd10-supply = <&ldo11_reg>; 426}; 427 428&usbdrd3_1 { 429 vdd33-supply = <&ldo9_reg>; 430 vdd10-supply = <&ldo11_reg>; 431}; 432