1/* 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/* AM437x SK EVM */ 10 11/dts-v1/; 12 13#include "am4372.dtsi" 14#include <dt-bindings/pinctrl/am43xx.h> 15#include <dt-bindings/pwm/pwm.h> 16#include <dt-bindings/gpio/gpio.h> 17#include <dt-bindings/input/input.h> 18 19/ { 20 model = "TI AM437x SK EVM"; 21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; 22 23 aliases { 24 display0 = &lcd0; 25 }; 26 27 /* fixed 32k external oscillator clock */ 28 clk_32k_rtc: clk_32k_rtc { 29 #clock-cells = <0>; 30 compatible = "fixed-clock"; 31 clock-frequency = <32768>; 32 }; 33 34 backlight { 35 compatible = "pwm-backlight"; 36 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; 37 brightness-levels = <0 51 53 56 62 75 101 152 255>; 38 default-brightness-level = <8>; 39 }; 40 41 sound { 42 compatible = "simple-audio-card"; 43 simple-audio-card,name = "AM437x-SK-EVM"; 44 simple-audio-card,widgets = 45 "Headphone", "Headphone Jack", 46 "Line", "Line In"; 47 simple-audio-card,routing = 48 "Headphone Jack", "HPLOUT", 49 "Headphone Jack", "HPROUT", 50 "LINE1L", "Line In", 51 "LINE1R", "Line In"; 52 simple-audio-card,format = "dsp_b"; 53 simple-audio-card,bitclock-master = <&sound_master>; 54 simple-audio-card,frame-master = <&sound_master>; 55 simple-audio-card,bitclock-inversion; 56 57 simple-audio-card,cpu { 58 sound-dai = <&mcasp1>; 59 }; 60 61 sound_master: simple-audio-card,codec { 62 sound-dai = <&tlv320aic3106>; 63 system-clock-frequency = <24000000>; 64 }; 65 }; 66 67 matrix_keypad: matrix_keypad@0 { 68 compatible = "gpio-matrix-keypad"; 69 70 pinctrl-names = "default"; 71 pinctrl-0 = <&matrix_keypad_pins>; 72 73 debounce-delay-ms = <5>; 74 col-scan-delay-us = <5>; 75 76 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ 77 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ 78 79 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ 80 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ 81 82 linux,keymap = < 83 MATRIX_KEY(0, 0, KEY_DOWN) 84 MATRIX_KEY(0, 1, KEY_RIGHT) 85 MATRIX_KEY(1, 0, KEY_LEFT) 86 MATRIX_KEY(1, 1, KEY_UP) 87 >; 88 }; 89 90 leds { 91 compatible = "gpio-leds"; 92 93 pinctrl-names = "default"; 94 pinctrl-0 = <&leds_pins>; 95 96 led@0 { 97 label = "am437x-sk:red:heartbeat"; 98 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ 99 linux,default-trigger = "heartbeat"; 100 default-state = "off"; 101 }; 102 103 led@1 { 104 label = "am437x-sk:green:mmc1"; 105 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ 106 linux,default-trigger = "mmc0"; 107 default-state = "off"; 108 }; 109 110 led@2 { 111 label = "am437x-sk:blue:cpu0"; 112 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ 113 linux,default-trigger = "cpu0"; 114 default-state = "off"; 115 }; 116 117 led@3 { 118 label = "am437x-sk:blue:usr3"; 119 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ 120 default-state = "off"; 121 }; 122 }; 123 124 lcd0: display { 125 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; 126 label = "lcd"; 127 128 pinctrl-names = "default"; 129 pinctrl-0 = <&lcd_pins>; 130 131 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 132 133 panel-timing { 134 clock-frequency = <9000000>; 135 hactive = <480>; 136 vactive = <272>; 137 hfront-porch = <2>; 138 hback-porch = <2>; 139 hsync-len = <41>; 140 vfront-porch = <2>; 141 vback-porch = <2>; 142 vsync-len = <10>; 143 hsync-active = <0>; 144 vsync-active = <0>; 145 de-active = <1>; 146 pixelclk-active = <1>; 147 }; 148 149 port { 150 lcd_in: endpoint { 151 remote-endpoint = <&dpi_out>; 152 }; 153 }; 154 }; 155}; 156 157&am43xx_pinmux { 158 matrix_keypad_pins: matrix_keypad_pins { 159 pinctrl-single,pins = < 160 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ 161 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ 162 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ 163 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ 164 >; 165 }; 166 167 leds_pins: leds_pins { 168 pinctrl-single,pins = < 169 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ 170 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ 171 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ 172 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ 173 >; 174 }; 175 176 i2c0_pins: i2c0_pins { 177 pinctrl-single,pins = < 178 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 179 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 180 >; 181 }; 182 183 i2c1_pins: i2c1_pins { 184 pinctrl-single,pins = < 185 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ 186 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ 187 >; 188 }; 189 190 mmc1_pins: pinmux_mmc1_pins { 191 pinctrl-single,pins = < 192 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 193 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 194 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 195 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 196 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 197 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 198 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 199 >; 200 }; 201 202 ecap0_pins: backlight_pins { 203 pinctrl-single,pins = < 204 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ 205 >; 206 }; 207 208 edt_ft5306_ts_pins: edt_ft5306_ts_pins { 209 pinctrl-single,pins = < 210 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 211 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ 212 >; 213 }; 214 215 vpfe0_pins_default: vpfe0_pins_default { 216 pinctrl-single,pins = < 217 0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ 218 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ 219 0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/ 220 0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/ 221 0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ 222 0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ 223 0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ 224 0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ 225 0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ 226 0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ 227 0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ 228 0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ 229 0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ 230 0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ 231 0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ 232 >; 233 }; 234 235 vpfe0_pins_sleep: vpfe0_pins_sleep { 236 pinctrl-single,pins = < 237 0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 238 0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 239 0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 240 0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 241 0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 242 0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 243 0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 244 0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 245 0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 246 0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 247 0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 248 0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 249 0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 250 0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 251 0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 252 >; 253 }; 254 255 cpsw_default: cpsw_default { 256 pinctrl-single,pins = < 257 /* Slave 1 */ 258 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 259 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 260 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 261 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 262 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 263 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 264 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 265 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 266 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 267 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 268 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 269 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 270 271 /* Slave 2 */ 272 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 273 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 274 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 275 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 276 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 277 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 278 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 279 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ 280 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 281 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 282 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 283 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 284 >; 285 }; 286 287 cpsw_sleep: cpsw_sleep { 288 pinctrl-single,pins = < 289 /* Slave 1 reset value */ 290 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) 291 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 292 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 293 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 294 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) 295 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) 296 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) 297 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) 298 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 299 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 300 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) 301 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) 302 303 /* Slave 2 reset value */ 304 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) 305 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 306 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) 307 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) 308 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) 309 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) 310 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) 311 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) 312 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) 313 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) 314 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) 315 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) 316 >; 317 }; 318 319 davinci_mdio_default: davinci_mdio_default { 320 pinctrl-single,pins = < 321 /* MDIO */ 322 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 323 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ 324 >; 325 }; 326 327 davinci_mdio_sleep: davinci_mdio_sleep { 328 pinctrl-single,pins = < 329 /* MDIO reset value */ 330 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 331 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 332 >; 333 }; 334 335 dss_pins: dss_pins { 336 pinctrl-single,pins = < 337 0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ 338 0x024 (PIN_OUTPUT | MUX_MODE1) 339 0x028 (PIN_OUTPUT | MUX_MODE1) 340 0x02c (PIN_OUTPUT | MUX_MODE1) 341 0x030 (PIN_OUTPUT | MUX_MODE1) 342 0x034 (PIN_OUTPUT | MUX_MODE1) 343 0x038 (PIN_OUTPUT | MUX_MODE1) 344 0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ 345 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ 346 0x0a4 (PIN_OUTPUT | MUX_MODE0) 347 0x0a8 (PIN_OUTPUT | MUX_MODE0) 348 0x0ac (PIN_OUTPUT | MUX_MODE0) 349 0x0b0 (PIN_OUTPUT | MUX_MODE0) 350 0x0b4 (PIN_OUTPUT | MUX_MODE0) 351 0x0b8 (PIN_OUTPUT | MUX_MODE0) 352 0x0bc (PIN_OUTPUT | MUX_MODE0) 353 0x0c0 (PIN_OUTPUT | MUX_MODE0) 354 0x0c4 (PIN_OUTPUT | MUX_MODE0) 355 0x0c8 (PIN_OUTPUT | MUX_MODE0) 356 0x0cc (PIN_OUTPUT | MUX_MODE0) 357 0x0d0 (PIN_OUTPUT | MUX_MODE0) 358 0x0d4 (PIN_OUTPUT | MUX_MODE0) 359 0x0d8 (PIN_OUTPUT | MUX_MODE0) 360 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ 361 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ 362 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ 363 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ 364 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ 365 366 >; 367 }; 368 369 qspi_pins: qspi_pins { 370 pinctrl-single,pins = < 371 0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 372 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 373 0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 374 0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 375 0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 376 0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 377 >; 378 }; 379 380 mcasp1_pins: mcasp1_pins { 381 pinctrl-single,pins = < 382 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 383 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 384 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 385 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 386 >; 387 }; 388 389 mcasp1_pins_sleep: mcasp1_pins_sleep { 390 pinctrl-single,pins = < 391 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) 392 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) 393 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) 394 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) 395 >; 396 }; 397 398 lcd_pins: lcd_pins { 399 pinctrl-single,pins = < 400 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ 401 >; 402 }; 403 404 usb1_pins: usb1_pins { 405 pinctrl-single,pins = < 406 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 407 >; 408 }; 409 410 usb2_pins: usb2_pins { 411 pinctrl-single,pins = < 412 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 413 >; 414 }; 415}; 416 417&i2c0 { 418 status = "okay"; 419 pinctrl-names = "default"; 420 pinctrl-0 = <&i2c0_pins>; 421 clock-frequency = <400000>; 422 423 tps@24 { 424 compatible = "ti,tps65218"; 425 reg = <0x24>; 426 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 427 interrupt-controller; 428 #interrupt-cells = <2>; 429 430 dcdc1: regulator-dcdc1 { 431 compatible = "ti,tps65218-dcdc1"; 432 /* VDD_CORE limits min of OPP50 and max of OPP100 */ 433 regulator-name = "vdd_core"; 434 regulator-min-microvolt = <912000>; 435 regulator-max-microvolt = <1144000>; 436 regulator-boot-on; 437 regulator-always-on; 438 }; 439 440 dcdc2: regulator-dcdc2 { 441 compatible = "ti,tps65218-dcdc2"; 442 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 443 regulator-name = "vdd_mpu"; 444 regulator-min-microvolt = <912000>; 445 regulator-max-microvolt = <1378000>; 446 regulator-boot-on; 447 regulator-always-on; 448 }; 449 450 dcdc3: regulator-dcdc3 { 451 compatible = "ti,tps65218-dcdc3"; 452 regulator-name = "vdds_ddr"; 453 regulator-min-microvolt = <1500000>; 454 regulator-max-microvolt = <1500000>; 455 regulator-boot-on; 456 regulator-always-on; 457 }; 458 459 dcdc4: regulator-dcdc4 { 460 compatible = "ti,tps65218-dcdc4"; 461 regulator-name = "v3_3d"; 462 regulator-min-microvolt = <3300000>; 463 regulator-max-microvolt = <3300000>; 464 regulator-boot-on; 465 regulator-always-on; 466 }; 467 468 ldo1: regulator-ldo1 { 469 compatible = "ti,tps65218-ldo1"; 470 regulator-name = "v1_8d"; 471 regulator-min-microvolt = <1800000>; 472 regulator-max-microvolt = <1800000>; 473 regulator-boot-on; 474 regulator-always-on; 475 }; 476 477 power-button { 478 compatible = "ti,tps65218-pwrbutton"; 479 status = "okay"; 480 interrupts = <3 IRQ_TYPE_EDGE_BOTH>; 481 }; 482 }; 483 484 at24@50 { 485 compatible = "at24,24c256"; 486 pagesize = <64>; 487 reg = <0x50>; 488 }; 489}; 490 491&i2c1 { 492 status = "okay"; 493 pinctrl-names = "default"; 494 pinctrl-0 = <&i2c1_pins>; 495 clock-frequency = <400000>; 496 497 edt-ft5306@38 { 498 status = "okay"; 499 compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; 500 pinctrl-names = "default"; 501 pinctrl-0 = <&edt_ft5306_ts_pins>; 502 503 reg = <0x38>; 504 interrupt-parent = <&gpio0>; 505 interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 506 507 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; 508 509 touchscreen-size-x = <480>; 510 touchscreen-size-y = <272>; 511 }; 512 513 tlv320aic3106: tlv320aic3106@1b { 514 #sound-dai-cells = <0>; 515 compatible = "ti,tlv320aic3106"; 516 reg = <0x1b>; 517 status = "okay"; 518 519 /* Regulators */ 520 AVDD-supply = <&dcdc4>; 521 IOVDD-supply = <&dcdc4>; 522 DRVDD-supply = <&dcdc4>; 523 DVDD-supply = <&ldo1>; 524 }; 525 526 lis331dlh@18 { 527 compatible = "st,lis331dlh"; 528 reg = <0x18>; 529 status = "okay"; 530 531 Vdd-supply = <&dcdc4>; 532 Vdd_IO-supply = <&dcdc4>; 533 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; 534 }; 535}; 536 537&epwmss0 { 538 status = "okay"; 539}; 540 541&ecap0 { 542 status = "okay"; 543 pinctrl-names = "default"; 544 pinctrl-0 = <&ecap0_pins>; 545}; 546 547&gpio0 { 548 status = "okay"; 549}; 550 551&gpio1 { 552 status = "okay"; 553}; 554 555&gpio5 { 556 status = "okay"; 557}; 558 559&mmc1 { 560 status = "okay"; 561 pinctrl-names = "default"; 562 pinctrl-0 = <&mmc1_pins>; 563 564 vmmc-supply = <&dcdc4>; 565 bus-width = <4>; 566 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 567}; 568 569&usb2_phy1 { 570 status = "okay"; 571}; 572 573&usb1 { 574 dr_mode = "peripheral"; 575 status = "okay"; 576 pinctrl-names = "default"; 577 pinctrl-0 = <&usb1_pins>; 578}; 579 580&usb2_phy2 { 581 status = "okay"; 582}; 583 584&usb2 { 585 dr_mode = "host"; 586 status = "okay"; 587 pinctrl-names = "default"; 588 pinctrl-0 = <&usb2_pins>; 589}; 590 591&qspi { 592 status = "okay"; 593 pinctrl-names = "default"; 594 pinctrl-0 = <&qspi_pins>; 595 596 spi-max-frequency = <48000000>; 597 m25p80@0 { 598 compatible = "mx66l51235l"; 599 spi-max-frequency = <48000000>; 600 reg = <0>; 601 spi-cpol; 602 spi-cpha; 603 spi-tx-bus-width = <1>; 604 spi-rx-bus-width = <4>; 605 #address-cells = <1>; 606 #size-cells = <1>; 607 608 /* MTD partition table. 609 * The ROM checks the first 512KiB 610 * for a valid file to boot(XIP). 611 */ 612 partition@0 { 613 label = "QSPI.U_BOOT"; 614 reg = <0x00000000 0x000080000>; 615 }; 616 partition@1 { 617 label = "QSPI.U_BOOT.backup"; 618 reg = <0x00080000 0x00080000>; 619 }; 620 partition@2 { 621 label = "QSPI.U-BOOT-SPL_OS"; 622 reg = <0x00100000 0x00010000>; 623 }; 624 partition@3 { 625 label = "QSPI.U_BOOT_ENV"; 626 reg = <0x00110000 0x00010000>; 627 }; 628 partition@4 { 629 label = "QSPI.U-BOOT-ENV.backup"; 630 reg = <0x00120000 0x00010000>; 631 }; 632 partition@5 { 633 label = "QSPI.KERNEL"; 634 reg = <0x00130000 0x0800000>; 635 }; 636 partition@6 { 637 label = "QSPI.FILESYSTEM"; 638 reg = <0x00930000 0x36D0000>; 639 }; 640 }; 641}; 642 643&mac { 644 pinctrl-names = "default", "sleep"; 645 pinctrl-0 = <&cpsw_default>; 646 pinctrl-1 = <&cpsw_sleep>; 647 dual_emac = <1>; 648 status = "okay"; 649}; 650 651&davinci_mdio { 652 pinctrl-names = "default", "sleep"; 653 pinctrl-0 = <&davinci_mdio_default>; 654 pinctrl-1 = <&davinci_mdio_sleep>; 655 status = "okay"; 656}; 657 658&cpsw_emac0 { 659 phy_id = <&davinci_mdio>, <4>; 660 phy-mode = "rgmii"; 661 dual_emac_res_vlan = <1>; 662}; 663 664&cpsw_emac1 { 665 phy_id = <&davinci_mdio>, <5>; 666 phy-mode = "rgmii"; 667 dual_emac_res_vlan = <2>; 668}; 669 670&elm { 671 status = "okay"; 672}; 673 674&mcasp1 { 675 #sound-dai-cells = <0>; 676 pinctrl-names = "default", "sleep"; 677 pinctrl-0 = <&mcasp1_pins>; 678 pinctrl-1 = <&mcasp1_pins_sleep>; 679 680 status = "okay"; 681 682 op-mode = <0>; 683 tdm-slots = <2>; 684 serial-dir = < 685 0 0 1 2 686 >; 687 688 tx-num-evt = <1>; 689 rx-num-evt = <1>; 690}; 691 692&dss { 693 status = "okay"; 694 695 pinctrl-names = "default"; 696 pinctrl-0 = <&dss_pins>; 697 698 port { 699 dpi_out: endpoint@0 { 700 remote-endpoint = <&lcd_in>; 701 data-lines = <24>; 702 }; 703 }; 704}; 705 706&rtc { 707 clocks = <&clk_32k_rtc>, <&clk_32768_ck>; 708 clock-names = "ext-clk", "int-clk"; 709 status = "okay"; 710}; 711 712&wdt { 713 status = "okay"; 714}; 715 716&cpu { 717 cpu0-supply = <&dcdc2>; 718}; 719 720&vpfe0 { 721 status = "okay"; 722 pinctrl-names = "default", "sleep"; 723 pinctrl-0 = <&vpfe0_pins_default>; 724 pinctrl-1 = <&vpfe0_pins_sleep>; 725 726 /* Camera port */ 727 port { 728 vpfe0_ep: endpoint { 729 /* remote-endpoint = <&sensor>; add once we have it */ 730 ti,am437x-vpfe-interface = <0>; 731 bus-width = <8>; 732 hsync-active = <0>; 733 vsync-active = <0>; 734 }; 735 }; 736}; 737