1/* 2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/* 10 * AM335x Starter Kit 11 * http://www.ti.com/tool/tmdssk3358 12 */ 13 14/dts-v1/; 15 16#include "am33xx.dtsi" 17#include <dt-bindings/pwm/pwm.h> 18#include <dt-bindings/interrupt-controller/irq.h> 19 20/ { 21 model = "TI AM335x EVM-SK"; 22 compatible = "ti,am335x-evmsk", "ti,am33xx"; 23 24 cpus { 25 cpu@0 { 26 cpu0-supply = <&vdd1_reg>; 27 }; 28 }; 29 30 memory { 31 device_type = "memory"; 32 reg = <0x80000000 0x10000000>; /* 256 MB */ 33 }; 34 35 vbat: fixedregulator@0 { 36 compatible = "regulator-fixed"; 37 regulator-name = "vbat"; 38 regulator-min-microvolt = <5000000>; 39 regulator-max-microvolt = <5000000>; 40 regulator-boot-on; 41 }; 42 43 lis3_reg: fixedregulator@1 { 44 compatible = "regulator-fixed"; 45 regulator-name = "lis3_reg"; 46 regulator-boot-on; 47 }; 48 49 wl12xx_vmmc: fixedregulator@2 { 50 pinctrl-names = "default"; 51 pinctrl-0 = <&wl12xx_gpio>; 52 compatible = "regulator-fixed"; 53 regulator-name = "vwl1271"; 54 regulator-min-microvolt = <1800000>; 55 regulator-max-microvolt = <1800000>; 56 gpio = <&gpio1 29 0>; 57 startup-delay-us = <70000>; 58 enable-active-high; 59 }; 60 61 vtt_fixed: fixedregulator@3 { 62 compatible = "regulator-fixed"; 63 regulator-name = "vtt"; 64 regulator-min-microvolt = <1500000>; 65 regulator-max-microvolt = <1500000>; 66 gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>; 67 regulator-always-on; 68 regulator-boot-on; 69 enable-active-high; 70 }; 71 72 leds { 73 pinctrl-names = "default"; 74 pinctrl-0 = <&user_leds_s0>; 75 76 compatible = "gpio-leds"; 77 78 led@1 { 79 label = "evmsk:green:usr0"; 80 gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 81 default-state = "off"; 82 }; 83 84 led@2 { 85 label = "evmsk:green:usr1"; 86 gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 87 default-state = "off"; 88 }; 89 90 led@3 { 91 label = "evmsk:green:mmc0"; 92 gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 93 linux,default-trigger = "mmc0"; 94 default-state = "off"; 95 }; 96 97 led@4 { 98 label = "evmsk:green:heartbeat"; 99 gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 100 linux,default-trigger = "heartbeat"; 101 default-state = "off"; 102 }; 103 }; 104 105 gpio_buttons: gpio_buttons@0 { 106 compatible = "gpio-keys"; 107 #address-cells = <1>; 108 #size-cells = <0>; 109 110 switch@1 { 111 label = "button0"; 112 linux,code = <0x100>; 113 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; 114 }; 115 116 switch@2 { 117 label = "button1"; 118 linux,code = <0x101>; 119 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 120 }; 121 122 switch@3 { 123 label = "button2"; 124 linux,code = <0x102>; 125 gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; 126 gpio-key,wakeup; 127 }; 128 129 switch@4 { 130 label = "button3"; 131 linux,code = <0x103>; 132 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; 133 }; 134 }; 135 136 backlight { 137 compatible = "pwm-backlight"; 138 pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>; 139 brightness-levels = <0 58 61 66 75 90 125 170 255>; 140 default-brightness-level = <8>; 141 }; 142 143 sound { 144 compatible = "simple-audio-card"; 145 simple-audio-card,name = "AM335x-EVMSK"; 146 simple-audio-card,widgets = 147 "Headphone", "Headphone Jack"; 148 simple-audio-card,routing = 149 "Headphone Jack", "HPLOUT", 150 "Headphone Jack", "HPROUT"; 151 simple-audio-card,format = "dsp_b"; 152 simple-audio-card,bitclock-master = <&sound_master>; 153 simple-audio-card,frame-master = <&sound_master>; 154 simple-audio-card,bitclock-inversion; 155 156 simple-audio-card,cpu { 157 sound-dai = <&mcasp1>; 158 }; 159 160 sound_master: simple-audio-card,codec { 161 sound-dai = <&tlv320aic3106>; 162 system-clock-frequency = <24000000>; 163 }; 164 }; 165 166 panel { 167 compatible = "ti,tilcdc,panel"; 168 pinctrl-names = "default", "sleep"; 169 pinctrl-0 = <&lcd_pins_default>; 170 pinctrl-1 = <&lcd_pins_sleep>; 171 status = "okay"; 172 panel-info { 173 ac-bias = <255>; 174 ac-bias-intrpt = <0>; 175 dma-burst-sz = <16>; 176 bpp = <32>; 177 fdd = <0x80>; 178 sync-edge = <0>; 179 sync-ctrl = <1>; 180 raster-order = <0>; 181 fifo-th = <0>; 182 }; 183 display-timings { 184 480x272 { 185 hactive = <480>; 186 vactive = <272>; 187 hback-porch = <43>; 188 hfront-porch = <8>; 189 hsync-len = <4>; 190 vback-porch = <12>; 191 vfront-porch = <4>; 192 vsync-len = <10>; 193 clock-frequency = <9000000>; 194 hsync-active = <0>; 195 vsync-active = <0>; 196 }; 197 }; 198 }; 199}; 200 201&am33xx_pinmux { 202 pinctrl-names = "default"; 203 pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; 204 205 lcd_pins_default: lcd_pins_default { 206 pinctrl-single,pins = < 207 0x20 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad8.lcd_data23 */ 208 0x24 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad9.lcd_data22 */ 209 0x28 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad10.lcd_data21 */ 210 0x2c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad11.lcd_data20 */ 211 0x30 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad12.lcd_data19 */ 212 0x34 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad13.lcd_data18 */ 213 0x38 (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad14.lcd_data17 */ 214 0x3c (PIN_OUTPUT | MUX_MODE1) /* gpmc_ad15.lcd_data16 */ 215 0xa0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */ 216 0xa4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */ 217 0xa8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */ 218 0xac (PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */ 219 0xb0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */ 220 0xb4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */ 221 0xb8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */ 222 0xbc (PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */ 223 0xc0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */ 224 0xc4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */ 225 0xc8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */ 226 0xcc (PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */ 227 0xd0 (PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */ 228 0xd4 (PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */ 229 0xd8 (PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */ 230 0xdc (PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */ 231 0xe0 (PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */ 232 0xe4 (PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */ 233 0xe8 (PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */ 234 0xec (PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */ 235 >; 236 }; 237 238 lcd_pins_sleep: lcd_pins_sleep { 239 pinctrl-single,pins = < 240 0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data23 */ 241 0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data22 */ 242 0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data21 */ 243 0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data20 */ 244 0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data19 */ 245 0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data18 */ 246 0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data17 */ 247 0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data16 */ 248 0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */ 249 0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */ 250 0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */ 251 0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */ 252 0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */ 253 0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */ 254 0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */ 255 0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */ 256 0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */ 257 0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */ 258 0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */ 259 0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */ 260 0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */ 261 0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */ 262 0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */ 263 0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */ 264 0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync */ 265 0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */ 266 0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */ 267 0xec (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */ 268 >; 269 }; 270 271 272 user_leds_s0: user_leds_s0 { 273 pinctrl-single,pins = < 274 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ 275 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ 276 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ 277 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ 278 >; 279 }; 280 281 gpio_keys_s0: gpio_keys_s0 { 282 pinctrl-single,pins = < 283 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ 284 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ 285 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ 286 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ 287 >; 288 }; 289 290 i2c0_pins: pinmux_i2c0_pins { 291 pinctrl-single,pins = < 292 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 293 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 294 >; 295 }; 296 297 uart0_pins: pinmux_uart0_pins { 298 pinctrl-single,pins = < 299 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 300 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 301 >; 302 }; 303 304 clkout2_pin: pinmux_clkout2_pin { 305 pinctrl-single,pins = < 306 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ 307 >; 308 }; 309 310 ecap2_pins: backlight_pins { 311 pinctrl-single,pins = < 312 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ 313 >; 314 }; 315 316 cpsw_default: cpsw_default { 317 pinctrl-single,pins = < 318 /* Slave 1 */ 319 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 320 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 321 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ 322 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ 323 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 324 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 325 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ 326 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ 327 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ 328 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ 329 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 330 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 331 332 /* Slave 2 */ 333 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 334 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ 335 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 336 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 337 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 338 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 339 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 340 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 341 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 342 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 343 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 344 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 345 >; 346 }; 347 348 cpsw_sleep: cpsw_sleep { 349 pinctrl-single,pins = < 350 /* Slave 1 reset value */ 351 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 352 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) 353 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) 354 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) 355 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 356 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 357 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) 358 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) 359 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) 360 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) 361 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 362 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 363 364 /* Slave 2 reset value*/ 365 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 366 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) 367 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) 368 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) 369 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) 370 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) 371 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) 372 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) 373 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) 374 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) 375 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) 376 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) 377 >; 378 }; 379 380 davinci_mdio_default: davinci_mdio_default { 381 pinctrl-single,pins = < 382 /* MDIO */ 383 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 384 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 385 >; 386 }; 387 388 davinci_mdio_sleep: davinci_mdio_sleep { 389 pinctrl-single,pins = < 390 /* MDIO reset value */ 391 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 392 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 393 >; 394 }; 395 396 mmc1_pins: pinmux_mmc1_pins { 397 pinctrl-single,pins = < 398 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 399 >; 400 }; 401 402 mcasp1_pins: mcasp1_pins { 403 pinctrl-single,pins = < 404 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 405 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 406 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 407 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 408 >; 409 }; 410 411 mcasp1_pins_sleep: mcasp1_pins_sleep { 412 pinctrl-single,pins = < 413 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) 414 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) 415 0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7) 416 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) 417 >; 418 }; 419 420 mmc2_pins: pinmux_mmc2_pins { 421 pinctrl-single,pins = < 422 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 423 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 424 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 425 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 426 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 427 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 428 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 429 >; 430 }; 431 432 wl12xx_gpio: pinmux_wl12xx_gpio { 433 pinctrl-single,pins = < 434 0x7c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */ 435 >; 436 }; 437}; 438 439&uart0 { 440 pinctrl-names = "default"; 441 pinctrl-0 = <&uart0_pins>; 442 443 status = "okay"; 444}; 445 446&i2c0 { 447 pinctrl-names = "default"; 448 pinctrl-0 = <&i2c0_pins>; 449 450 status = "okay"; 451 clock-frequency = <400000>; 452 453 tps: tps@2d { 454 reg = <0x2d>; 455 }; 456 457 lis331dlh: lis331dlh@18 { 458 compatible = "st,lis331dlh", "st,lis3lv02d"; 459 reg = <0x18>; 460 Vdd-supply = <&lis3_reg>; 461 Vdd_IO-supply = <&lis3_reg>; 462 463 st,click-single-x; 464 st,click-single-y; 465 st,click-single-z; 466 st,click-thresh-x = <10>; 467 st,click-thresh-y = <10>; 468 st,click-thresh-z = <10>; 469 st,irq1-click; 470 st,irq2-click; 471 st,wakeup-x-lo; 472 st,wakeup-x-hi; 473 st,wakeup-y-lo; 474 st,wakeup-y-hi; 475 st,wakeup-z-lo; 476 st,wakeup-z-hi; 477 st,min-limit-x = <120>; 478 st,min-limit-y = <120>; 479 st,min-limit-z = <140>; 480 st,max-limit-x = <550>; 481 st,max-limit-y = <550>; 482 st,max-limit-z = <750>; 483 }; 484 485 tlv320aic3106: tlv320aic3106@1b { 486 #sound-dai-cells = <0>; 487 compatible = "ti,tlv320aic3106"; 488 reg = <0x1b>; 489 status = "okay"; 490 491 /* Regulators */ 492 AVDD-supply = <&vaux2_reg>; 493 IOVDD-supply = <&vaux2_reg>; 494 DRVDD-supply = <&vaux2_reg>; 495 DVDD-supply = <&vbat>; 496 }; 497}; 498 499&usb { 500 status = "okay"; 501}; 502 503&usb_ctrl_mod { 504 status = "okay"; 505}; 506 507&usb0_phy { 508 status = "okay"; 509}; 510 511&usb1_phy { 512 status = "okay"; 513}; 514 515&usb0 { 516 status = "okay"; 517}; 518 519&usb1 { 520 status = "okay"; 521 dr_mode = "host"; 522}; 523 524&cppi41dma { 525 status = "okay"; 526}; 527 528&epwmss2 { 529 status = "okay"; 530 531 ecap2: ecap@48304100 { 532 status = "okay"; 533 pinctrl-names = "default"; 534 pinctrl-0 = <&ecap2_pins>; 535 }; 536}; 537 538#include "tps65910.dtsi" 539 540&tps { 541 vcc1-supply = <&vbat>; 542 vcc2-supply = <&vbat>; 543 vcc3-supply = <&vbat>; 544 vcc4-supply = <&vbat>; 545 vcc5-supply = <&vbat>; 546 vcc6-supply = <&vbat>; 547 vcc7-supply = <&vbat>; 548 vccio-supply = <&vbat>; 549 550 regulators { 551 vrtc_reg: regulator@0 { 552 regulator-always-on; 553 }; 554 555 vio_reg: regulator@1 { 556 regulator-always-on; 557 }; 558 559 vdd1_reg: regulator@2 { 560 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 561 regulator-name = "vdd_mpu"; 562 regulator-min-microvolt = <912500>; 563 regulator-max-microvolt = <1312500>; 564 regulator-boot-on; 565 regulator-always-on; 566 }; 567 568 vdd2_reg: regulator@3 { 569 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 570 regulator-name = "vdd_core"; 571 regulator-min-microvolt = <912500>; 572 regulator-max-microvolt = <1150000>; 573 regulator-boot-on; 574 regulator-always-on; 575 }; 576 577 vdd3_reg: regulator@4 { 578 regulator-always-on; 579 }; 580 581 vdig1_reg: regulator@5 { 582 regulator-always-on; 583 }; 584 585 vdig2_reg: regulator@6 { 586 regulator-always-on; 587 }; 588 589 vpll_reg: regulator@7 { 590 regulator-always-on; 591 }; 592 593 vdac_reg: regulator@8 { 594 regulator-always-on; 595 }; 596 597 vaux1_reg: regulator@9 { 598 regulator-always-on; 599 }; 600 601 vaux2_reg: regulator@10 { 602 regulator-always-on; 603 }; 604 605 vaux33_reg: regulator@11 { 606 regulator-always-on; 607 }; 608 609 vmmc_reg: regulator@12 { 610 regulator-min-microvolt = <1800000>; 611 regulator-max-microvolt = <3300000>; 612 regulator-always-on; 613 }; 614 }; 615}; 616 617&mac { 618 pinctrl-names = "default", "sleep"; 619 pinctrl-0 = <&cpsw_default>; 620 pinctrl-1 = <&cpsw_sleep>; 621 dual_emac = <1>; 622 status = "okay"; 623}; 624 625&davinci_mdio { 626 pinctrl-names = "default", "sleep"; 627 pinctrl-0 = <&davinci_mdio_default>; 628 pinctrl-1 = <&davinci_mdio_sleep>; 629 status = "okay"; 630}; 631 632&cpsw_emac0 { 633 phy_id = <&davinci_mdio>, <0>; 634 phy-mode = "rgmii-txid"; 635 dual_emac_res_vlan = <1>; 636}; 637 638&cpsw_emac1 { 639 phy_id = <&davinci_mdio>, <1>; 640 phy-mode = "rgmii-txid"; 641 dual_emac_res_vlan = <2>; 642}; 643 644&mmc1 { 645 status = "okay"; 646 vmmc-supply = <&vmmc_reg>; 647 bus-width = <4>; 648 pinctrl-names = "default"; 649 pinctrl-0 = <&mmc1_pins>; 650 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 651}; 652 653&sham { 654 status = "okay"; 655}; 656 657&aes { 658 status = "okay"; 659}; 660 661&gpio0 { 662 ti,no-reset-on-init; 663}; 664 665&mmc2 { 666 status = "okay"; 667 vmmc-supply = <&wl12xx_vmmc>; 668 ti,non-removable; 669 bus-width = <4>; 670 cap-power-off-card; 671 pinctrl-names = "default"; 672 pinctrl-0 = <&mmc2_pins>; 673 674 #address-cells = <1>; 675 #size-cells = <0>; 676 wlcore: wlcore@2 { 677 compatible = "ti,wl1271"; 678 reg = <2>; 679 interrupt-parent = <&gpio0>; 680 interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */ 681 ref-clock-frequency = <38400000>; 682 }; 683}; 684 685&mcasp1 { 686 #sound-dai-cells = <0>; 687 pinctrl-names = "default", "sleep"; 688 pinctrl-0 = <&mcasp1_pins>; 689 pinctrl-1 = <&mcasp1_pins_sleep>; 690 691 status = "okay"; 692 693 op-mode = <0>; /* MCASP_IIS_MODE */ 694 tdm-slots = <2>; 695 /* 4 serializers */ 696 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 697 0 0 1 2 698 >; 699 tx-num-evt = <32>; 700 rx-num-evt = <32>; 701}; 702 703&tscadc { 704 status = "okay"; 705 tsc { 706 ti,wires = <4>; 707 ti,x-plate-resistance = <200>; 708 ti,coordinate-readouts = <5>; 709 ti,wire-config = <0x00 0x11 0x22 0x33>; 710 }; 711}; 712 713&lcdc { 714 status = "okay"; 715}; 716