1
2-------
3PHY Abstraction Layer
4(Updated 2008-04-08)
5
6Purpose
7
8 Most network devices consist of set of registers which provide an interface
9 to a MAC layer, which communicates with the physical connection through a
10 PHY.  The PHY concerns itself with negotiating link parameters with the link
11 partner on the other side of the network connection (typically, an ethernet
12 cable), and provides a register interface to allow drivers to determine what
13 settings were chosen, and to configure what settings are allowed.
14
15 While these devices are distinct from the network devices, and conform to a
16 standard layout for the registers, it has been common practice to integrate
17 the PHY management code with the network driver.  This has resulted in large
18 amounts of redundant code.  Also, on embedded systems with multiple (and
19 sometimes quite different) ethernet controllers connected to the same 
20 management bus, it is difficult to ensure safe use of the bus.
21
22 Since the PHYs are devices, and the management busses through which they are
23 accessed are, in fact, busses, the PHY Abstraction Layer treats them as such.
24 In doing so, it has these goals:
25
26   1) Increase code-reuse
27   2) Increase overall code-maintainability
28   3) Speed development time for new network drivers, and for new systems
29 
30 Basically, this layer is meant to provide an interface to PHY devices which
31 allows network driver writers to write as little code as possible, while
32 still providing a full feature set.
33
34The MDIO bus
35
36 Most network devices are connected to a PHY by means of a management bus.
37 Different devices use different busses (though some share common interfaces).
38 In order to take advantage of the PAL, each bus interface needs to be
39 registered as a distinct device.
40
41 1) read and write functions must be implemented.  Their prototypes are:
42
43     int write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
44     int read(struct mii_bus *bus, int mii_id, int regnum);
45
46   mii_id is the address on the bus for the PHY, and regnum is the register
47   number.  These functions are guaranteed not to be called from interrupt
48   time, so it is safe for them to block, waiting for an interrupt to signal
49   the operation is complete
50 
51 2) A reset function is optional.  This is used to return the bus to an
52   initialized state.
53
54 3) A probe function is needed.  This function should set up anything the bus
55   driver needs, setup the mii_bus structure, and register with the PAL using
56   mdiobus_register.  Similarly, there's a remove function to undo all of
57   that (use mdiobus_unregister).
58 
59 4) Like any driver, the device_driver structure must be configured, and init
60   exit functions are used to register the driver.
61
62 5) The bus must also be declared somewhere as a device, and registered.
63
64 As an example for how one driver implemented an mdio bus driver, see
65 drivers/net/ethernet/freescale/fsl_pq_mdio.c and an associated DTS file
66 for one of the users. (e.g. "git grep fsl,.*-mdio arch/powerpc/boot/dts/")
67
68Connecting to a PHY
69
70 Sometime during startup, the network driver needs to establish a connection
71 between the PHY device, and the network device.  At this time, the PHY's bus
72 and drivers need to all have been loaded, so it is ready for the connection.
73 At this point, there are several ways to connect to the PHY:
74
75 1) The PAL handles everything, and only calls the network driver when
76   the link state changes, so it can react.
77
78 2) The PAL handles everything except interrupts (usually because the
79   controller has the interrupt registers).
80
81 3) The PAL handles everything, but checks in with the driver every second,
82   allowing the network driver to react first to any changes before the PAL
83   does.
84 
85 4) The PAL serves only as a library of functions, with the network device
86   manually calling functions to update status, and configure the PHY
87
88
89Letting the PHY Abstraction Layer do Everything
90
91 If you choose option 1 (The hope is that every driver can, but to still be
92 useful to drivers that can't), connecting to the PHY is simple:
93
94 First, you need a function to react to changes in the link state.  This
95 function follows this protocol:
96
97   static void adjust_link(struct net_device *dev);
98 
99 Next, you need to know the device name of the PHY connected to this device. 
100 The name will look something like, "0:00", where the first number is the
101 bus id, and the second is the PHY's address on that bus.  Typically,
102 the bus is responsible for making its ID unique.
103 
104 Now, to connect, just call this function:
105 
106   phydev = phy_connect(dev, phy_name, &adjust_link, interface);
107
108 phydev is a pointer to the phy_device structure which represents the PHY.  If
109 phy_connect is successful, it will return the pointer.  dev, here, is the
110 pointer to your net_device.  Once done, this function will have started the
111 PHY's software state machine, and registered for the PHY's interrupt, if it
112 has one.  The phydev structure will be populated with information about the
113 current state, though the PHY will not yet be truly operational at this
114 point.
115
116 PHY-specific flags should be set in phydev->dev_flags prior to the call
117 to phy_connect() such that the underlying PHY driver can check for flags
118 and perform specific operations based on them.
119 This is useful if the system has put hardware restrictions on
120 the PHY/controller, of which the PHY needs to be aware.
121
122 interface is a u32 which specifies the connection type used
123 between the controller and the PHY.  Examples are GMII, MII,
124 RGMII, and SGMII.  For a full list, see include/linux/phy.h
125
126 Now just make sure that phydev->supported and phydev->advertising have any
127 values pruned from them which don't make sense for your controller (a 10/100
128 controller may be connected to a gigabit capable PHY, so you would need to
129 mask off SUPPORTED_1000baseT*).  See include/linux/ethtool.h for definitions
130 for these bitfields. Note that you should not SET any bits, or the PHY may
131 get put into an unsupported state.
132
133 Lastly, once the controller is ready to handle network traffic, you call
134 phy_start(phydev).  This tells the PAL that you are ready, and configures the
135 PHY to connect to the network.  If you want to handle your own interrupts,
136 just set phydev->irq to PHY_IGNORE_INTERRUPT before you call phy_start.
137 Similarly, if you don't want to use interrupts, set phydev->irq to PHY_POLL.
138
139 When you want to disconnect from the network (even if just briefly), you call
140 phy_stop(phydev).
141
142Keeping Close Tabs on the PAL
143
144 It is possible that the PAL's built-in state machine needs a little help to
145 keep your network device and the PHY properly in sync.  If so, you can
146 register a helper function when connecting to the PHY, which will be called
147 every second before the state machine reacts to any changes.  To do this, you
148 need to manually call phy_attach() and phy_prepare_link(), and then call
149 phy_start_machine() with the second argument set to point to your special
150 handler.
151
152 Currently there are no examples of how to use this functionality, and testing
153 on it has been limited because the author does not have any drivers which use
154 it (they all use option 1).  So Caveat Emptor.
155
156Doing it all yourself
157
158 There's a remote chance that the PAL's built-in state machine cannot track
159 the complex interactions between the PHY and your network device.  If this is
160 so, you can simply call phy_attach(), and not call phy_start_machine or
161 phy_prepare_link().  This will mean that phydev->state is entirely yours to
162 handle (phy_start and phy_stop toggle between some of the states, so you
163 might need to avoid them).
164
165 An effort has been made to make sure that useful functionality can be
166 accessed without the state-machine running, and most of these functions are
167 descended from functions which did not interact with a complex state-machine.
168 However, again, no effort has been made so far to test running without the
169 state machine, so tryer beware.
170
171 Here is a brief rundown of the functions:
172
173 int phy_read(struct phy_device *phydev, u16 regnum);
174 int phy_write(struct phy_device *phydev, u16 regnum, u16 val);
175
176   Simple read/write primitives.  They invoke the bus's read/write function
177   pointers.
178
179 void phy_print_status(struct phy_device *phydev);
180 
181   A convenience function to print out the PHY status neatly.
182
183 int phy_start_interrupts(struct phy_device *phydev);
184 int phy_stop_interrupts(struct phy_device *phydev);
185
186   Requests the IRQ for the PHY interrupts, then enables them for
187   start, or disables then frees them for stop.
188
189 struct phy_device * phy_attach(struct net_device *dev, const char *phy_id,
190		 phy_interface_t interface);
191
192   Attaches a network device to a particular PHY, binding the PHY to a generic
193   driver if none was found during bus initialization.
194
195 int phy_start_aneg(struct phy_device *phydev);
196   
197   Using variables inside the phydev structure, either configures advertising
198   and resets autonegotiation, or disables autonegotiation, and configures
199   forced settings.
200
201 static inline int phy_read_status(struct phy_device *phydev);
202
203   Fills the phydev structure with up-to-date information about the current
204   settings in the PHY.
205
206 int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
207 int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
208
209   Ethtool convenience functions.
210
211 int phy_mii_ioctl(struct phy_device *phydev,
212                 struct mii_ioctl_data *mii_data, int cmd);
213
214   The MII ioctl.  Note that this function will completely screw up the state
215   machine if you write registers like BMCR, BMSR, ADVERTISE, etc.  Best to
216   use this only to write registers which are not standard, and don't set off
217   a renegotiation.
218
219
220PHY Device Drivers
221
222 With the PHY Abstraction Layer, adding support for new PHYs is
223 quite easy.  In some cases, no work is required at all!  However,
224 many PHYs require a little hand-holding to get up-and-running.
225
226Generic PHY driver
227
228 If the desired PHY doesn't have any errata, quirks, or special
229 features you want to support, then it may be best to not add
230 support, and let the PHY Abstraction Layer's Generic PHY Driver
231 do all of the work.  
232
233Writing a PHY driver
234
235 If you do need to write a PHY driver, the first thing to do is
236 make sure it can be matched with an appropriate PHY device.
237 This is done during bus initialization by reading the device's
238 UID (stored in registers 2 and 3), then comparing it to each
239 driver's phy_id field by ANDing it with each driver's
240 phy_id_mask field.  Also, it needs a name.  Here's an example:
241
242   static struct phy_driver dm9161_driver = {
243         .phy_id         = 0x0181b880,
244	 .name           = "Davicom DM9161E",
245	 .phy_id_mask    = 0x0ffffff0,
246	 ...
247   }
248
249 Next, you need to specify what features (speed, duplex, autoneg,
250 etc) your PHY device and driver support.  Most PHYs support
251 PHY_BASIC_FEATURES, but you can look in include/mii.h for other
252 features.
253
254 Each driver consists of a number of function pointers:
255
256   soft_reset: perform a PHY software reset
257   config_init: configures PHY into a sane state after a reset.
258     For instance, a Davicom PHY requires descrambling disabled.
259   probe: Allocate phy->priv, optionally refuse to bind.
260   PHY may not have been reset or had fixups run yet.
261   suspend/resume: power management
262   config_aneg: Changes the speed/duplex/negotiation settings
263   aneg_done: Determines the auto-negotiation result
264   read_status: Reads the current speed/duplex/negotiation settings
265   ack_interrupt: Clear a pending interrupt
266   did_interrupt: Checks if the PHY generated an interrupt
267   config_intr: Enable or disable interrupts
268   remove: Does any driver take-down
269   ts_info: Queries about the HW timestamping status
270   hwtstamp: Set the PHY HW timestamping configuration
271   rxtstamp: Requests a receive timestamp at the PHY level for a 'skb'
272   txtsamp: Requests a transmit timestamp at the PHY level for a 'skb'
273   set_wol: Enable Wake-on-LAN at the PHY level
274   get_wol: Get the Wake-on-LAN status at the PHY level
275   read_mmd_indirect: Read PHY MMD indirect register
276   write_mmd_indirect: Write PHY MMD indirect register
277
278 Of these, only config_aneg and read_status are required to be
279 assigned by the driver code.  The rest are optional.  Also, it is
280 preferred to use the generic phy driver's versions of these two
281 functions if at all possible: genphy_read_status and
282 genphy_config_aneg.  If this is not possible, it is likely that
283 you only need to perform some actions before and after invoking
284 these functions, and so your functions will wrap the generic
285 ones.
286
287 Feel free to look at the Marvell, Cicada, and Davicom drivers in
288 drivers/net/phy/ for examples (the lxt and qsemi drivers have
289 not been tested as of this writing).
290
291 The PHY's MMD register accesses are handled by the PAL framework
292 by default, but can be overridden by a specific PHY driver if
293 required. This could be the case if a PHY was released for
294 manufacturing before the MMD PHY register definitions were
295 standardized by the IEEE. Most modern PHYs will be able to use
296 the generic PAL framework for accessing the PHY's MMD registers.
297 An example of such usage is for Energy Efficient Ethernet support,
298 implemented in the PAL. This support uses the PAL to access MMD
299 registers for EEE query and configuration if the PHY supports
300 the IEEE standard access mechanisms, or can use the PHY's specific
301 access interfaces if overridden by the specific PHY driver. See
302 the Micrel driver in drivers/net/phy/ for an example of how this
303 can be implemented.
304
305Board Fixups
306
307 Sometimes the specific interaction between the platform and the PHY requires
308 special handling.  For instance, to change where the PHY's clock input is,
309 or to add a delay to account for latency issues in the data path.  In order
310 to support such contingencies, the PHY Layer allows platform code to register
311 fixups to be run when the PHY is brought up (or subsequently reset).
312
313 When the PHY Layer brings up a PHY it checks to see if there are any fixups
314 registered for it, matching based on UID (contained in the PHY device's phy_id
315 field) and the bus identifier (contained in phydev->dev.bus_id).  Both must
316 match, however two constants, PHY_ANY_ID and PHY_ANY_UID, are provided as
317 wildcards for the bus ID and UID, respectively.
318
319 When a match is found, the PHY layer will invoke the run function associated
320 with the fixup.  This function is passed a pointer to the phy_device of
321 interest.  It should therefore only operate on that PHY.
322
323 The platform code can either register the fixup using phy_register_fixup():
324
325	int phy_register_fixup(const char *phy_id,
326		u32 phy_uid, u32 phy_uid_mask,
327		int (*run)(struct phy_device *));
328
329 Or using one of the two stubs, phy_register_fixup_for_uid() and
330 phy_register_fixup_for_id():
331
332 int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
333		int (*run)(struct phy_device *));
334 int phy_register_fixup_for_id(const char *phy_id,
335		int (*run)(struct phy_device *));
336
337 The stubs set one of the two matching criteria, and set the other one to
338 match anything.
339
340