1Cadence TTC - Triple Timer Counter
2
3Required properties:
4- compatible : Should be "cdns,ttc".
5- reg : Specifies base physical address and size of the registers.
6- interrupts : A list of 3 interrupts; one per timer channel.
7- clocks: phandle to the source clock
8
9Optional properties:
10- timer-width: Bit width of the timer, necessary if not 16.
11
12Example:
13
14ttc0: ttc0@f8001000 {
15	interrupt-parent = <&intc>;
16	interrupts = < 0 10 4 0 11 4 0 12 4 >;
17	compatible = "cdns,ttc";
18	reg = <0xF8001000 0x1000>;
19	clocks = <&cpu_clk 3>;
20	timer-width = <32>;
21};
22