1
2* Samsung Exynos PPMU (Platform Performance Monitoring Unit) device
3
4The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for
5each IP. PPMU provides the primitive values to get performance data. These
6PPMU events provide information of the SoC's behaviors so that you may
7use to analyze system performance, to make behaviors visible and to count
8usages of each IP (DMC, CPU, RIGHTBUS, LEFTBUS, CAM interface, LCD, G3D, MFC).
9The Exynos PPMU driver uses the devfreq-event class to provide event data
10to various devfreq devices. The devfreq devices would use the event data when
11derterming the current state of each IP.
12
13Required properties:
14- compatible: Should be "samsung,exynos-ppmu" or "samsung,exynos-ppmu-v2.
15- reg: physical base address of each PPMU and length of memory mapped region.
16
17Optional properties:
18- clock-names : the name of clock used by the PPMU, "ppmu"
19- clocks : phandles for clock specified in "clock-names" property
20
21Example1 : PPMUv1 nodes in exynos3250.dtsi are listed below.
22
23		ppmu_dmc0: ppmu_dmc0@106a0000 {
24			compatible = "samsung,exynos-ppmu";
25			reg = <0x106a0000 0x2000>;
26			status = "disabled";
27		};
28
29		ppmu_dmc1: ppmu_dmc1@106b0000 {
30			compatible = "samsung,exynos-ppmu";
31			reg = <0x106b0000 0x2000>;
32			status = "disabled";
33		};
34
35		ppmu_cpu: ppmu_cpu@106c0000 {
36			compatible = "samsung,exynos-ppmu";
37			reg = <0x106c0000 0x2000>;
38			status = "disabled";
39		};
40
41		ppmu_rightbus: ppmu_rightbus@112a0000 {
42			compatible = "samsung,exynos-ppmu";
43			reg = <0x112a0000 0x2000>;
44			clocks = <&cmu CLK_PPMURIGHT>;
45			clock-names = "ppmu";
46			status = "disabled";
47		};
48
49		ppmu_leftbus: ppmu_leftbus0@116a0000 {
50			compatible = "samsung,exynos-ppmu";
51			reg = <0x116a0000 0x2000>;
52			clocks = <&cmu CLK_PPMULEFT>;
53			clock-names = "ppmu";
54			status = "disabled";
55		};
56
57Example2 : Events of each PPMU node in exynos3250-rinato.dts are listed below.
58
59	&ppmu_dmc0 {
60		status = "okay";
61
62		events {
63			ppmu_dmc0_3: ppmu-event3-dmc0 {
64				event-name = "ppmu-event3-dmc0";
65			};
66
67			ppmu_dmc0_2: ppmu-event2-dmc0 {
68				event-name = "ppmu-event2-dmc0";
69			};
70
71			ppmu_dmc0_1: ppmu-event1-dmc0 {
72				event-name = "ppmu-event1-dmc0";
73			};
74
75			ppmu_dmc0_0: ppmu-event0-dmc0 {
76				event-name = "ppmu-event0-dmc0";
77			};
78		};
79	};
80
81	&ppmu_dmc1 {
82		status = "okay";
83
84		events {
85			ppmu_dmc1_3: ppmu-event3-dmc1 {
86				event-name = "ppmu-event3-dmc1";
87			};
88		};
89	};
90
91	&ppmu_leftbus {
92		status = "okay";
93
94		events {
95			ppmu_leftbus_3: ppmu-event3-leftbus {
96				event-name = "ppmu-event3-leftbus";
97			};
98		};
99	};
100
101	&ppmu_rightbus {
102		status = "okay";
103
104		events {
105			ppmu_rightbus_3: ppmu-event3-rightbus {
106				event-name = "ppmu-event3-rightbus";
107			};
108		};
109	};
110
111Example3 : PPMUv2 nodes in exynos5433.dtsi are listed below.
112
113		ppmu_d0_cpu: ppmu_d0_cpu@10480000 {
114			compatible = "samsung,exynos-ppmu-v2";
115			reg = <0x10480000 0x2000>;
116			status = "disabled";
117		};
118
119		ppmu_d0_general: ppmu_d0_general@10490000 {
120			compatible = "samsung,exynos-ppmu-v2";
121			reg = <0x10490000 0x2000>;
122			status = "disabled";
123		};
124
125		ppmu_d0_rt: ppmu_d0_rt@104a0000 {
126			compatible = "samsung,exynos-ppmu-v2";
127			reg = <0x104a0000 0x2000>;
128			status = "disabled";
129		};
130
131		ppmu_d1_cpu: ppmu_d1_cpu@104b0000 {
132			compatible = "samsung,exynos-ppmu-v2";
133			reg = <0x104b0000 0x2000>;
134			status = "disabled";
135		};
136
137		ppmu_d1_general: ppmu_d1_general@104c0000 {
138			compatible = "samsung,exynos-ppmu-v2";
139			reg = <0x104c0000 0x2000>;
140			status = "disabled";
141		};
142
143		ppmu_d1_rt: ppmu_d1_rt@104d0000 {
144			compatible = "samsung,exynos-ppmu-v2";
145			reg = <0x104d0000 0x2000>;
146			status = "disabled";
147		};
148