1* Renesas Clock Pulse Generator / Module Standby and Software Reset 2 3On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator) 4and MSSR (Module Standby and Software Reset) blocks are intimately connected, 5and share the same register block. 6 7They provide the following functionalities: 8 - The CPG block generates various core clocks, 9 - The MSSR block provides two functions: 10 1. Module Standby, providing a Clock Domain to control the clock supply 11 to individual SoC devices, 12 2. Reset Control, to perform a software reset of individual SoC devices. 13 14Required Properties: 15 - compatible: Must be one of: 16 - "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC 17 18 - reg: Base address and length of the memory resource used by the CPG/MSSR 19 block 20 21 - clocks: References to external parent clocks, one entry for each entry in 22 clock-names 23 - clock-names: List of external parent clock names. Valid names are: 24 - "extal" (r8a7795) 25 - "extalr" (r8a7795) 26 27 - #clock-cells: Must be 2 28 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE" 29 and a core clock reference, as defined in 30 <dt-bindings/clock/*-cpg-mssr.h>. 31 - For module clocks, the two clock specifier cells must be "CPG_MOD" and 32 a module number, as defined in the datasheet. 33 34 - #power-domain-cells: Must be 0 35 - SoC devices that are part of the CPG/MSSR Clock Domain and can be 36 power-managed through Module Standby should refer to the CPG device 37 node in their "power-domains" property, as documented by the generic PM 38 Domain bindings in 39 Documentation/devicetree/bindings/power/power_domain.txt. 40 41 42Examples 43-------- 44 45 - CPG device node: 46 47 cpg: clock-controller@e6150000 { 48 compatible = "renesas,r8a7795-cpg-mssr"; 49 reg = <0 0xe6150000 0 0x1000>; 50 clocks = <&extal_clk>, <&extalr_clk>; 51 clock-names = "extal", "extalr"; 52 #clock-cells = <2>; 53 #power-domain-cells = <0>; 54 }; 55 56 57 - CPG/MSSR Clock Domain member device node: 58 59 scif2: serial@e6e88000 { 60 compatible = "renesas,scif-r8a7795", "renesas,scif"; 61 reg = <0 0xe6e88000 0 64>; 62 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 63 clocks = <&cpg CPG_MOD 310>; 64 clock-names = "sci_ick"; 65 dmas = <&dmac1 0x13>, <&dmac1 0x12>; 66 dma-names = "tx", "rx"; 67 power-domains = <&cpg>; 68 status = "disabled"; 69 }; 70