1Samsung Exynos Analog to Digital Converter bindings
2
3The devicetree bindings are for the new ADC driver written for
4Exynos4 and upward SoCs from Samsung.
5
6New driver handles the following
71. Supports ADC IF found on EXYNOS4412/EXYNOS5250
8   and future SoCs from Samsung
92. Add ADC driver under iio/adc framework
103. Also adds the Documentation for device tree bindings
11
12Required properties:
13- compatible:		Must be "samsung,exynos-adc-v1"
14				for exynos4412/5250 and s5pv210 controllers.
15			Must be "samsung,exynos-adc-v2" for
16				future controllers.
17			Must be "samsung,exynos3250-adc" for
18				controllers compatible with ADC of Exynos3250.
19			Must be "samsung,exynos7-adc" for
20				the ADC in Exynos7 and compatibles
21			Must be "samsung,s3c2410-adc" for
22				the ADC in s3c2410 and compatibles
23			Must be "samsung,s3c2416-adc" for
24				the ADC in s3c2416 and compatibles
25			Must be "samsung,s3c2440-adc" for
26				the ADC in s3c2440 and compatibles
27			Must be "samsung,s3c2443-adc" for
28				the ADC in s3c2443 and compatibles
29			Must be "samsung,s3c6410-adc" for
30				the ADC in s3c6410 and compatibles
31- reg:			List of ADC register address range
32			- The base address and range of ADC register
33			- The base address and range of ADC_PHY register (every
34			  SoC except for s3c24xx/s3c64xx ADC)
35- interrupts: 		Contains the interrupt information for the timer. The
36			format is being dependent on which interrupt controller
37			the Samsung device uses.
38- #io-channel-cells = <1>; As ADC has multiple outputs
39- clocks		From common clock bindings: handles to clocks specified
40			in "clock-names" property, in the same order.
41- clock-names		From common clock bindings: list of clock input names
42			used by ADC block:
43			- "adc" : ADC bus clock
44			- "sclk" : ADC special clock (only for Exynos3250 and
45				   compatible ADC block)
46- vdd-supply		VDD input supply.
47
48- samsung,syscon-phandle Contains the PMU system controller node
49			(To access the ADC_PHY register on Exynos5250/5420/5800/3250)
50
51Note: child nodes can be added for auto probing from device tree.
52
53Example: adding device info in dtsi file
54
55adc: adc@12D10000 {
56	compatible = "samsung,exynos-adc-v1";
57	reg = <0x12D10000 0x100>;
58	interrupts = <0 106 0>;
59	#io-channel-cells = <1>;
60	io-channel-ranges;
61
62	clocks = <&clock 303>;
63	clock-names = "adc";
64
65	vdd-supply = <&buck5_reg>;
66	samsung,syscon-phandle = <&pmu_system_controller>;
67};
68
69Example: adding device info in dtsi file for Exynos3250 with additional sclk
70
71adc: adc@126C0000 {
72	compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2;
73	reg = <0x126C0000 0x100>;
74	interrupts = <0 137 0>;
75	#io-channel-cells = <1>;
76	io-channel-ranges;
77
78	clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
79	clock-names = "adc", "sclk";
80
81	vdd-supply = <&buck5_reg>;
82	samsung,syscon-phandle = <&pmu_system_controller>;
83};
84
85Example: Adding child nodes in dts file
86
87adc@12D10000 {
88
89	/* NTC thermistor is a hwmon device */
90	ncp15wb473@0 {
91		compatible = "murata,ncp15wb473";
92		pullup-uv = <1800000>;
93		pullup-ohm = <47000>;
94		pulldown-ohm = <0>;
95		io-channels = <&adc 4>;
96	};
97};
98
99Note: Does not apply to ADC driver under arch/arm/plat-samsung/
100Note: The child node can be added under the adc node or separately.
101