1Mediatek infracfg controller
2============================
3
4The Mediatek infracfg controller provides various clocks and reset
5outputs to the system.
6
7Required Properties:
8
9- compatible: Should be:
10	- "mediatek,mt8135-infracfg", "syscon"
11	- "mediatek,mt8173-infracfg", "syscon"
12- #clock-cells: Must be 1
13- #reset-cells: Must be 1
14
15The infracfg controller uses the common clk binding from
16Documentation/devicetree/bindings/clock/clock-bindings.txt
17The available clocks are defined in dt-bindings/clock/mt*-clk.h.
18Also it uses the common reset controller binding from
19Documentation/devicetree/bindings/reset/reset.txt.
20The available reset outputs are defined in
21dt-bindings/reset-controller/mt*-resets.h
22
23Example:
24
25infracfg: power-controller@10001000 {
26	compatible = "mediatek,mt8173-infracfg", "syscon";
27	reg = <0 0x10001000 0 0x1000>;
28	#clock-cells = <1>;
29	#reset-cells = <1>;
30};
31