1/*
2 * Copyright 2009 Texas Instruments.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __ARCH_ARM_DAVINCI_SPI_H
20#define __ARCH_ARM_DAVINCI_SPI_H
21
22#include <linux/platform_data/edma.h>
23
24#define SPI_INTERN_CS	0xFF
25
26enum {
27	SPI_VERSION_1, /* For DM355/DM365/DM6467 */
28	SPI_VERSION_2, /* For DA8xx */
29};
30
31/**
32 * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
33 *
34 * @version:	version of the SPI IP. Different DaVinci devices have slightly
35 *		varying versions of the same IP.
36 * @num_chipselect: number of chipselects supported by this SPI master
37 * @intr_line:	interrupt line used to connect the SPI IP to the ARM interrupt
38 *		controller withn the SoC. Possible values are 0 and 1.
39 * @chip_sel:	list of GPIOs which can act as chip-selects for the SPI.
40 *		SPI_INTERN_CS denotes internal SPI chip-select. Not necessary
41 *		to populate if all chip-selects are internal.
42 * @cshold_bug:	set this to true if the SPI controller on your chip requires
43 *		a write to CSHOLD bit in between transfers (like in DM355).
44 * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any
45 *		device on the bus.
46 */
47struct davinci_spi_platform_data {
48	u8			version;
49	u8			num_chipselect;
50	u8			intr_line;
51	u8			*chip_sel;
52	bool			cshold_bug;
53	enum dma_event_q	dma_event_q;
54};
55
56/**
57 * davinci_spi_config - Per-chip-select configuration for SPI slave devices
58 *
59 * @wdelay:	amount of delay between transmissions. Measured in number of
60 *		SPI module clocks.
61 * @odd_parity:	polarity of parity flag at the end of transmit data stream.
62 *		0 - odd parity, 1 - even parity.
63 * @parity_enable: enable transmission of parity at end of each transmit
64 *		data stream.
65 * @io_type:	type of IO transfer. Choose between polled, interrupt and DMA.
66 * @timer_disable: disable chip-select timers (setup and hold)
67 * @c2tdelay:	chip-select setup time. Measured in number of SPI module clocks.
68 * @t2cdelay:	chip-select hold time. Measured in number of SPI module clocks.
69 * @t2edelay:	transmit data finished to SPI ENAn pin inactive time. Measured
70 *		in number of SPI clocks.
71 * @c2edelay:	chip-select active to SPI ENAn signal active time. Measured in
72 *		number of SPI clocks.
73 */
74struct davinci_spi_config {
75	u8	wdelay;
76	u8	odd_parity;
77	u8	parity_enable;
78#define SPI_IO_TYPE_INTR	0
79#define SPI_IO_TYPE_POLL	1
80#define SPI_IO_TYPE_DMA		2
81	u8	io_type;
82	u8	timer_disable;
83	u8	c2tdelay;
84	u8	t2cdelay;
85	u8	t2edelay;
86	u8	c2edelay;
87};
88
89#endif	/* __ARCH_ARM_DAVINCI_SPI_H */
90