1/*
2 * Platform data for Arizona devices
3 *
4 * Copyright 2012 Wolfson Microelectronics. PLC.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef _ARIZONA_PDATA_H
12#define _ARIZONA_PDATA_H
13
14#include <dt-bindings/mfd/arizona.h>
15
16#define ARIZONA_GPN_DIR_MASK                     0x8000  /* GPN_DIR */
17#define ARIZONA_GPN_DIR_SHIFT                        15  /* GPN_DIR */
18#define ARIZONA_GPN_DIR_WIDTH                         1  /* GPN_DIR */
19#define ARIZONA_GPN_PU_MASK                      0x4000  /* GPN_PU */
20#define ARIZONA_GPN_PU_SHIFT                         14  /* GPN_PU */
21#define ARIZONA_GPN_PU_WIDTH                          1  /* GPN_PU */
22#define ARIZONA_GPN_PD_MASK                      0x2000  /* GPN_PD */
23#define ARIZONA_GPN_PD_SHIFT                         13  /* GPN_PD */
24#define ARIZONA_GPN_PD_WIDTH                          1  /* GPN_PD */
25#define ARIZONA_GPN_LVL_MASK                     0x0800  /* GPN_LVL */
26#define ARIZONA_GPN_LVL_SHIFT                        11  /* GPN_LVL */
27#define ARIZONA_GPN_LVL_WIDTH                         1  /* GPN_LVL */
28#define ARIZONA_GPN_POL_MASK                     0x0400  /* GPN_POL */
29#define ARIZONA_GPN_POL_SHIFT                        10  /* GPN_POL */
30#define ARIZONA_GPN_POL_WIDTH                         1  /* GPN_POL */
31#define ARIZONA_GPN_OP_CFG_MASK                  0x0200  /* GPN_OP_CFG */
32#define ARIZONA_GPN_OP_CFG_SHIFT                      9  /* GPN_OP_CFG */
33#define ARIZONA_GPN_OP_CFG_WIDTH                      1  /* GPN_OP_CFG */
34#define ARIZONA_GPN_DB_MASK                      0x0100  /* GPN_DB */
35#define ARIZONA_GPN_DB_SHIFT                          8  /* GPN_DB */
36#define ARIZONA_GPN_DB_WIDTH                          1  /* GPN_DB */
37#define ARIZONA_GPN_FN_MASK                      0x007F  /* GPN_FN - [6:0] */
38#define ARIZONA_GPN_FN_SHIFT                          0  /* GPN_FN - [6:0] */
39#define ARIZONA_GPN_FN_WIDTH                          7  /* GPN_FN - [6:0] */
40
41#define ARIZONA_MAX_GPIO 5
42
43#define ARIZONA_MAX_INPUT 4
44
45#define ARIZONA_MAX_MICBIAS 3
46
47#define ARIZONA_MAX_OUTPUT 6
48
49#define ARIZONA_MAX_AIF 3
50
51#define ARIZONA_HAP_ACT_ERM 0
52#define ARIZONA_HAP_ACT_LRA 2
53
54#define ARIZONA_MAX_PDM_SPK 2
55
56struct regulator_init_data;
57
58struct arizona_micbias {
59	int mV;                    /** Regulated voltage */
60	unsigned int ext_cap:1;    /** External capacitor fitted */
61	unsigned int discharge:1;  /** Actively discharge */
62	unsigned int soft_start:1; /** Disable aggressive startup ramp rate */
63	unsigned int bypass:1;     /** Use bypass mode */
64};
65
66struct arizona_micd_config {
67	unsigned int src;
68	unsigned int bias;
69	bool gpio;
70};
71
72struct arizona_micd_range {
73	int max;  /** Ohms */
74	int key;  /** Key to report to input layer */
75};
76
77struct arizona_pdata {
78	int reset;      /** GPIO controlling /RESET, if any */
79	int ldoena;     /** GPIO controlling LODENA, if any */
80
81	/** Regulator configuration for MICVDD */
82	struct regulator_init_data *micvdd;
83
84	/** Regulator configuration for LDO1 */
85	struct regulator_init_data *ldo1;
86
87	/** If a direct 32kHz clock is provided on an MCLK specify it here */
88	int clk32k_src;
89
90	/** Mode for primary IRQ (defaults to active low) */
91	unsigned int irq_flags;
92
93	/* Base GPIO */
94	int gpio_base;
95
96	/** Pin state for GPIO pins */
97	unsigned int gpio_defaults[ARIZONA_MAX_GPIO];
98
99	/**
100	 * Maximum number of channels clocks will be generated for,
101	 * useful for systems where and I2S bus with multiple data
102	 * lines is mastered.
103	 */
104	int max_channels_clocked[ARIZONA_MAX_AIF];
105
106	/** GPIO5 is used for jack detection */
107	bool jd_gpio5;
108
109	/** Internal pull on GPIO5 is disabled when used for jack detection */
110	bool jd_gpio5_nopull;
111
112	/** set to true if jackdet contact opens on insert */
113	bool jd_invert;
114
115	/** Use the headphone detect circuit to identify the accessory */
116	bool hpdet_acc_id;
117
118	/** Check for line output with HPDET method */
119	bool hpdet_acc_id_line;
120
121	/** GPIO used for mic isolation with HPDET */
122	int hpdet_id_gpio;
123
124	/** Extra debounce timeout used during initial mic detection (ms) */
125	int micd_detect_debounce;
126
127	/** GPIO for mic detection polarity */
128	int micd_pol_gpio;
129
130	/** Mic detect ramp rate */
131	int micd_bias_start_time;
132
133	/** Mic detect sample rate */
134	int micd_rate;
135
136	/** Mic detect debounce level */
137	int micd_dbtime;
138
139	/** Mic detect timeout (ms) */
140	int micd_timeout;
141
142	/** Force MICBIAS on for mic detect */
143	bool micd_force_micbias;
144
145	/** Mic detect level parameters */
146	const struct arizona_micd_range *micd_ranges;
147	int num_micd_ranges;
148
149	/** Headset polarity configurations */
150	struct arizona_micd_config *micd_configs;
151	int num_micd_configs;
152
153	/** Reference voltage for DMIC inputs */
154	int dmic_ref[ARIZONA_MAX_INPUT];
155
156	/** MICBIAS configurations */
157	struct arizona_micbias micbias[ARIZONA_MAX_MICBIAS];
158
159	/** Mode of input structures */
160	int inmode[ARIZONA_MAX_INPUT];
161
162	/** Mode for outputs */
163	bool out_mono[ARIZONA_MAX_OUTPUT];
164
165	/** PDM speaker mute setting */
166	unsigned int spk_mute[ARIZONA_MAX_PDM_SPK];
167
168	/** PDM speaker format */
169	unsigned int spk_fmt[ARIZONA_MAX_PDM_SPK];
170
171	/** Haptic actuator type */
172	unsigned int hap_act;
173
174	/** GPIO for primary IRQ (used for edge triggered emulation) */
175	int irq_gpio;
176};
177
178#endif
179