1/*
2 *  controlfb.c -- frame buffer device for the PowerMac 'control' display
3 *
4 *  Created 12 July 1998 by Dan Jacobowitz <dan@debian.org>
5 *  Copyright (C) 1998 Dan Jacobowitz
6 *  Copyright (C) 2001 Takashi Oe
7 *
8 *  Mmap code by Michel Lanners <mlan@cpu.lu>
9 *
10 *  Frame buffer structure from:
11 *    drivers/video/chipsfb.c -- frame buffer device for
12 *    Chips & Technologies 65550 chip.
13 *
14 *    Copyright (C) 1998 Paul Mackerras
15 *
16 *    This file is derived from the Powermac "chips" driver:
17 *    Copyright (C) 1997 Fabio Riccardi.
18 *    And from the frame buffer device for Open Firmware-initialized devices:
19 *    Copyright (C) 1997 Geert Uytterhoeven.
20 *
21 *  Hardware information from:
22 *    control.c: Console support for PowerMac "control" display adaptor.
23 *    Copyright (C) 1996 Paul Mackerras
24 *
25 *  Updated to 2.5 framebuffer API by Ben Herrenschmidt
26 *  <benh@kernel.crashing.org>, Paul Mackerras <paulus@samba.org>,
27 *  and James Simmons <jsimmons@infradead.org>.
28 *
29 *  This file is subject to the terms and conditions of the GNU General Public
30 *  License. See the file COPYING in the main directory of this archive for
31 *  more details.
32 */
33
34#include <linux/module.h>
35#include <linux/kernel.h>
36#include <linux/errno.h>
37#include <linux/string.h>
38#include <linux/mm.h>
39#include <linux/slab.h>
40#include <linux/vmalloc.h>
41#include <linux/delay.h>
42#include <linux/interrupt.h>
43#include <linux/of.h>
44#include <linux/of_address.h>
45#include <linux/fb.h>
46#include <linux/init.h>
47#include <linux/pci.h>
48#include <linux/nvram.h>
49#include <linux/adb.h>
50#include <linux/cuda.h>
51#include <asm/io.h>
52#include <asm/prom.h>
53#include <asm/pgtable.h>
54#include <asm/btext.h>
55
56#include "macmodes.h"
57#include "controlfb.h"
58
59struct fb_par_control {
60	int	vmode, cmode;
61	int	xres, yres;
62	int	vxres, vyres;
63	int	xoffset, yoffset;
64	int	pitch;
65	struct control_regvals	regvals;
66	unsigned long sync;
67	unsigned char ctrl;
68};
69
70#define DIRTY(z) ((x)->z != (y)->z)
71#define DIRTY_CMAP(z) (memcmp(&((x)->z), &((y)->z), sizeof((y)->z)))
72static inline int PAR_EQUAL(struct fb_par_control *x, struct fb_par_control *y)
73{
74	int i, results;
75
76	results = 1;
77	for (i = 0; i < 3; i++)
78		results &= !DIRTY(regvals.clock_params[i]);
79	if (!results)
80		return 0;
81	for (i = 0; i < 16; i++)
82		results &= !DIRTY(regvals.regs[i]);
83	if (!results)
84		return 0;
85	return (!DIRTY(cmode) && !DIRTY(xres) && !DIRTY(yres)
86		&& !DIRTY(vxres) && !DIRTY(vyres));
87}
88static inline int VAR_MATCH(struct fb_var_screeninfo *x, struct fb_var_screeninfo *y)
89{
90	return (!DIRTY(bits_per_pixel) && !DIRTY(xres)
91		&& !DIRTY(yres) && !DIRTY(xres_virtual)
92		&& !DIRTY(yres_virtual)
93		&& !DIRTY_CMAP(red) && !DIRTY_CMAP(green) && !DIRTY_CMAP(blue));
94}
95
96struct fb_info_control {
97	struct fb_info		info;
98	struct fb_par_control	par;
99	u32			pseudo_palette[16];
100
101	struct cmap_regs	__iomem *cmap_regs;
102	unsigned long		cmap_regs_phys;
103
104	struct control_regs	__iomem *control_regs;
105	unsigned long		control_regs_phys;
106	unsigned long		control_regs_size;
107
108	__u8			__iomem *frame_buffer;
109	unsigned long		frame_buffer_phys;
110	unsigned long		fb_orig_base;
111	unsigned long		fb_orig_size;
112
113	int			control_use_bank2;
114	unsigned long		total_vram;
115	unsigned char		vram_attr;
116};
117
118/* control register access macro */
119#define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs->REG).r))
120
121
122/******************** Prototypes for exported functions ********************/
123/*
124 * struct fb_ops
125 */
126static int controlfb_pan_display(struct fb_var_screeninfo *var,
127	struct fb_info *info);
128static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
129	u_int transp, struct fb_info *info);
130static int controlfb_blank(int blank_mode, struct fb_info *info);
131static int controlfb_mmap(struct fb_info *info,
132	struct vm_area_struct *vma);
133static int controlfb_set_par (struct fb_info *info);
134static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info);
135
136/******************** Prototypes for internal functions **********************/
137
138static void set_control_clock(unsigned char *params);
139static int init_control(struct fb_info_control *p);
140static void control_set_hardware(struct fb_info_control *p,
141	struct fb_par_control *par);
142static int control_of_init(struct device_node *dp);
143static void find_vram_size(struct fb_info_control *p);
144static int read_control_sense(struct fb_info_control *p);
145static int calc_clock_params(unsigned long clk, unsigned char *param);
146static int control_var_to_par(struct fb_var_screeninfo *var,
147	struct fb_par_control *par, const struct fb_info *fb_info);
148static inline void control_par_to_var(struct fb_par_control *par,
149	struct fb_var_screeninfo *var);
150static void control_init_info(struct fb_info *info, struct fb_info_control *p);
151static void control_cleanup(void);
152
153
154/************************** Internal variables *******************************/
155
156static struct fb_info_control *control_fb;
157
158static int default_vmode __initdata = VMODE_NVRAM;
159static int default_cmode __initdata = CMODE_NVRAM;
160
161
162static struct fb_ops controlfb_ops = {
163	.owner		= THIS_MODULE,
164	.fb_check_var	= controlfb_check_var,
165	.fb_set_par	= controlfb_set_par,
166	.fb_setcolreg	= controlfb_setcolreg,
167	.fb_pan_display = controlfb_pan_display,
168	.fb_blank	= controlfb_blank,
169	.fb_mmap	= controlfb_mmap,
170	.fb_fillrect	= cfb_fillrect,
171	.fb_copyarea	= cfb_copyarea,
172	.fb_imageblit	= cfb_imageblit,
173};
174
175
176/********************  The functions for controlfb_ops ********************/
177
178#ifdef MODULE
179MODULE_LICENSE("GPL");
180
181int init_module(void)
182{
183	struct device_node *dp;
184	int ret = -ENXIO;
185
186	dp = of_find_node_by_name(NULL, "control");
187	if (dp != 0 && !control_of_init(dp))
188		ret = 0;
189	of_node_put(dp);
190
191	return ret;
192}
193
194void cleanup_module(void)
195{
196	control_cleanup();
197}
198#endif
199
200/*
201 * Checks a var structure
202 */
203static int controlfb_check_var (struct fb_var_screeninfo *var, struct fb_info *info)
204{
205	struct fb_par_control par;
206	int err;
207
208	err = control_var_to_par(var, &par, info);
209	if (err)
210		return err;
211	control_par_to_var(&par, var);
212
213	return 0;
214}
215
216/*
217 * Applies current var to display
218 */
219static int controlfb_set_par (struct fb_info *info)
220{
221	struct fb_info_control *p =
222		container_of(info, struct fb_info_control, info);
223	struct fb_par_control par;
224	int err;
225
226	if((err = control_var_to_par(&info->var, &par, info))) {
227		printk (KERN_ERR "controlfb_set_par: error calling"
228				 " control_var_to_par: %d.\n", err);
229		return err;
230	}
231
232	control_set_hardware(p, &par);
233
234	info->fix.visual = (p->par.cmode == CMODE_8) ?
235		FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_DIRECTCOLOR;
236	info->fix.line_length = p->par.pitch;
237	info->fix.xpanstep = 32 >> p->par.cmode;
238	info->fix.ypanstep = 1;
239
240	return 0;
241}
242
243/*
244 * Set screen start address according to var offset values
245 */
246static inline void set_screen_start(int xoffset, int yoffset,
247	struct fb_info_control *p)
248{
249	struct fb_par_control *par = &p->par;
250
251	par->xoffset = xoffset;
252	par->yoffset = yoffset;
253	out_le32(CNTRL_REG(p,start_addr),
254		 par->yoffset * par->pitch + (par->xoffset << par->cmode));
255}
256
257
258static int controlfb_pan_display(struct fb_var_screeninfo *var,
259				 struct fb_info *info)
260{
261	unsigned int xoffset, hstep;
262	struct fb_info_control *p =
263		container_of(info, struct fb_info_control, info);
264	struct fb_par_control *par = &p->par;
265
266	/*
267	 * make sure start addr will be 32-byte aligned
268	 */
269	hstep = 0x1f >> par->cmode;
270	xoffset = (var->xoffset + hstep) & ~hstep;
271
272	if (xoffset+par->xres > par->vxres ||
273	    var->yoffset+par->yres > par->vyres)
274		return -EINVAL;
275
276	set_screen_start(xoffset, var->yoffset, p);
277
278	return 0;
279}
280
281
282/*
283 * Private mmap since we want to have a different caching on the framebuffer
284 * for controlfb.
285 * Note there's no locking in here; it's done in fb_mmap() in fbmem.c.
286 */
287static int controlfb_mmap(struct fb_info *info,
288                       struct vm_area_struct *vma)
289{
290	unsigned long mmio_pgoff;
291	unsigned long start;
292	u32 len;
293
294	start = info->fix.smem_start;
295	len = info->fix.smem_len;
296	mmio_pgoff = PAGE_ALIGN((start & ~PAGE_MASK) + len) >> PAGE_SHIFT;
297	if (vma->vm_pgoff >= mmio_pgoff) {
298		if (info->var.accel_flags)
299			return -EINVAL;
300		vma->vm_pgoff -= mmio_pgoff;
301		start = info->fix.mmio_start;
302		len = info->fix.mmio_len;
303		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
304	} else {
305		/* framebuffer */
306		vma->vm_page_prot = pgprot_cached_wthru(vma->vm_page_prot);
307	}
308
309	return vm_iomap_memory(vma, start, len);
310}
311
312static int controlfb_blank(int blank_mode, struct fb_info *info)
313{
314	struct fb_info_control *p =
315		container_of(info, struct fb_info_control, info);
316	unsigned ctrl;
317
318	ctrl = le32_to_cpup(CNTRL_REG(p,ctrl));
319	if (blank_mode > 0)
320		switch (blank_mode) {
321		case FB_BLANK_VSYNC_SUSPEND:
322			ctrl &= ~3;
323			break;
324		case FB_BLANK_HSYNC_SUSPEND:
325			ctrl &= ~0x30;
326			break;
327		case FB_BLANK_POWERDOWN:
328			ctrl &= ~0x33;
329			/* fall through */
330		case FB_BLANK_NORMAL:
331			ctrl |= 0x400;
332			break;
333		default:
334			break;
335		}
336	else {
337		ctrl &= ~0x400;
338		ctrl |= 0x33;
339	}
340	out_le32(CNTRL_REG(p,ctrl), ctrl);
341
342	return 0;
343}
344
345static int controlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
346			     u_int transp, struct fb_info *info)
347{
348	struct fb_info_control *p =
349		container_of(info, struct fb_info_control, info);
350	__u8 r, g, b;
351
352	if (regno > 255)
353		return 1;
354
355	r = red >> 8;
356	g = green >> 8;
357	b = blue >> 8;
358
359	out_8(&p->cmap_regs->addr, regno);	/* tell clut what addr to fill	*/
360	out_8(&p->cmap_regs->lut, r);		/* send one color channel at	*/
361	out_8(&p->cmap_regs->lut, g);		/* a time...			*/
362	out_8(&p->cmap_regs->lut, b);
363
364	if (regno < 16) {
365		int i;
366		switch (p->par.cmode) {
367		case CMODE_16:
368			p->pseudo_palette[regno] =
369			    (regno << 10) | (regno << 5) | regno;
370			break;
371		case CMODE_32:
372			i = (regno << 8) | regno;
373			p->pseudo_palette[regno] = (i << 16) | i;
374			break;
375		}
376	}
377
378	return 0;
379}
380
381
382/********************  End of controlfb_ops implementation  ******************/
383
384
385
386static void set_control_clock(unsigned char *params)
387{
388#ifdef CONFIG_ADB_CUDA
389	struct adb_request req;
390	int i;
391
392	for (i = 0; i < 3; ++i) {
393		cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_GET_SET_IIC,
394			     0x50, i + 1, params[i]);
395		while (!req.complete)
396			cuda_poll();
397	}
398#endif
399}
400
401
402/*
403 * finish off the driver initialization and register
404 */
405static int __init init_control(struct fb_info_control *p)
406{
407	int full, sense, vmode, cmode, vyres;
408	struct fb_var_screeninfo var;
409	int rc;
410
411	printk(KERN_INFO "controlfb: ");
412
413	full = p->total_vram == 0x400000;
414
415	/* Try to pick a video mode out of NVRAM if we have one. */
416#ifdef CONFIG_NVRAM
417	if (default_cmode == CMODE_NVRAM) {
418		cmode = nvram_read_byte(NV_CMODE);
419		if(cmode < CMODE_8 || cmode > CMODE_32)
420			cmode = CMODE_8;
421	} else
422#endif
423		cmode=default_cmode;
424#ifdef CONFIG_NVRAM
425	if (default_vmode == VMODE_NVRAM) {
426		vmode = nvram_read_byte(NV_VMODE);
427		if (vmode < 1 || vmode > VMODE_MAX ||
428		    control_mac_modes[vmode - 1].m[full] < cmode) {
429			sense = read_control_sense(p);
430			printk("Monitor sense value = 0x%x, ", sense);
431			vmode = mac_map_monitor_sense(sense);
432			if (control_mac_modes[vmode - 1].m[full] < cmode)
433				vmode = VMODE_640_480_60;
434		}
435	} else
436#endif
437	{
438		vmode=default_vmode;
439		if (control_mac_modes[vmode - 1].m[full] < cmode) {
440			if (cmode > CMODE_8)
441				cmode--;
442			else
443				vmode = VMODE_640_480_60;
444		}
445	}
446
447	/* Initialize info structure */
448	control_init_info(&p->info, p);
449
450	/* Setup default var */
451	if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
452		/* This shouldn't happen! */
453		printk("mac_vmode_to_var(%d, %d,) failed\n", vmode, cmode);
454try_again:
455		vmode = VMODE_640_480_60;
456		cmode = CMODE_8;
457		if (mac_vmode_to_var(vmode, cmode, &var) < 0) {
458			printk(KERN_ERR "controlfb: mac_vmode_to_var() failed\n");
459			return -ENXIO;
460		}
461		printk(KERN_INFO "controlfb: ");
462	}
463	printk("using video mode %d and color mode %d.\n", vmode, cmode);
464
465	vyres = (p->total_vram - CTRLFB_OFF) / (var.xres << cmode);
466	if (vyres > var.yres)
467		var.yres_virtual = vyres;
468
469	/* Apply default var */
470	var.activate = FB_ACTIVATE_NOW;
471	rc = fb_set_var(&p->info, &var);
472	if (rc && (vmode != VMODE_640_480_60 || cmode != CMODE_8))
473		goto try_again;
474
475	/* Register with fbdev layer */
476	if (register_framebuffer(&p->info) < 0)
477		return -ENXIO;
478
479	fb_info(&p->info, "control display adapter\n");
480
481	return 0;
482}
483
484#define RADACAL_WRITE(a,d) \
485	out_8(&p->cmap_regs->addr, (a)); \
486	out_8(&p->cmap_regs->dat,   (d))
487
488/* Now how about actually saying, Make it so! */
489/* Some things in here probably don't need to be done each time. */
490static void control_set_hardware(struct fb_info_control *p, struct fb_par_control *par)
491{
492	struct control_regvals	*r;
493	volatile struct preg	__iomem *rp;
494	int			i, cmode;
495
496	if (PAR_EQUAL(&p->par, par)) {
497		/*
498		 * check if only xoffset or yoffset differs.
499		 * this prevents flickers in typical VT switch case.
500		 */
501		if (p->par.xoffset != par->xoffset ||
502		    p->par.yoffset != par->yoffset)
503			set_screen_start(par->xoffset, par->yoffset, p);
504
505		return;
506	}
507
508	p->par = *par;
509	cmode = p->par.cmode;
510	r = &par->regvals;
511
512	/* Turn off display */
513	out_le32(CNTRL_REG(p,ctrl), 0x400 | par->ctrl);
514
515	set_control_clock(r->clock_params);
516
517	RADACAL_WRITE(0x20, r->radacal_ctrl);
518	RADACAL_WRITE(0x21, p->control_use_bank2 ? 0 : 1);
519	RADACAL_WRITE(0x10, 0);
520	RADACAL_WRITE(0x11, 0);
521
522	rp = &p->control_regs->vswin;
523	for (i = 0; i < 16; ++i, ++rp)
524		out_le32(&rp->r, r->regs[i]);
525
526	out_le32(CNTRL_REG(p,pitch), par->pitch);
527	out_le32(CNTRL_REG(p,mode), r->mode);
528	out_le32(CNTRL_REG(p,vram_attr), p->vram_attr);
529	out_le32(CNTRL_REG(p,start_addr), par->yoffset * par->pitch
530		 + (par->xoffset << cmode));
531	out_le32(CNTRL_REG(p,rfrcnt), 0x1e5);
532	out_le32(CNTRL_REG(p,intr_ena), 0);
533
534	/* Turn on display */
535	out_le32(CNTRL_REG(p,ctrl), par->ctrl);
536
537#ifdef CONFIG_BOOTX_TEXT
538	btext_update_display(p->frame_buffer_phys + CTRLFB_OFF,
539			     p->par.xres, p->par.yres,
540			     (cmode == CMODE_32? 32: cmode == CMODE_16? 16: 8),
541			     p->par.pitch);
542#endif /* CONFIG_BOOTX_TEXT */
543}
544
545
546/*
547 * Parse user specified options (`video=controlfb:')
548 */
549static void __init control_setup(char *options)
550{
551	char *this_opt;
552
553	if (!options || !*options)
554		return;
555
556	while ((this_opt = strsep(&options, ",")) != NULL) {
557		if (!strncmp(this_opt, "vmode:", 6)) {
558			int vmode = simple_strtoul(this_opt+6, NULL, 0);
559			if (vmode > 0 && vmode <= VMODE_MAX &&
560			    control_mac_modes[vmode - 1].m[1] >= 0)
561				default_vmode = vmode;
562		} else if (!strncmp(this_opt, "cmode:", 6)) {
563			int depth = simple_strtoul(this_opt+6, NULL, 0);
564			switch (depth) {
565			 case CMODE_8:
566			 case CMODE_16:
567			 case CMODE_32:
568			 	default_cmode = depth;
569			 	break;
570			 case 8:
571				default_cmode = CMODE_8;
572				break;
573			 case 15:
574			 case 16:
575				default_cmode = CMODE_16;
576				break;
577			 case 24:
578			 case 32:
579				default_cmode = CMODE_32;
580				break;
581			}
582		}
583	}
584}
585
586static int __init control_init(void)
587{
588	struct device_node *dp;
589	char *option = NULL;
590	int ret = -ENXIO;
591
592	if (fb_get_options("controlfb", &option))
593		return -ENODEV;
594	control_setup(option);
595
596	dp = of_find_node_by_name(NULL, "control");
597	if (dp != 0 && !control_of_init(dp))
598		ret = 0;
599	of_node_put(dp);
600
601	return ret;
602}
603
604module_init(control_init);
605
606/* Work out which banks of VRAM we have installed. */
607/* danj: I guess the card just ignores writes to nonexistant VRAM... */
608
609static void __init find_vram_size(struct fb_info_control *p)
610{
611	int bank1, bank2;
612
613	/*
614	 * Set VRAM in 2MB (bank 1) mode
615	 * VRAM Bank 2 will be accessible through offset 0x600000 if present
616	 * and VRAM Bank 1 will not respond at that offset even if present
617	 */
618	out_le32(CNTRL_REG(p,vram_attr), 0x31);
619
620	out_8(&p->frame_buffer[0x600000], 0xb3);
621	out_8(&p->frame_buffer[0x600001], 0x71);
622	asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0x600000])
623					: "memory" );
624	mb();
625	asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0x600000])
626					: "memory" );
627	mb();
628
629	bank2 = (in_8(&p->frame_buffer[0x600000]) == 0xb3)
630		&& (in_8(&p->frame_buffer[0x600001]) == 0x71);
631
632	/*
633	 * Set VRAM in 2MB (bank 2) mode
634	 * VRAM Bank 1 will be accessible through offset 0x000000 if present
635	 * and VRAM Bank 2 will not respond at that offset even if present
636	 */
637	out_le32(CNTRL_REG(p,vram_attr), 0x39);
638
639	out_8(&p->frame_buffer[0], 0x5a);
640	out_8(&p->frame_buffer[1], 0xc7);
641	asm volatile("eieio; dcbf 0,%0" : : "r" (&p->frame_buffer[0])
642					: "memory" );
643	mb();
644	asm volatile("eieio; dcbi 0,%0" : : "r" (&p->frame_buffer[0])
645					: "memory" );
646	mb();
647
648	bank1 = (in_8(&p->frame_buffer[0]) == 0x5a)
649		&& (in_8(&p->frame_buffer[1]) == 0xc7);
650
651	if (bank2) {
652		if (!bank1) {
653			/*
654			 * vram bank 2 only
655			 */
656			p->control_use_bank2 = 1;
657			p->vram_attr = 0x39;
658			p->frame_buffer += 0x600000;
659			p->frame_buffer_phys += 0x600000;
660		} else {
661			/*
662			 * 4 MB vram
663			 */
664			p->vram_attr = 0x51;
665		}
666	} else {
667		/*
668		 * vram bank 1 only
669		 */
670		p->vram_attr = 0x31;
671	}
672
673        p->total_vram = (bank1 + bank2) * 0x200000;
674
675	printk(KERN_INFO "controlfb: VRAM Total = %dMB "
676			"(%dMB @ bank 1, %dMB @ bank 2)\n",
677			(bank1 + bank2) << 1, bank1 << 1, bank2 << 1);
678}
679
680
681/*
682 * find "control" and initialize
683 */
684static int __init control_of_init(struct device_node *dp)
685{
686	struct fb_info_control	*p;
687	struct resource		fb_res, reg_res;
688
689	if (control_fb) {
690		printk(KERN_ERR "controlfb: only one control is supported\n");
691		return -ENXIO;
692	}
693
694	if (of_pci_address_to_resource(dp, 2, &fb_res) ||
695	    of_pci_address_to_resource(dp, 1, &reg_res)) {
696		printk(KERN_ERR "can't get 2 addresses for control\n");
697		return -ENXIO;
698	}
699	p = kzalloc(sizeof(*p), GFP_KERNEL);
700	if (p == 0)
701		return -ENXIO;
702	control_fb = p;	/* save it for cleanups */
703
704	/* Map in frame buffer and registers */
705	p->fb_orig_base = fb_res.start;
706	p->fb_orig_size = resource_size(&fb_res);
707	/* use the big-endian aperture (??) */
708	p->frame_buffer_phys = fb_res.start + 0x800000;
709	p->control_regs_phys = reg_res.start;
710	p->control_regs_size = resource_size(&reg_res);
711
712	if (!p->fb_orig_base ||
713	    !request_mem_region(p->fb_orig_base,p->fb_orig_size,"controlfb")) {
714		p->fb_orig_base = 0;
715		goto error_out;
716	}
717	/* map at most 8MB for the frame buffer */
718	p->frame_buffer = __ioremap(p->frame_buffer_phys, 0x800000,
719				    _PAGE_WRITETHRU);
720
721	if (!p->control_regs_phys ||
722	    !request_mem_region(p->control_regs_phys, p->control_regs_size,
723	    "controlfb regs")) {
724		p->control_regs_phys = 0;
725		goto error_out;
726	}
727	p->control_regs = ioremap(p->control_regs_phys, p->control_regs_size);
728
729	p->cmap_regs_phys = 0xf301b000;	 /* XXX not in prom? */
730	if (!request_mem_region(p->cmap_regs_phys, 0x1000, "controlfb cmap")) {
731		p->cmap_regs_phys = 0;
732		goto error_out;
733	}
734	p->cmap_regs = ioremap(p->cmap_regs_phys, 0x1000);
735
736	if (!p->cmap_regs || !p->control_regs || !p->frame_buffer)
737		goto error_out;
738
739	find_vram_size(p);
740	if (!p->total_vram)
741		goto error_out;
742
743	if (init_control(p) < 0)
744		goto error_out;
745
746	return 0;
747
748error_out:
749	control_cleanup();
750	return -ENXIO;
751}
752
753/*
754 * Get the monitor sense value.
755 * Note that this can be called before calibrate_delay,
756 * so we can't use udelay.
757 */
758static int read_control_sense(struct fb_info_control *p)
759{
760	int sense;
761
762	out_le32(CNTRL_REG(p,mon_sense), 7);	/* drive all lines high */
763	__delay(200);
764	out_le32(CNTRL_REG(p,mon_sense), 077);	/* turn off drivers */
765	__delay(2000);
766	sense = (in_le32(CNTRL_REG(p,mon_sense)) & 0x1c0) << 2;
767
768	/* drive each sense line low in turn and collect the other 2 */
769	out_le32(CNTRL_REG(p,mon_sense), 033);	/* drive A low */
770	__delay(2000);
771	sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0xc0) >> 2;
772	out_le32(CNTRL_REG(p,mon_sense), 055);	/* drive B low */
773	__delay(2000);
774	sense |= ((in_le32(CNTRL_REG(p,mon_sense)) & 0x100) >> 5)
775		| ((in_le32(CNTRL_REG(p,mon_sense)) & 0x40) >> 4);
776	out_le32(CNTRL_REG(p,mon_sense), 066);	/* drive C low */
777	__delay(2000);
778	sense |= (in_le32(CNTRL_REG(p,mon_sense)) & 0x180) >> 7;
779
780	out_le32(CNTRL_REG(p,mon_sense), 077);	/* turn off drivers */
781
782	return sense;
783}
784
785/**********************  Various translation functions  **********************/
786
787#define CONTROL_PIXCLOCK_BASE	256016
788#define CONTROL_PIXCLOCK_MIN	5000	/* ~ 200 MHz dot clock */
789
790/*
791 * calculate the clock paramaters to be sent to CUDA according to given
792 * pixclock in pico second.
793 */
794static int calc_clock_params(unsigned long clk, unsigned char *param)
795{
796	unsigned long p0, p1, p2, k, l, m, n, min;
797
798	if (clk > (CONTROL_PIXCLOCK_BASE << 3))
799		return 1;
800
801	p2 = ((clk << 4) < CONTROL_PIXCLOCK_BASE)? 3: 2;
802	l = clk << p2;
803	p0 = 0;
804	p1 = 0;
805	for (k = 1, min = l; k < 32; k++) {
806		unsigned long rem;
807
808		m = CONTROL_PIXCLOCK_BASE * k;
809		n = m / l;
810		rem = m % l;
811		if (n && (n < 128) && rem < min) {
812			p0 = k;
813			p1 = n;
814			min = rem;
815		}
816	}
817	if (!p0 || !p1)
818		return 1;
819
820	param[0] = p0;
821	param[1] = p1;
822	param[2] = p2;
823
824	return 0;
825}
826
827
828/*
829 * This routine takes a user-supplied var, and picks the best vmode/cmode
830 * from it.
831 */
832
833static int control_var_to_par(struct fb_var_screeninfo *var,
834	struct fb_par_control *par, const struct fb_info *fb_info)
835{
836	int cmode, piped_diff, hstep;
837	unsigned hperiod, hssync, hsblank, hesync, heblank, piped, heq, hlfln,
838		 hserr, vperiod, vssync, vesync, veblank, vsblank, vswin, vewin;
839	unsigned long pixclock;
840	struct fb_info_control *p =
841		container_of(fb_info, struct fb_info_control, info);
842	struct control_regvals *r = &par->regvals;
843
844	switch (var->bits_per_pixel) {
845	case 8:
846		par->cmode = CMODE_8;
847		if (p->total_vram > 0x200000) {
848			r->mode = 3;
849			r->radacal_ctrl = 0x20;
850			piped_diff = 13;
851		} else {
852			r->mode = 2;
853			r->radacal_ctrl = 0x10;
854			piped_diff = 9;
855		}
856		break;
857	case 15:
858	case 16:
859		par->cmode = CMODE_16;
860		if (p->total_vram > 0x200000) {
861			r->mode = 2;
862			r->radacal_ctrl = 0x24;
863			piped_diff = 5;
864		} else {
865			r->mode = 1;
866			r->radacal_ctrl = 0x14;
867			piped_diff = 3;
868		}
869		break;
870	case 32:
871		par->cmode = CMODE_32;
872		if (p->total_vram > 0x200000) {
873			r->mode = 1;
874			r->radacal_ctrl = 0x28;
875		} else {
876			r->mode = 0;
877			r->radacal_ctrl = 0x18;
878		}
879		piped_diff = 1;
880		break;
881	default:
882		return -EINVAL;
883	}
884
885	/*
886	 * adjust xres and vxres so that the corresponding memory widths are
887	 * 32-byte aligned
888	 */
889	hstep = 31 >> par->cmode;
890	par->xres = (var->xres + hstep) & ~hstep;
891	par->vxres = (var->xres_virtual + hstep) & ~hstep;
892	par->xoffset = (var->xoffset + hstep) & ~hstep;
893	if (par->vxres < par->xres)
894		par->vxres = par->xres;
895	par->pitch = par->vxres << par->cmode;
896
897	par->yres = var->yres;
898	par->vyres = var->yres_virtual;
899	par->yoffset = var->yoffset;
900	if (par->vyres < par->yres)
901		par->vyres = par->yres;
902
903	par->sync = var->sync;
904
905	if (par->pitch * par->vyres + CTRLFB_OFF > p->total_vram)
906		return -EINVAL;
907
908	if (par->xoffset + par->xres > par->vxres)
909		par->xoffset = par->vxres - par->xres;
910	if (par->yoffset + par->yres > par->vyres)
911		par->yoffset = par->vyres - par->yres;
912
913	pixclock = (var->pixclock < CONTROL_PIXCLOCK_MIN)? CONTROL_PIXCLOCK_MIN:
914		   var->pixclock;
915	if (calc_clock_params(pixclock, r->clock_params))
916		return -EINVAL;
917
918	hperiod = ((var->left_margin + par->xres + var->right_margin
919		    + var->hsync_len) >> 1) - 2;
920	hssync = hperiod + 1;
921	hsblank = hssync - (var->right_margin >> 1);
922	hesync = (var->hsync_len >> 1) - 1;
923	heblank = (var->left_margin >> 1) + hesync;
924	piped = heblank - piped_diff;
925	heq = var->hsync_len >> 2;
926	hlfln = (hperiod+2) >> 1;
927	hserr = hssync-hesync;
928	vperiod = (var->vsync_len + var->lower_margin + par->yres
929		   + var->upper_margin) << 1;
930	vssync = vperiod - 2;
931	vesync = (var->vsync_len << 1) - vperiod + vssync;
932	veblank = (var->upper_margin << 1) + vesync;
933	vsblank = vssync - (var->lower_margin << 1);
934	vswin = (vsblank+vssync) >> 1;
935	vewin = (vesync+veblank) >> 1;
936
937	r->regs[0] = vswin;
938	r->regs[1] = vsblank;
939	r->regs[2] = veblank;
940	r->regs[3] = vewin;
941	r->regs[4] = vesync;
942	r->regs[5] = vssync;
943	r->regs[6] = vperiod;
944	r->regs[7] = piped;
945	r->regs[8] = hperiod;
946	r->regs[9] = hsblank;
947	r->regs[10] = heblank;
948	r->regs[11] = hesync;
949	r->regs[12] = hssync;
950	r->regs[13] = heq;
951	r->regs[14] = hlfln;
952	r->regs[15] = hserr;
953
954	if (par->xres >= 1280 && par->cmode >= CMODE_16)
955		par->ctrl = 0x7f;
956	else
957		par->ctrl = 0x3b;
958
959	if (mac_var_to_vmode(var, &par->vmode, &cmode))
960		par->vmode = 0;
961
962	return 0;
963}
964
965
966/*
967 * Convert hardware data in par to an fb_var_screeninfo
968 */
969
970static void control_par_to_var(struct fb_par_control *par, struct fb_var_screeninfo *var)
971{
972	struct control_regints *rv;
973
974	rv = (struct control_regints *) par->regvals.regs;
975
976	memset(var, 0, sizeof(*var));
977	var->xres = par->xres;
978	var->yres = par->yres;
979	var->xres_virtual = par->vxres;
980	var->yres_virtual = par->vyres;
981	var->xoffset = par->xoffset;
982	var->yoffset = par->yoffset;
983
984	switch(par->cmode) {
985	default:
986	case CMODE_8:
987		var->bits_per_pixel = 8;
988		var->red.length = 8;
989		var->green.length = 8;
990		var->blue.length = 8;
991		break;
992	case CMODE_16:	/* RGB 555 */
993		var->bits_per_pixel = 16;
994		var->red.offset = 10;
995		var->red.length = 5;
996		var->green.offset = 5;
997		var->green.length = 5;
998		var->blue.length = 5;
999		break;
1000	case CMODE_32:	/* RGB 888 */
1001		var->bits_per_pixel = 32;
1002		var->red.offset = 16;
1003		var->red.length = 8;
1004		var->green.offset = 8;
1005		var->green.length = 8;
1006		var->blue.length = 8;
1007		var->transp.offset = 24;
1008		var->transp.length = 8;
1009		break;
1010	}
1011	var->height = -1;
1012	var->width = -1;
1013	var->vmode = FB_VMODE_NONINTERLACED;
1014
1015	var->left_margin = (rv->heblank - rv->hesync) << 1;
1016	var->right_margin = (rv->hssync - rv->hsblank) << 1;
1017	var->hsync_len = (rv->hperiod + 2 - rv->hssync + rv->hesync) << 1;
1018
1019	var->upper_margin = (rv->veblank - rv->vesync) >> 1;
1020	var->lower_margin = (rv->vssync - rv->vsblank) >> 1;
1021	var->vsync_len = (rv->vperiod - rv->vssync + rv->vesync) >> 1;
1022
1023	var->sync = par->sync;
1024
1025	/*
1026	 * 10^12 * clock_params[0] / (3906400 * clock_params[1]
1027	 *			      * 2^clock_params[2])
1028	 * (10^12 * clock_params[0] / (3906400 * clock_params[1]))
1029	 * >> clock_params[2]
1030	 */
1031	/* (255990.17 * clock_params[0] / clock_params[1]) >> clock_params[2] */
1032	var->pixclock = CONTROL_PIXCLOCK_BASE * par->regvals.clock_params[0];
1033	var->pixclock /= par->regvals.clock_params[1];
1034	var->pixclock >>= par->regvals.clock_params[2];
1035}
1036
1037/*
1038 * Set misc info vars for this driver
1039 */
1040static void __init control_init_info(struct fb_info *info, struct fb_info_control *p)
1041{
1042	/* Fill fb_info */
1043	info->par = &p->par;
1044	info->fbops = &controlfb_ops;
1045	info->pseudo_palette = p->pseudo_palette;
1046        info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1047	info->screen_base = p->frame_buffer + CTRLFB_OFF;
1048
1049	fb_alloc_cmap(&info->cmap, 256, 0);
1050
1051	/* Fill fix common fields */
1052	strcpy(info->fix.id, "control");
1053	info->fix.mmio_start = p->control_regs_phys;
1054	info->fix.mmio_len = sizeof(struct control_regs);
1055	info->fix.type = FB_TYPE_PACKED_PIXELS;
1056	info->fix.smem_start = p->frame_buffer_phys + CTRLFB_OFF;
1057	info->fix.smem_len = p->total_vram - CTRLFB_OFF;
1058        info->fix.ywrapstep = 0;
1059        info->fix.type_aux = 0;
1060        info->fix.accel = FB_ACCEL_NONE;
1061}
1062
1063
1064static void control_cleanup(void)
1065{
1066	struct fb_info_control	*p = control_fb;
1067
1068	if (!p)
1069		return;
1070
1071	if (p->cmap_regs)
1072		iounmap(p->cmap_regs);
1073	if (p->control_regs)
1074		iounmap(p->control_regs);
1075	if (p->frame_buffer) {
1076		if (p->control_use_bank2)
1077			p->frame_buffer -= 0x600000;
1078		iounmap(p->frame_buffer);
1079	}
1080	if (p->cmap_regs_phys)
1081		release_mem_region(p->cmap_regs_phys, 0x1000);
1082	if (p->control_regs_phys)
1083		release_mem_region(p->control_regs_phys, p->control_regs_size);
1084	if (p->fb_orig_base)
1085		release_mem_region(p->fb_orig_base, p->fb_orig_size);
1086	kfree(p);
1087}
1088
1089
1090