1#ifndef CARMINE_CARMINE_H 2#define CARMINE_CARMINE_H 3 4#define CARMINE_MEMORY_BAR 2 5#define CARMINE_CONFIG_BAR 3 6 7#define MAX_DISPLAY 2 8#define CARMINE_DISPLAY_MEM (800 * 600 * 4) 9#define CARMINE_TOTAL_DIPLAY_MEM (CARMINE_DISPLAY_MEM * MAX_DISPLAY) 10 11#define CARMINE_USE_DISPLAY0 (1 << 0) 12#define CARMINE_USE_DISPLAY1 (1 << 1) 13 14/* 15 * This values work on the eval card. Custom boards may use different timings, 16 * here an example :) 17 */ 18 19/* DRAM initialization values */ 20#ifdef CONFIG_FB_CARMINE_DRAM_EVAL 21 22#define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff) 23#define CARMINE_DFLT_IP_DCTL_ADD (0x05c3) 24#define CARMINE_DFLT_IP_DCTL_MODE (0x0121) 25#define CARMINE_DFLT_IP_DCTL_EMODE (0x8000) 26#define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x4749) 27#define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x2a22) 28#define CARMINE_DFLT_IP_DCTL_REFRESH (0x0042) 29#define CARMINE_DFLT_IP_DCTL_STATES (0x0003) 30#define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020) 31#define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f) 32#define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000) 33#define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x6646) 34#define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x0055) 35#define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0021) 36#define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002) 37#define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555) 38#define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555) 39#define CARMINE_DCTL_DLL_RESET (1) 40#endif 41 42#ifdef CONFIG_CARMINE_DRAM_CUSTOM 43 44#define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff) 45#define CARMINE_DFLT_IP_DCTL_ADD (0x03b2) 46#define CARMINE_DFLT_IP_DCTL_MODE (0x0161) 47#define CARMINE_DFLT_IP_DCTL_EMODE (0x8000) 48#define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x2628) 49#define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x1a09) 50#define CARMINE_DFLT_IP_DCTL_REFRESH (0x00fe) 51#define CARMINE_DFLT_IP_DCTL_STATES (0x0003) 52#define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020) 53#define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f) 54#define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000) 55#define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x0646) 56#define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x55aa) 57#define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0061) 58#define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002) 59#define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555) 60#define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555) 61#define CARMINE_DCTL_DLL_RESET (1) 62#endif 63 64#endif 65