1/* 2 * otg_fsm.c - ChipIdea USB IP core OTG FSM driver 3 * 4 * Copyright (C) 2014 Freescale Semiconductor, Inc. 5 * 6 * Author: Jun Li 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13/* 14 * This file mainly handles OTG fsm, it includes OTG fsm operations 15 * for HNP and SRP. 16 * 17 * TODO List 18 * - ADP 19 * - OTG test device 20 */ 21 22#include <linux/usb/otg.h> 23#include <linux/usb/gadget.h> 24#include <linux/usb/hcd.h> 25#include <linux/usb/chipidea.h> 26#include <linux/regulator/consumer.h> 27 28#include "ci.h" 29#include "bits.h" 30#include "otg.h" 31#include "otg_fsm.h" 32 33/* Add for otg: interact with user space app */ 34static ssize_t 35get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf) 36{ 37 char *next; 38 unsigned size, t; 39 struct ci_hdrc *ci = dev_get_drvdata(dev); 40 41 next = buf; 42 size = PAGE_SIZE; 43 t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_req); 44 size -= t; 45 next += t; 46 47 return PAGE_SIZE - size; 48} 49 50static ssize_t 51set_a_bus_req(struct device *dev, struct device_attribute *attr, 52 const char *buf, size_t count) 53{ 54 struct ci_hdrc *ci = dev_get_drvdata(dev); 55 56 if (count > 2) 57 return -1; 58 59 mutex_lock(&ci->fsm.lock); 60 if (buf[0] == '0') { 61 ci->fsm.a_bus_req = 0; 62 } else if (buf[0] == '1') { 63 /* If a_bus_drop is TRUE, a_bus_req can't be set */ 64 if (ci->fsm.a_bus_drop) { 65 mutex_unlock(&ci->fsm.lock); 66 return count; 67 } 68 ci->fsm.a_bus_req = 1; 69 } 70 71 ci_otg_queue_work(ci); 72 mutex_unlock(&ci->fsm.lock); 73 74 return count; 75} 76static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req); 77 78static ssize_t 79get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf) 80{ 81 char *next; 82 unsigned size, t; 83 struct ci_hdrc *ci = dev_get_drvdata(dev); 84 85 next = buf; 86 size = PAGE_SIZE; 87 t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_drop); 88 size -= t; 89 next += t; 90 91 return PAGE_SIZE - size; 92} 93 94static ssize_t 95set_a_bus_drop(struct device *dev, struct device_attribute *attr, 96 const char *buf, size_t count) 97{ 98 struct ci_hdrc *ci = dev_get_drvdata(dev); 99 100 if (count > 2) 101 return -1; 102 103 mutex_lock(&ci->fsm.lock); 104 if (buf[0] == '0') { 105 ci->fsm.a_bus_drop = 0; 106 } else if (buf[0] == '1') { 107 ci->fsm.a_bus_drop = 1; 108 ci->fsm.a_bus_req = 0; 109 } 110 111 ci_otg_queue_work(ci); 112 mutex_unlock(&ci->fsm.lock); 113 114 return count; 115} 116static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop, 117 set_a_bus_drop); 118 119static ssize_t 120get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf) 121{ 122 char *next; 123 unsigned size, t; 124 struct ci_hdrc *ci = dev_get_drvdata(dev); 125 126 next = buf; 127 size = PAGE_SIZE; 128 t = scnprintf(next, size, "%d\n", ci->fsm.b_bus_req); 129 size -= t; 130 next += t; 131 132 return PAGE_SIZE - size; 133} 134 135static ssize_t 136set_b_bus_req(struct device *dev, struct device_attribute *attr, 137 const char *buf, size_t count) 138{ 139 struct ci_hdrc *ci = dev_get_drvdata(dev); 140 141 if (count > 2) 142 return -1; 143 144 mutex_lock(&ci->fsm.lock); 145 if (buf[0] == '0') 146 ci->fsm.b_bus_req = 0; 147 else if (buf[0] == '1') 148 ci->fsm.b_bus_req = 1; 149 150 ci_otg_queue_work(ci); 151 mutex_unlock(&ci->fsm.lock); 152 153 return count; 154} 155static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req); 156 157static ssize_t 158set_a_clr_err(struct device *dev, struct device_attribute *attr, 159 const char *buf, size_t count) 160{ 161 struct ci_hdrc *ci = dev_get_drvdata(dev); 162 163 if (count > 2) 164 return -1; 165 166 mutex_lock(&ci->fsm.lock); 167 if (buf[0] == '1') 168 ci->fsm.a_clr_err = 1; 169 170 ci_otg_queue_work(ci); 171 mutex_unlock(&ci->fsm.lock); 172 173 return count; 174} 175static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err); 176 177static struct attribute *inputs_attrs[] = { 178 &dev_attr_a_bus_req.attr, 179 &dev_attr_a_bus_drop.attr, 180 &dev_attr_b_bus_req.attr, 181 &dev_attr_a_clr_err.attr, 182 NULL, 183}; 184 185static struct attribute_group inputs_attr_group = { 186 .name = "inputs", 187 .attrs = inputs_attrs, 188}; 189 190/* 191 * Keep this list in the same order as timers indexed 192 * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h 193 */ 194static unsigned otg_timer_ms[] = { 195 TA_WAIT_VRISE, 196 TA_WAIT_VFALL, 197 TA_WAIT_BCON, 198 TA_AIDL_BDIS, 199 TB_ASE0_BRST, 200 TA_BIDL_ADIS, 201 TB_SE0_SRP, 202 TB_SRP_FAIL, 203 0, 204 TB_DATA_PLS, 205 TB_SSEND_SRP, 206}; 207 208/* 209 * Add timer to active timer list 210 */ 211static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t) 212{ 213 unsigned long flags, timer_sec, timer_nsec; 214 215 if (t >= NUM_OTG_FSM_TIMERS) 216 return; 217 218 spin_lock_irqsave(&ci->lock, flags); 219 timer_sec = otg_timer_ms[t] / MSEC_PER_SEC; 220 timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC; 221 ci->hr_timeouts[t] = ktime_add(ktime_get(), 222 ktime_set(timer_sec, timer_nsec)); 223 ci->enabled_otg_timer_bits |= (1 << t); 224 if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) || 225 (ci->hr_timeouts[ci->next_otg_timer].tv64 > 226 ci->hr_timeouts[t].tv64)) { 227 ci->next_otg_timer = t; 228 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, 229 ci->hr_timeouts[t], NSEC_PER_MSEC, 230 HRTIMER_MODE_ABS); 231 } 232 spin_unlock_irqrestore(&ci->lock, flags); 233} 234 235/* 236 * Remove timer from active timer list 237 */ 238static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t) 239{ 240 unsigned long flags, enabled_timer_bits; 241 enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS; 242 243 if ((t >= NUM_OTG_FSM_TIMERS) || 244 !(ci->enabled_otg_timer_bits & (1 << t))) 245 return; 246 247 spin_lock_irqsave(&ci->lock, flags); 248 ci->enabled_otg_timer_bits &= ~(1 << t); 249 if (ci->next_otg_timer == t) { 250 if (ci->enabled_otg_timer_bits == 0) { 251 /* No enabled timers after delete it */ 252 hrtimer_cancel(&ci->otg_fsm_hrtimer); 253 ci->next_otg_timer = NUM_OTG_FSM_TIMERS; 254 } else { 255 /* Find the next timer */ 256 enabled_timer_bits = ci->enabled_otg_timer_bits; 257 for_each_set_bit(cur_timer, &enabled_timer_bits, 258 NUM_OTG_FSM_TIMERS) { 259 if ((next_timer == NUM_OTG_FSM_TIMERS) || 260 (ci->hr_timeouts[next_timer].tv64 < 261 ci->hr_timeouts[cur_timer].tv64)) 262 next_timer = cur_timer; 263 } 264 } 265 } 266 if (next_timer != NUM_OTG_FSM_TIMERS) { 267 ci->next_otg_timer = next_timer; 268 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, 269 ci->hr_timeouts[next_timer], NSEC_PER_MSEC, 270 HRTIMER_MODE_ABS); 271 } 272 spin_unlock_irqrestore(&ci->lock, flags); 273} 274 275/* OTG FSM timer handlers */ 276static int a_wait_vrise_tmout(struct ci_hdrc *ci) 277{ 278 ci->fsm.a_wait_vrise_tmout = 1; 279 return 0; 280} 281 282static int a_wait_vfall_tmout(struct ci_hdrc *ci) 283{ 284 ci->fsm.a_wait_vfall_tmout = 1; 285 return 0; 286} 287 288static int a_wait_bcon_tmout(struct ci_hdrc *ci) 289{ 290 ci->fsm.a_wait_bcon_tmout = 1; 291 return 0; 292} 293 294static int a_aidl_bdis_tmout(struct ci_hdrc *ci) 295{ 296 ci->fsm.a_aidl_bdis_tmout = 1; 297 return 0; 298} 299 300static int b_ase0_brst_tmout(struct ci_hdrc *ci) 301{ 302 ci->fsm.b_ase0_brst_tmout = 1; 303 return 0; 304} 305 306static int a_bidl_adis_tmout(struct ci_hdrc *ci) 307{ 308 ci->fsm.a_bidl_adis_tmout = 1; 309 return 0; 310} 311 312static int b_se0_srp_tmout(struct ci_hdrc *ci) 313{ 314 ci->fsm.b_se0_srp = 1; 315 return 0; 316} 317 318static int b_srp_fail_tmout(struct ci_hdrc *ci) 319{ 320 ci->fsm.b_srp_done = 1; 321 return 1; 322} 323 324static int b_data_pls_tmout(struct ci_hdrc *ci) 325{ 326 ci->fsm.b_srp_done = 1; 327 ci->fsm.b_bus_req = 0; 328 if (ci->fsm.power_up) 329 ci->fsm.power_up = 0; 330 hw_write_otgsc(ci, OTGSC_HABA, 0); 331 pm_runtime_put(ci->dev); 332 return 0; 333} 334 335static int b_ssend_srp_tmout(struct ci_hdrc *ci) 336{ 337 ci->fsm.b_ssend_srp = 1; 338 /* only vbus fall below B_sess_vld in b_idle state */ 339 if (ci->fsm.otg->state == OTG_STATE_B_IDLE) 340 return 0; 341 else 342 return 1; 343} 344 345/* 346 * Keep this list in the same order as timers indexed 347 * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h 348 */ 349static int (*otg_timer_handlers[])(struct ci_hdrc *) = { 350 a_wait_vrise_tmout, /* A_WAIT_VRISE */ 351 a_wait_vfall_tmout, /* A_WAIT_VFALL */ 352 a_wait_bcon_tmout, /* A_WAIT_BCON */ 353 a_aidl_bdis_tmout, /* A_AIDL_BDIS */ 354 b_ase0_brst_tmout, /* B_ASE0_BRST */ 355 a_bidl_adis_tmout, /* A_BIDL_ADIS */ 356 b_se0_srp_tmout, /* B_SE0_SRP */ 357 b_srp_fail_tmout, /* B_SRP_FAIL */ 358 NULL, /* A_WAIT_ENUM */ 359 b_data_pls_tmout, /* B_DATA_PLS */ 360 b_ssend_srp_tmout, /* B_SSEND_SRP */ 361}; 362 363/* 364 * Enable the next nearest enabled timer if have 365 */ 366static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t) 367{ 368 struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer); 369 ktime_t now, *timeout; 370 unsigned long enabled_timer_bits; 371 unsigned long flags; 372 enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS; 373 int ret = -EINVAL; 374 375 spin_lock_irqsave(&ci->lock, flags); 376 enabled_timer_bits = ci->enabled_otg_timer_bits; 377 ci->next_otg_timer = NUM_OTG_FSM_TIMERS; 378 379 now = ktime_get(); 380 for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) { 381 if (now.tv64 >= ci->hr_timeouts[cur_timer].tv64) { 382 ci->enabled_otg_timer_bits &= ~(1 << cur_timer); 383 if (otg_timer_handlers[cur_timer]) 384 ret = otg_timer_handlers[cur_timer](ci); 385 } else { 386 if ((next_timer == NUM_OTG_FSM_TIMERS) || 387 (ci->hr_timeouts[cur_timer].tv64 < 388 ci->hr_timeouts[next_timer].tv64)) 389 next_timer = cur_timer; 390 } 391 } 392 /* Enable the next nearest timer */ 393 if (next_timer < NUM_OTG_FSM_TIMERS) { 394 timeout = &ci->hr_timeouts[next_timer]; 395 hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout, 396 NSEC_PER_MSEC, HRTIMER_MODE_ABS); 397 ci->next_otg_timer = next_timer; 398 } 399 spin_unlock_irqrestore(&ci->lock, flags); 400 401 if (!ret) 402 ci_otg_queue_work(ci); 403 404 return HRTIMER_NORESTART; 405} 406 407/* Initialize timers */ 408static int ci_otg_init_timers(struct ci_hdrc *ci) 409{ 410 hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); 411 ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func; 412 413 return 0; 414} 415 416/* -------------------------------------------------------------*/ 417/* Operations that will be called from OTG Finite State Machine */ 418/* -------------------------------------------------------------*/ 419static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) 420{ 421 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 422 423 if (t < NUM_OTG_FSM_TIMERS) 424 ci_otg_add_timer(ci, t); 425 return; 426} 427 428static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) 429{ 430 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 431 432 if (t < NUM_OTG_FSM_TIMERS) 433 ci_otg_del_timer(ci, t); 434 return; 435} 436 437/* 438 * A-device drive vbus: turn on vbus regulator and enable port power 439 * Data pulse irq should be disabled while vbus is on. 440 */ 441static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on) 442{ 443 int ret; 444 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 445 446 if (on) { 447 /* Enable power power */ 448 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 449 PORTSC_PP); 450 if (ci->platdata->reg_vbus) { 451 ret = regulator_enable(ci->platdata->reg_vbus); 452 if (ret) { 453 dev_err(ci->dev, 454 "Failed to enable vbus regulator, ret=%d\n", 455 ret); 456 return; 457 } 458 } 459 /* Disable data pulse irq */ 460 hw_write_otgsc(ci, OTGSC_DPIE, 0); 461 462 fsm->a_srp_det = 0; 463 fsm->power_up = 0; 464 } else { 465 if (ci->platdata->reg_vbus) 466 regulator_disable(ci->platdata->reg_vbus); 467 468 fsm->a_bus_drop = 1; 469 fsm->a_bus_req = 0; 470 } 471} 472 473/* 474 * Control data line by Run Stop bit. 475 */ 476static void ci_otg_loc_conn(struct otg_fsm *fsm, int on) 477{ 478 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 479 480 if (on) 481 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); 482 else 483 hw_write(ci, OP_USBCMD, USBCMD_RS, 0); 484} 485 486/* 487 * Generate SOF by host. 488 * This is controlled through suspend/resume the port. 489 * In host mode, controller will automatically send SOF. 490 * Suspend will block the data on the port. 491 */ 492static void ci_otg_loc_sof(struct otg_fsm *fsm, int on) 493{ 494 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 495 496 if (on) 497 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_FPR, 498 PORTSC_FPR); 499 else 500 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_SUSP, 501 PORTSC_SUSP); 502} 503 504/* 505 * Start SRP pulsing by data-line pulsing, 506 * no v-bus pulsing followed 507 */ 508static void ci_otg_start_pulse(struct otg_fsm *fsm) 509{ 510 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 511 512 /* Hardware Assistant Data pulse */ 513 hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP); 514 515 pm_runtime_get(ci->dev); 516 ci_otg_add_timer(ci, B_DATA_PLS); 517} 518 519static int ci_otg_start_host(struct otg_fsm *fsm, int on) 520{ 521 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 522 523 if (on) { 524 ci_role_stop(ci); 525 ci_role_start(ci, CI_ROLE_HOST); 526 } else { 527 ci_role_stop(ci); 528 hw_device_reset(ci); 529 ci_role_start(ci, CI_ROLE_GADGET); 530 } 531 return 0; 532} 533 534static int ci_otg_start_gadget(struct otg_fsm *fsm, int on) 535{ 536 struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); 537 538 if (on) 539 usb_gadget_vbus_connect(&ci->gadget); 540 else 541 usb_gadget_vbus_disconnect(&ci->gadget); 542 543 return 0; 544} 545 546static struct otg_fsm_ops ci_otg_ops = { 547 .drv_vbus = ci_otg_drv_vbus, 548 .loc_conn = ci_otg_loc_conn, 549 .loc_sof = ci_otg_loc_sof, 550 .start_pulse = ci_otg_start_pulse, 551 .add_timer = ci_otg_fsm_add_timer, 552 .del_timer = ci_otg_fsm_del_timer, 553 .start_host = ci_otg_start_host, 554 .start_gadget = ci_otg_start_gadget, 555}; 556 557int ci_otg_fsm_work(struct ci_hdrc *ci) 558{ 559 /* 560 * Don't do fsm transition for B device 561 * when there is no gadget class driver 562 */ 563 if (ci->fsm.id && !(ci->driver) && 564 ci->fsm.otg->state < OTG_STATE_A_IDLE) 565 return 0; 566 567 pm_runtime_get_sync(ci->dev); 568 if (otg_statemachine(&ci->fsm)) { 569 if (ci->fsm.otg->state == OTG_STATE_A_IDLE) { 570 /* 571 * Further state change for cases: 572 * a_idle to b_idle; or 573 * a_idle to a_wait_vrise due to ID change(1->0), so 574 * B-dev becomes A-dev can try to start new session 575 * consequently; or 576 * a_idle to a_wait_vrise when power up 577 */ 578 if ((ci->fsm.id) || (ci->id_event) || 579 (ci->fsm.power_up)) { 580 ci_otg_queue_work(ci); 581 } else { 582 /* Enable data pulse irq */ 583 hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | 584 PORTSC_PP, 0); 585 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS); 586 hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE); 587 } 588 if (ci->id_event) 589 ci->id_event = false; 590 } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) { 591 if (ci->fsm.b_sess_vld) { 592 ci->fsm.power_up = 0; 593 /* 594 * Further transite to b_periphearl state 595 * when register gadget driver with vbus on 596 */ 597 ci_otg_queue_work(ci); 598 } 599 } else if (ci->fsm.otg->state == OTG_STATE_A_HOST) { 600 pm_runtime_mark_last_busy(ci->dev); 601 pm_runtime_put_autosuspend(ci->dev); 602 return 0; 603 } 604 } 605 pm_runtime_put_sync(ci->dev); 606 return 0; 607} 608 609/* 610 * Update fsm variables in each state if catching expected interrupts, 611 * called by otg fsm isr. 612 */ 613static void ci_otg_fsm_event(struct ci_hdrc *ci) 614{ 615 u32 intr_sts, otg_bsess_vld, port_conn; 616 struct otg_fsm *fsm = &ci->fsm; 617 618 intr_sts = hw_read_intr_status(ci); 619 otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV); 620 port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS); 621 622 switch (ci->fsm.otg->state) { 623 case OTG_STATE_A_WAIT_BCON: 624 if (port_conn) { 625 fsm->b_conn = 1; 626 fsm->a_bus_req = 1; 627 ci_otg_queue_work(ci); 628 } 629 break; 630 case OTG_STATE_B_IDLE: 631 if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) { 632 fsm->b_sess_vld = 1; 633 ci_otg_queue_work(ci); 634 } 635 break; 636 case OTG_STATE_B_PERIPHERAL: 637 if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) { 638 fsm->a_bus_suspend = 1; 639 ci_otg_queue_work(ci); 640 } else if (intr_sts & USBi_PCI) { 641 if (fsm->a_bus_suspend == 1) 642 fsm->a_bus_suspend = 0; 643 } 644 break; 645 case OTG_STATE_B_HOST: 646 if ((intr_sts & USBi_PCI) && !port_conn) { 647 fsm->a_conn = 0; 648 fsm->b_bus_req = 0; 649 ci_otg_queue_work(ci); 650 } 651 break; 652 case OTG_STATE_A_PERIPHERAL: 653 if (intr_sts & USBi_SLI) { 654 fsm->b_bus_suspend = 1; 655 /* 656 * Init a timer to know how long this suspend 657 * will continue, if time out, indicates B no longer 658 * wants to be host role 659 */ 660 ci_otg_add_timer(ci, A_BIDL_ADIS); 661 } 662 663 if (intr_sts & USBi_URI) 664 ci_otg_del_timer(ci, A_BIDL_ADIS); 665 666 if (intr_sts & USBi_PCI) { 667 if (fsm->b_bus_suspend == 1) { 668 ci_otg_del_timer(ci, A_BIDL_ADIS); 669 fsm->b_bus_suspend = 0; 670 } 671 } 672 break; 673 case OTG_STATE_A_SUSPEND: 674 if ((intr_sts & USBi_PCI) && !port_conn) { 675 fsm->b_conn = 0; 676 677 /* if gadget driver is binded */ 678 if (ci->driver) { 679 /* A device to be peripheral mode */ 680 ci->gadget.is_a_peripheral = 1; 681 } 682 ci_otg_queue_work(ci); 683 } 684 break; 685 case OTG_STATE_A_HOST: 686 if ((intr_sts & USBi_PCI) && !port_conn) { 687 fsm->b_conn = 0; 688 ci_otg_queue_work(ci); 689 } 690 break; 691 case OTG_STATE_B_WAIT_ACON: 692 if ((intr_sts & USBi_PCI) && port_conn) { 693 fsm->a_conn = 1; 694 ci_otg_queue_work(ci); 695 } 696 break; 697 default: 698 break; 699 } 700} 701 702/* 703 * ci_otg_irq - otg fsm related irq handling 704 * and also update otg fsm variable by monitoring usb host and udc 705 * state change interrupts. 706 * @ci: ci_hdrc 707 */ 708irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci) 709{ 710 irqreturn_t retval = IRQ_NONE; 711 u32 otgsc, otg_int_src = 0; 712 struct otg_fsm *fsm = &ci->fsm; 713 714 otgsc = hw_read_otgsc(ci, ~0); 715 otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8); 716 fsm->id = (otgsc & OTGSC_ID) ? 1 : 0; 717 718 if (otg_int_src) { 719 if (otg_int_src & OTGSC_DPIS) { 720 hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS); 721 fsm->a_srp_det = 1; 722 fsm->a_bus_drop = 0; 723 } else if (otg_int_src & OTGSC_IDIS) { 724 hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS); 725 if (fsm->id == 0) { 726 fsm->a_bus_drop = 0; 727 fsm->a_bus_req = 1; 728 ci->id_event = true; 729 } 730 } else if (otg_int_src & OTGSC_BSVIS) { 731 hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS); 732 if (otgsc & OTGSC_BSV) { 733 fsm->b_sess_vld = 1; 734 ci_otg_del_timer(ci, B_SSEND_SRP); 735 ci_otg_del_timer(ci, B_SRP_FAIL); 736 fsm->b_ssend_srp = 0; 737 } else { 738 fsm->b_sess_vld = 0; 739 if (fsm->id) 740 ci_otg_add_timer(ci, B_SSEND_SRP); 741 } 742 } else if (otg_int_src & OTGSC_AVVIS) { 743 hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS); 744 if (otgsc & OTGSC_AVV) { 745 fsm->a_vbus_vld = 1; 746 } else { 747 fsm->a_vbus_vld = 0; 748 fsm->b_conn = 0; 749 } 750 } 751 ci_otg_queue_work(ci); 752 return IRQ_HANDLED; 753 } 754 755 ci_otg_fsm_event(ci); 756 757 return retval; 758} 759 760void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci) 761{ 762 ci_otg_queue_work(ci); 763} 764 765int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci) 766{ 767 int retval = 0; 768 769 if (ci->phy) 770 ci->otg.phy = ci->phy; 771 else 772 ci->otg.usb_phy = ci->usb_phy; 773 774 ci->otg.gadget = &ci->gadget; 775 ci->fsm.otg = &ci->otg; 776 ci->fsm.power_up = 1; 777 ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0; 778 ci->fsm.otg->state = OTG_STATE_UNDEFINED; 779 ci->fsm.ops = &ci_otg_ops; 780 781 mutex_init(&ci->fsm.lock); 782 783 retval = ci_otg_init_timers(ci); 784 if (retval) { 785 dev_err(ci->dev, "Couldn't init OTG timers\n"); 786 return retval; 787 } 788 ci->enabled_otg_timer_bits = 0; 789 ci->next_otg_timer = NUM_OTG_FSM_TIMERS; 790 791 retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group); 792 if (retval < 0) { 793 dev_dbg(ci->dev, 794 "Can't register sysfs attr group: %d\n", retval); 795 return retval; 796 } 797 798 /* Enable A vbus valid irq */ 799 hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE); 800 801 if (ci->fsm.id) { 802 ci->fsm.b_ssend_srp = 803 hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1; 804 ci->fsm.b_sess_vld = 805 hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0; 806 /* Enable BSV irq */ 807 hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE); 808 } 809 810 return 0; 811} 812 813void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci) 814{ 815 sysfs_remove_group(&ci->dev->kobj, &inputs_attr_group); 816} 817