1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __RX_H__
26#define __RX_H__
27
28#include <linux/bitops.h>
29
30#define WL1271_RX_MAX_RSSI -30
31#define WL1271_RX_MIN_RSSI -95
32
33#define SHORT_PREAMBLE_BIT   BIT(0)
34#define OFDM_RATE_BIT        BIT(6)
35#define PBCC_RATE_BIT        BIT(7)
36
37#define PLCP_HEADER_LENGTH 8
38#define RX_DESC_PACKETID_SHIFT 11
39#define RX_MAX_PACKET_ID 3
40
41#define RX_DESC_VALID_FCS         0x0001
42#define RX_DESC_MATCH_RXADDR1     0x0002
43#define RX_DESC_MCAST             0x0004
44#define RX_DESC_STAINTIM          0x0008
45#define RX_DESC_VIRTUAL_BM        0x0010
46#define RX_DESC_BCAST             0x0020
47#define RX_DESC_MATCH_SSID        0x0040
48#define RX_DESC_MATCH_BSSID       0x0080
49#define RX_DESC_ENCRYPTION_MASK   0x0300
50#define RX_DESC_MEASURMENT        0x0400
51#define RX_DESC_SEQNUM_MASK       0x1800
52#define	RX_DESC_MIC_FAIL	  0x2000
53#define	RX_DESC_DECRYPT_FAIL	  0x4000
54
55/*
56 * RX Descriptor flags:
57 *
58 * Bits 0-1 - band
59 * Bit  2   - STBC
60 * Bit  3   - A-MPDU
61 * Bit  4   - HT
62 * Bits 5-7 - encryption
63 */
64#define WL1271_RX_DESC_BAND_MASK    0x03
65#define WL1271_RX_DESC_ENCRYPT_MASK 0xE0
66
67#define WL1271_RX_DESC_BAND_BG      0x00
68#define WL1271_RX_DESC_BAND_J       0x01
69#define WL1271_RX_DESC_BAND_A       0x02
70
71#define WL1271_RX_DESC_STBC         BIT(2)
72#define WL1271_RX_DESC_A_MPDU       BIT(3)
73#define WL1271_RX_DESC_HT           BIT(4)
74
75#define WL1271_RX_DESC_ENCRYPT_WEP  0x20
76#define WL1271_RX_DESC_ENCRYPT_TKIP 0x40
77#define WL1271_RX_DESC_ENCRYPT_AES  0x60
78#define WL1271_RX_DESC_ENCRYPT_GEM  0x80
79
80/*
81 * RX Descriptor status
82 *
83 * Bits 0-2 - error code
84 * Bits 3-5 - process_id tag (AP mode FW)
85 * Bits 6-7 - reserved
86 */
87#define WL1271_RX_DESC_STATUS_MASK      0x07
88
89#define WL1271_RX_DESC_SUCCESS          0x00
90#define WL1271_RX_DESC_DECRYPT_FAIL     0x01
91#define WL1271_RX_DESC_MIC_FAIL         0x02
92
93#define RX_MEM_BLOCK_MASK            0xFF
94#define RX_BUF_SIZE_MASK             0xFFF00
95#define RX_BUF_SIZE_SHIFT_DIV        6
96#define ALIGNED_RX_BUF_SIZE_MASK     0xFFFF00
97#define ALIGNED_RX_BUF_SIZE_SHIFT    8
98
99/* If set, the start of IP payload is not 4 bytes aligned */
100#define RX_BUF_UNALIGNED_PAYLOAD     BIT(20)
101
102/* If set, the buffer was padded by the FW to be 4 bytes aligned */
103#define RX_BUF_PADDED_PAYLOAD        BIT(30)
104
105/*
106 * Account for the padding inserted by the FW in case of RX_ALIGNMENT
107 * or for fixing alignment in case the packet wasn't aligned.
108 */
109#define RX_BUF_ALIGN                 2
110
111/* Describes the alignment state of a Rx buffer */
112enum wl_rx_buf_align {
113	WLCORE_RX_BUF_ALIGNED,
114	WLCORE_RX_BUF_UNALIGNED,
115	WLCORE_RX_BUF_PADDED,
116};
117
118enum {
119	WL12XX_RX_CLASS_UNKNOWN,
120	WL12XX_RX_CLASS_MANAGEMENT,
121	WL12XX_RX_CLASS_DATA,
122	WL12XX_RX_CLASS_QOS_DATA,
123	WL12XX_RX_CLASS_BCN_PRBRSP,
124	WL12XX_RX_CLASS_EAPOL,
125	WL12XX_RX_CLASS_BA_EVENT,
126	WL12XX_RX_CLASS_AMSDU,
127	WL12XX_RX_CLASS_LOGGER,
128};
129
130struct wl1271_rx_descriptor {
131	__le16 length;
132	u8  status;
133	u8  flags;
134	u8  rate;
135	u8  channel;
136	s8  rssi;
137	u8  snr;
138	__le32 timestamp;
139	u8  packet_class;
140	u8  hlid;
141	u8  pad_len;
142	u8  reserved;
143} __packed;
144
145int wlcore_rx(struct wl1271 *wl, struct wl_fw_status *status);
146u8 wl1271_rate_to_idx(int rate, enum ieee80211_band band);
147int wl1271_rx_filter_enable(struct wl1271 *wl,
148			    int index, bool enable,
149			    struct wl12xx_rx_filter *filter);
150int wl1271_rx_filter_clear_all(struct wl1271 *wl);
151
152#endif
153