1/*
2 * eeprom specific definitions for mac80211 Prism54 drivers
3 *
4 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
5 * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
6 *
7 * Based on:
8 * - the islsm (softmac prism54) driver, which is:
9 *   Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
10 *
11 * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
12 *   Copyright (C) 2007 Conexant Systems, Inc.
13 *
14 * - islmvc driver
15 *   Copyright (C) 2001 Intersil Americas Inc.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#ifndef EEPROM_H
23#define EEPROM_H
24
25/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
26
27struct pda_entry {
28	__le16 len;	/* includes both code and data */
29	__le16 code;
30	u8 data[0];
31} __packed;
32
33struct eeprom_pda_wrap {
34	__le32 magic;
35	__le16 pad;
36	__le16 len;
37	__le32 arm_opcode;
38	u8 data[0];
39} __packed;
40
41struct p54_iq_autocal_entry {
42	__le16 iq_param[4];
43} __packed;
44
45struct pda_iq_autocal_entry {
46	__le16 freq;
47	struct p54_iq_autocal_entry params;
48} __packed;
49
50struct pda_channel_output_limit {
51	__le16 freq;
52	u8 val_bpsk;
53	u8 val_qpsk;
54	u8 val_16qam;
55	u8 val_64qam;
56	u8 rate_set_mask;
57	u8 rate_set_size;
58} __packed;
59
60struct pda_channel_output_limit_point_longbow {
61	__le16 val_bpsk;
62	__le16 val_qpsk;
63	__le16 val_16qam;
64	__le16 val_64qam;
65} __packed;
66
67struct pda_channel_output_limit_longbow {
68	__le16 freq;
69	struct pda_channel_output_limit_point_longbow point[3];
70} __packed;
71
72struct pda_pa_curve_data_sample_rev0 {
73	u8 rf_power;
74	u8 pa_detector;
75	u8 pcv;
76} __packed;
77
78struct pda_pa_curve_data_sample_rev1 {
79	u8 rf_power;
80	u8 pa_detector;
81	u8 data_barker;
82	u8 data_bpsk;
83	u8 data_qpsk;
84	u8 data_16qam;
85	u8 data_64qam;
86} __packed;
87
88struct pda_pa_curve_data {
89	u8 cal_method_rev;
90	u8 channels;
91	u8 points_per_channel;
92	u8 padding;
93	u8 data[0];
94} __packed;
95
96struct pda_rssi_cal_ext_entry {
97	__le16 freq;
98	__le16 mul;
99	__le16 add;
100} __packed;
101
102struct pda_rssi_cal_entry {
103	__le16 mul;
104	__le16 add;
105} __packed;
106
107struct pda_country {
108	u8 regdomain;
109	u8 alpha2[2];
110	u8 flags;
111} __packed;
112
113struct pda_antenna_gain {
114	struct {
115		u8 gain_5GHz;	/* 0.25 dBi units */
116		u8 gain_2GHz;	/* 0.25 dBi units */
117	} __packed antenna[0];
118} __packed;
119
120struct pda_custom_wrapper {
121	__le16 entries;
122	__le16 entry_size;
123	__le16 offset;
124	__le16 len;
125	u8 data[0];
126} __packed;
127
128/*
129 * this defines the PDR codes used to build PDAs as defined in document
130 * number 553155. The current implementation mirrors version 1.1 of the
131 * document and lists only PDRs supported by the ARM platform.
132 */
133
134/* common and choice range (0x0000 - 0x0fff) */
135#define PDR_END					0x0000
136#define PDR_MANUFACTURING_PART_NUMBER		0x0001
137#define PDR_PDA_VERSION				0x0002
138#define PDR_NIC_SERIAL_NUMBER			0x0003
139#define PDR_NIC_RAM_SIZE			0x0005
140#define PDR_RFMODEM_SUP_RANGE			0x0006
141#define PDR_PRISM_MAC_SUP_RANGE			0x0007
142#define PDR_NIC_ID				0x0008
143
144#define PDR_MAC_ADDRESS				0x0101
145#define PDR_REGULATORY_DOMAIN_LIST		0x0103 /* obsolete */
146#define PDR_ALLOWED_CHAN_SET			0x0104
147#define PDR_DEFAULT_CHAN			0x0105
148#define PDR_TEMPERATURE_TYPE			0x0107
149
150#define PDR_IFR_SETTING				0x0200
151#define PDR_RFR_SETTING				0x0201
152#define PDR_3861_BASELINE_REG_SETTINGS		0x0202
153#define PDR_3861_SHADOW_REG_SETTINGS		0x0203
154#define PDR_3861_IFRF_REG_SETTINGS		0x0204
155
156#define PDR_3861_CHAN_CALIB_SET_POINTS		0x0300
157#define PDR_3861_CHAN_CALIB_INTEGRATOR		0x0301
158
159#define PDR_3842_PRISM_II_NIC_CONFIG		0x0400
160#define PDR_PRISM_USB_ID			0x0401
161#define PDR_PRISM_PCI_ID			0x0402
162#define PDR_PRISM_PCI_IF_CONFIG			0x0403
163#define PDR_PRISM_PCI_PM_CONFIG			0x0404
164
165#define PDR_3861_MF_TEST_CHAN_SET_POINTS	0x0900
166#define PDR_3861_MF_TEST_CHAN_INTEGRATORS	0x0901
167
168/* ARM range (0x1000 - 0x1fff) */
169#define PDR_COUNTRY_INFORMATION			0x1000 /* obsolete */
170#define PDR_INTERFACE_LIST			0x1001
171#define PDR_HARDWARE_PLATFORM_COMPONENT_ID	0x1002
172#define PDR_OEM_NAME				0x1003
173#define PDR_PRODUCT_NAME			0x1004
174#define PDR_UTF8_OEM_NAME			0x1005
175#define PDR_UTF8_PRODUCT_NAME			0x1006
176#define PDR_COUNTRY_LIST			0x1007
177#define PDR_DEFAULT_COUNTRY			0x1008
178
179#define PDR_ANTENNA_GAIN			0x1100
180
181#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA	0x1901
182#define PDR_RSSI_LINEAR_APPROXIMATION		0x1902
183#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS	0x1903
184#define PDR_PRISM_PA_CAL_CURVE_DATA		0x1904
185#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND	0x1905
186#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION		0x1906
187#define PDR_REGULATORY_POWER_LIMITS		0x1907
188#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED	0x1908
189#define PDR_RADIATED_TRANSMISSION_CORRECTION	0x1909
190#define PDR_PRISM_TX_IQ_CALIBRATION		0x190a
191
192/* reserved range (0x2000 - 0x7fff) */
193
194/* customer range (0x8000 - 0xffff) */
195#define PDR_BASEBAND_REGISTERS				0x8000
196#define PDR_PER_CHANNEL_BASEBAND_REGISTERS		0x8001
197
198/* used by our modificated eeprom image */
199#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOM		0xDEAD
200#define PDR_RSSI_LINEAR_APPROXIMATION_CUSTOMV2		0xCAFF
201#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS_CUSTOM	0xBEEF
202#define PDR_PRISM_PA_CAL_CURVE_DATA_CUSTOM		0xB05D
203
204/* Interface Definitions */
205#define PDR_INTERFACE_ROLE_SERVER	0x0000
206#define PDR_INTERFACE_ROLE_CLIENT	0x0001
207
208/* PDR definitions for default country & country list */
209#define PDR_COUNTRY_CERT_CODE		0x80
210#define PDR_COUNTRY_CERT_CODE_REAL	0x00
211#define PDR_COUNTRY_CERT_CODE_PSEUDO	0x80
212#define PDR_COUNTRY_CERT_BAND		0x40
213#define PDR_COUNTRY_CERT_BAND_2GHZ	0x00
214#define PDR_COUNTRY_CERT_BAND_5GHZ	0x40
215#define PDR_COUNTRY_CERT_IODOOR		0x30
216#define PDR_COUNTRY_CERT_IODOOR_BOTH	0x00
217#define PDR_COUNTRY_CERT_IODOOR_INDOOR	0x20
218#define PDR_COUNTRY_CERT_IODOOR_OUTDOOR	0x30
219#define PDR_COUNTRY_CERT_INDEX		0x0f
220
221/* Specific LMAC FW/HW variant definitions */
222#define PDR_SYNTH_FRONTEND_MASK		0x0007
223#define PDR_SYNTH_FRONTEND_DUETTE3	0x0001
224#define PDR_SYNTH_FRONTEND_DUETTE2	0x0002
225#define PDR_SYNTH_FRONTEND_FRISBEE	0x0003
226#define PDR_SYNTH_FRONTEND_XBOW		0x0004
227#define PDR_SYNTH_FRONTEND_LONGBOW	0x0005
228#define PDR_SYNTH_IQ_CAL_MASK		0x0018
229#define PDR_SYNTH_IQ_CAL_PA_DETECTOR	0x0000
230#define PDR_SYNTH_IQ_CAL_DISABLED	0x0008
231#define PDR_SYNTH_IQ_CAL_ZIF		0x0010
232#define PDR_SYNTH_FAA_SWITCH_MASK	0x0020
233#define PDR_SYNTH_FAA_SWITCH_ENABLED	0x0020
234#define PDR_SYNTH_24_GHZ_MASK		0x0040
235#define PDR_SYNTH_24_GHZ_DISABLED	0x0040
236#define PDR_SYNTH_5_GHZ_MASK		0x0080
237#define PDR_SYNTH_5_GHZ_DISABLED	0x0080
238#define PDR_SYNTH_RX_DIV_MASK		0x0100
239#define PDR_SYNTH_RX_DIV_SUPPORTED	0x0100
240#define PDR_SYNTH_TX_DIV_MASK		0x0200
241#define PDR_SYNTH_TX_DIV_SUPPORTED	0x0200
242#define PDR_SYNTH_ASM_MASK		0x0400
243#define PDR_SYNTH_ASM_XSWON		0x0400
244
245#endif /* EEPROM_H */
246