1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2011 - 2012 Cavium, Inc.
7 */
8
9#include <linux/module.h>
10#include <linux/phy.h>
11#include <linux/of.h>
12
13#define PHY_ID_BCM8706	0x0143bdc1
14#define PHY_ID_BCM8727	0x0143bff0
15
16#define BCM87XX_PMD_RX_SIGNAL_DETECT	(MII_ADDR_C45 | 0x1000a)
17#define BCM87XX_10GBASER_PCS_STATUS	(MII_ADDR_C45 | 0x30020)
18#define BCM87XX_XGXS_LANE_STATUS	(MII_ADDR_C45 | 0x40018)
19
20#define BCM87XX_LASI_CONTROL (MII_ADDR_C45 | 0x39002)
21#define BCM87XX_LASI_STATUS (MII_ADDR_C45 | 0x39005)
22
23#if IS_ENABLED(CONFIG_OF_MDIO)
24/* Set and/or override some configuration registers based on the
25 * broadcom,c45-reg-init property stored in the of_node for the phydev.
26 *
27 * broadcom,c45-reg-init = <devid reg mask value>,...;
28 *
29 * There may be one or more sets of <devid reg mask value>:
30 *
31 * devid: which sub-device to use.
32 * reg: the register.
33 * mask: if non-zero, ANDed with existing register value.
34 * value: ORed with the masked value and written to the regiser.
35 *
36 */
37static int bcm87xx_of_reg_init(struct phy_device *phydev)
38{
39	const __be32 *paddr;
40	const __be32 *paddr_end;
41	int len, ret;
42
43	if (!phydev->dev.of_node)
44		return 0;
45
46	paddr = of_get_property(phydev->dev.of_node,
47				"broadcom,c45-reg-init", &len);
48	if (!paddr)
49		return 0;
50
51	paddr_end = paddr + (len /= sizeof(*paddr));
52
53	ret = 0;
54
55	while (paddr + 3 < paddr_end) {
56		u16 devid	= be32_to_cpup(paddr++);
57		u16 reg		= be32_to_cpup(paddr++);
58		u16 mask	= be32_to_cpup(paddr++);
59		u16 val_bits	= be32_to_cpup(paddr++);
60		int val;
61		u32 regnum = MII_ADDR_C45 | (devid << 16) | reg;
62		val = 0;
63		if (mask) {
64			val = phy_read(phydev, regnum);
65			if (val < 0) {
66				ret = val;
67				goto err;
68			}
69			val &= mask;
70		}
71		val |= val_bits;
72
73		ret = phy_write(phydev, regnum, val);
74		if (ret < 0)
75			goto err;
76	}
77err:
78	return ret;
79}
80#else
81static int bcm87xx_of_reg_init(struct phy_device *phydev)
82{
83	return 0;
84}
85#endif /* CONFIG_OF_MDIO */
86
87static int bcm87xx_config_init(struct phy_device *phydev)
88{
89	phydev->supported = SUPPORTED_10000baseR_FEC;
90	phydev->advertising = ADVERTISED_10000baseR_FEC;
91	phydev->state = PHY_NOLINK;
92	phydev->autoneg = AUTONEG_DISABLE;
93
94	bcm87xx_of_reg_init(phydev);
95
96	return 0;
97}
98
99static int bcm87xx_config_aneg(struct phy_device *phydev)
100{
101	return -EINVAL;
102}
103
104static int bcm87xx_read_status(struct phy_device *phydev)
105{
106	int rx_signal_detect;
107	int pcs_status;
108	int xgxs_lane_status;
109
110	rx_signal_detect = phy_read(phydev, BCM87XX_PMD_RX_SIGNAL_DETECT);
111	if (rx_signal_detect < 0)
112		return rx_signal_detect;
113
114	if ((rx_signal_detect & 1) == 0)
115		goto no_link;
116
117	pcs_status = phy_read(phydev, BCM87XX_10GBASER_PCS_STATUS);
118	if (pcs_status < 0)
119		return pcs_status;
120
121	if ((pcs_status & 1) == 0)
122		goto no_link;
123
124	xgxs_lane_status = phy_read(phydev, BCM87XX_XGXS_LANE_STATUS);
125	if (xgxs_lane_status < 0)
126		return xgxs_lane_status;
127
128	if ((xgxs_lane_status & 0x1000) == 0)
129		goto no_link;
130
131	phydev->speed = 10000;
132	phydev->link = 1;
133	phydev->duplex = 1;
134	return 0;
135
136no_link:
137	phydev->link = 0;
138	return 0;
139}
140
141static int bcm87xx_config_intr(struct phy_device *phydev)
142{
143	int reg, err;
144
145	reg = phy_read(phydev, BCM87XX_LASI_CONTROL);
146
147	if (reg < 0)
148		return reg;
149
150	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
151		reg |= 1;
152	else
153		reg &= ~1;
154
155	err = phy_write(phydev, BCM87XX_LASI_CONTROL, reg);
156	return err;
157}
158
159static int bcm87xx_did_interrupt(struct phy_device *phydev)
160{
161	int reg;
162
163	reg = phy_read(phydev, BCM87XX_LASI_STATUS);
164
165	if (reg < 0) {
166		dev_err(&phydev->dev,
167			"Error: Read of BCM87XX_LASI_STATUS failed: %d\n", reg);
168		return 0;
169	}
170	return (reg & 1) != 0;
171}
172
173static int bcm87xx_ack_interrupt(struct phy_device *phydev)
174{
175	/* Reading the LASI status clears it. */
176	bcm87xx_did_interrupt(phydev);
177	return 0;
178}
179
180static int bcm8706_match_phy_device(struct phy_device *phydev)
181{
182	return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8706;
183}
184
185static int bcm8727_match_phy_device(struct phy_device *phydev)
186{
187	return phydev->c45_ids.device_ids[4] == PHY_ID_BCM8727;
188}
189
190static struct phy_driver bcm87xx_driver[] = {
191{
192	.phy_id		= PHY_ID_BCM8706,
193	.phy_id_mask	= 0xffffffff,
194	.name		= "Broadcom BCM8706",
195	.flags		= PHY_HAS_INTERRUPT,
196	.config_init	= bcm87xx_config_init,
197	.config_aneg	= bcm87xx_config_aneg,
198	.read_status	= bcm87xx_read_status,
199	.ack_interrupt	= bcm87xx_ack_interrupt,
200	.config_intr	= bcm87xx_config_intr,
201	.did_interrupt	= bcm87xx_did_interrupt,
202	.match_phy_device = bcm8706_match_phy_device,
203	.driver		= { .owner = THIS_MODULE },
204}, {
205	.phy_id		= PHY_ID_BCM8727,
206	.phy_id_mask	= 0xffffffff,
207	.name		= "Broadcom BCM8727",
208	.flags		= PHY_HAS_INTERRUPT,
209	.config_init	= bcm87xx_config_init,
210	.config_aneg	= bcm87xx_config_aneg,
211	.read_status	= bcm87xx_read_status,
212	.ack_interrupt	= bcm87xx_ack_interrupt,
213	.config_intr	= bcm87xx_config_intr,
214	.did_interrupt	= bcm87xx_did_interrupt,
215	.match_phy_device = bcm8727_match_phy_device,
216	.driver		= { .owner = THIS_MODULE },
217} };
218
219module_phy_driver(bcm87xx_driver);
220
221MODULE_LICENSE("GPL");
222