1#ifndef _MLX4_STATS_
2#define _MLX4_STATS_
3
4#ifdef MLX4_EN_PERF_STAT
5#define NUM_PERF_STATS			NUM_PERF_COUNTERS
6#else
7#define NUM_PERF_STATS			0
8#endif
9
10#define NUM_PRIORITIES	9
11#define NUM_PRIORITY_STATS 2
12
13struct mlx4_en_pkt_stats {
14	unsigned long rx_multicast_packets;
15	unsigned long rx_broadcast_packets;
16	unsigned long rx_jabbers;
17	unsigned long rx_in_range_length_error;
18	unsigned long rx_out_range_length_error;
19	unsigned long tx_multicast_packets;
20	unsigned long tx_broadcast_packets;
21	unsigned long rx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS];
22	unsigned long tx_prio[NUM_PRIORITIES][NUM_PRIORITY_STATS];
23#define NUM_PKT_STATS		43
24};
25
26struct mlx4_en_port_stats {
27	unsigned long tso_packets;
28	unsigned long xmit_more;
29	unsigned long queue_stopped;
30	unsigned long wake_queue;
31	unsigned long tx_timeout;
32	unsigned long rx_alloc_failed;
33	unsigned long rx_chksum_good;
34	unsigned long rx_chksum_none;
35	unsigned long rx_chksum_complete;
36	unsigned long tx_chksum_offload;
37#define NUM_PORT_STATS		10
38};
39
40struct mlx4_en_perf_stats {
41	u32 tx_poll;
42	u64 tx_pktsz_avg;
43	u32 inflight_avg;
44	u16 tx_coal_avg;
45	u16 rx_coal_avg;
46	u32 napi_quota;
47#define NUM_PERF_COUNTERS		6
48};
49
50#define NUM_MAIN_STATS	21
51
52#define MLX4_NUM_PRIORITIES	8
53
54struct mlx4_en_flow_stats_rx {
55	u64 rx_pause;
56	u64 rx_pause_duration;
57	u64 rx_pause_transition;
58#define NUM_FLOW_STATS_RX	3
59#define NUM_FLOW_PRIORITY_STATS_RX	(NUM_FLOW_STATS_RX * \
60					 MLX4_NUM_PRIORITIES)
61};
62
63struct mlx4_en_flow_stats_tx {
64	u64 tx_pause;
65	u64 tx_pause_duration;
66	u64 tx_pause_transition;
67#define NUM_FLOW_STATS_TX	3
68#define NUM_FLOW_PRIORITY_STATS_TX	(NUM_FLOW_STATS_TX * \
69					 MLX4_NUM_PRIORITIES)
70};
71
72#define NUM_FLOW_STATS (NUM_FLOW_STATS_RX + NUM_FLOW_STATS_TX + \
73			NUM_FLOW_PRIORITY_STATS_TX + \
74			NUM_FLOW_PRIORITY_STATS_RX)
75
76struct mlx4_en_stat_out_flow_control_mbox {
77	/* Total number of PAUSE frames received from the far-end port */
78	__be64 rx_pause;
79	/* Total number of microseconds that far-end port requested to pause
80	* transmission of packets
81	*/
82	__be64 rx_pause_duration;
83	/* Number of received transmission from XOFF state to XON state */
84	__be64 rx_pause_transition;
85	/* Total number of PAUSE frames sent from the far-end port */
86	__be64 tx_pause;
87	/* Total time in microseconds that transmission of packets has been
88	* paused
89	*/
90	__be64 tx_pause_duration;
91	/* Number of transmitter transitions from XOFF state to XON state */
92	__be64 tx_pause_transition;
93	/* Reserverd */
94	__be64 reserved[2];
95};
96
97enum {
98	MLX4_DUMP_ETH_STATS_FLOW_CONTROL = 1 << 12
99};
100
101#define NUM_ALL_STATS	(NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + \
102			 NUM_FLOW_STATS + NUM_PERF_STATS)
103
104#define MLX4_FIND_NETDEV_STAT(n) (offsetof(struct net_device_stats, n) / \
105				  sizeof(((struct net_device_stats *)0)->n))
106
107#endif
108