1/*
2 * Linux network driver for QLogic BR-series Converged Network Adapter.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
11 * General Public License for more details.
12 */
13/*
14 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
15 * Copyright (c) 2014-2015 QLogic Corporation
16 * All rights reserved
17 * www.qlogic.com
18 */
19
20#ifndef __BFA_IOC_H__
21#define __BFA_IOC_H__
22
23#include "bfa_cs.h"
24#include "bfi.h"
25#include "cna.h"
26
27#define BFA_IOC_TOV		3000	/* msecs */
28#define BFA_IOC_HWSEM_TOV	500	/* msecs */
29#define BFA_IOC_HB_TOV		500	/* msecs */
30#define BFA_IOC_POLL_TOV	200	/* msecs */
31#define BNA_DBG_FWTRC_LEN      (BFI_IOC_TRC_ENTS * BFI_IOC_TRC_ENT_SZ + \
32				BFI_IOC_TRC_HDR_SZ)
33
34/* PCI device information required by IOC */
35struct bfa_pcidev {
36	int	pci_slot;
37	u8	pci_func;
38	u16	device_id;
39	u16	ssid;
40	void	__iomem *pci_bar_kva;
41};
42
43/* Structure used to remember the DMA-able memory block's KVA and Physical
44 * Address
45 */
46struct bfa_dma {
47	void	*kva;	/* ! Kernel virtual address	*/
48	u64	pa;	/* ! Physical address		*/
49};
50
51#define BFA_DMA_ALIGN_SZ	256
52
53/* smem size for Crossbow and Catapult */
54#define BFI_SMEM_CB_SIZE	0x200000U	/* ! 2MB for crossbow	*/
55#define BFI_SMEM_CT_SIZE	0x280000U	/* ! 2.5MB for catapult	*/
56
57/* BFA dma address assignment macro. (big endian format) */
58#define bfa_dma_be_addr_set(dma_addr, pa)	\
59		__bfa_dma_be_addr_set(&dma_addr, (u64)pa)
60static inline void
61__bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
62{
63	dma_addr->a32.addr_lo = (u32) htonl(pa);
64	dma_addr->a32.addr_hi = (u32) htonl(upper_32_bits(pa));
65}
66
67#define bfa_alen_set(__alen, __len, __pa)	\
68	__bfa_alen_set(__alen, __len, (u64)__pa)
69
70static inline void
71__bfa_alen_set(struct bfi_alen *alen, u32 len, u64 pa)
72{
73	alen->al_len = cpu_to_be32(len);
74	bfa_dma_be_addr_set(alen->al_addr, pa);
75}
76
77struct bfa_ioc_regs {
78	void __iomem *hfn_mbox_cmd;
79	void __iomem *hfn_mbox;
80	void __iomem *lpu_mbox_cmd;
81	void __iomem *lpu_mbox;
82	void __iomem *lpu_read_stat;
83	void __iomem *pss_ctl_reg;
84	void __iomem *pss_err_status_reg;
85	void __iomem *app_pll_fast_ctl_reg;
86	void __iomem *app_pll_slow_ctl_reg;
87	void __iomem *ioc_sem_reg;
88	void __iomem *ioc_usage_sem_reg;
89	void __iomem *ioc_init_sem_reg;
90	void __iomem *ioc_usage_reg;
91	void __iomem *host_page_num_fn;
92	void __iomem *heartbeat;
93	void __iomem *ioc_fwstate;
94	void __iomem *alt_ioc_fwstate;
95	void __iomem *ll_halt;
96	void __iomem *alt_ll_halt;
97	void __iomem *err_set;
98	void __iomem *ioc_fail_sync;
99	void __iomem *shirq_isr_next;
100	void __iomem *shirq_msk_next;
101	void __iomem *smem_page_start;
102	u32	smem_pg0;
103};
104
105/* IOC Mailbox structures */
106typedef void (*bfa_mbox_cmd_cbfn_t)(void *cbarg);
107struct bfa_mbox_cmd {
108	struct list_head	qe;
109	bfa_mbox_cmd_cbfn_t     cbfn;
110	void		    *cbarg;
111	u32     msg[BFI_IOC_MSGSZ];
112};
113
114/* IOC mailbox module */
115typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg *m);
116struct bfa_ioc_mbox_mod {
117	struct list_head	cmd_q;		/*!< pending mbox queue	*/
118	int			nmclass;	/*!< number of handlers */
119	struct {
120		bfa_ioc_mbox_mcfunc_t	cbfn;	/*!< message handlers	*/
121		void			*cbarg;
122	} mbhdlr[BFI_MC_MAX];
123};
124
125/* IOC callback function interfaces */
126typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
127typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
128typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
129typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa);
130struct bfa_ioc_cbfn {
131	bfa_ioc_enable_cbfn_t	enable_cbfn;
132	bfa_ioc_disable_cbfn_t	disable_cbfn;
133	bfa_ioc_hbfail_cbfn_t	hbfail_cbfn;
134	bfa_ioc_reset_cbfn_t	reset_cbfn;
135};
136
137/* IOC event notification mechanism. */
138enum bfa_ioc_event {
139	BFA_IOC_E_ENABLED	= 1,
140	BFA_IOC_E_DISABLED	= 2,
141	BFA_IOC_E_FAILED	= 3,
142};
143
144typedef void (*bfa_ioc_notify_cbfn_t)(void *, enum bfa_ioc_event);
145
146struct bfa_ioc_notify {
147	struct list_head	qe;
148	bfa_ioc_notify_cbfn_t	cbfn;
149	void			*cbarg;
150};
151
152/* Initialize a IOC event notification structure */
153#define bfa_ioc_notify_init(__notify, __cbfn, __cbarg) do {	\
154	(__notify)->cbfn = (__cbfn);				\
155	(__notify)->cbarg = (__cbarg);				\
156} while (0)
157
158struct bfa_iocpf {
159	bfa_fsm_t		fsm;
160	struct bfa_ioc		*ioc;
161	bool			fw_mismatch_notified;
162	bool			auto_recover;
163	u32			poll_time;
164};
165
166struct bfa_ioc {
167	bfa_fsm_t		fsm;
168	struct bfa		*bfa;
169	struct bfa_pcidev	pcidev;
170	struct timer_list	ioc_timer;
171	struct timer_list	iocpf_timer;
172	struct timer_list	sem_timer;
173	struct timer_list	hb_timer;
174	u32			hb_count;
175	struct list_head	notify_q;
176	void			*dbg_fwsave;
177	int			dbg_fwsave_len;
178	bool			dbg_fwsave_once;
179	enum bfi_pcifn_class	clscode;
180	struct bfa_ioc_regs	ioc_regs;
181	struct bfa_ioc_drv_stats stats;
182	bool			fcmode;
183	bool			pllinit;
184	bool			stats_busy;	/*!< outstanding stats */
185	u8			port_id;
186
187	struct bfa_dma		attr_dma;
188	struct bfi_ioc_attr	*attr;
189	struct bfa_ioc_cbfn	*cbfn;
190	struct bfa_ioc_mbox_mod	mbox_mod;
191	const struct bfa_ioc_hwif *ioc_hwif;
192	struct bfa_iocpf	iocpf;
193	enum bfi_asic_gen	asic_gen;
194	enum bfi_asic_mode	asic_mode;
195	enum bfi_port_mode	port0_mode;
196	enum bfi_port_mode	port1_mode;
197	enum bfa_mode		port_mode;
198	u8			ad_cap_bm;	/*!< adapter cap bit mask */
199	u8			port_mode_cfg;	/*!< config port mode */
200};
201
202struct bfa_ioc_hwif {
203	enum bfa_status (*ioc_pll_init) (void __iomem *rb,
204						enum bfi_asic_mode m);
205	bool		(*ioc_firmware_lock)	(struct bfa_ioc *ioc);
206	void		(*ioc_firmware_unlock)	(struct bfa_ioc *ioc);
207	void		(*ioc_reg_init)	(struct bfa_ioc *ioc);
208	void		(*ioc_map_port)	(struct bfa_ioc *ioc);
209	void		(*ioc_isr_mode_set)	(struct bfa_ioc *ioc,
210					bool msix);
211	void		(*ioc_notify_fail)	(struct bfa_ioc *ioc);
212	void		(*ioc_ownership_reset)	(struct bfa_ioc *ioc);
213	bool		(*ioc_sync_start)       (struct bfa_ioc *ioc);
214	void		(*ioc_sync_join)	(struct bfa_ioc *ioc);
215	void		(*ioc_sync_leave)	(struct bfa_ioc *ioc);
216	void		(*ioc_sync_ack)		(struct bfa_ioc *ioc);
217	bool		(*ioc_sync_complete)	(struct bfa_ioc *ioc);
218	bool		(*ioc_lpu_read_stat)	(struct bfa_ioc *ioc);
219	void		(*ioc_set_fwstate)	(struct bfa_ioc *ioc,
220					enum bfi_ioc_state fwstate);
221	enum bfi_ioc_state (*ioc_get_fwstate) (struct bfa_ioc *ioc);
222	void		(*ioc_set_alt_fwstate)	(struct bfa_ioc *ioc,
223					enum bfi_ioc_state fwstate);
224	enum bfi_ioc_state (*ioc_get_alt_fwstate) (struct bfa_ioc *ioc);
225
226};
227
228#define bfa_ioc_pcifn(__ioc)		((__ioc)->pcidev.pci_func)
229#define bfa_ioc_devid(__ioc)		((__ioc)->pcidev.device_id)
230#define bfa_ioc_bar0(__ioc)		((__ioc)->pcidev.pci_bar_kva)
231#define bfa_ioc_portid(__ioc)		((__ioc)->port_id)
232#define bfa_ioc_asic_gen(__ioc)		((__ioc)->asic_gen)
233#define bfa_ioc_is_default(__ioc)	\
234	(bfa_ioc_pcifn(__ioc) == bfa_ioc_portid(__ioc))
235#define bfa_ioc_fetch_stats(__ioc, __stats) \
236		(((__stats)->drv_stats) = (__ioc)->stats)
237#define bfa_ioc_clr_stats(__ioc)	\
238		memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
239#define bfa_ioc_maxfrsize(__ioc)	((__ioc)->attr->maxfrsize)
240#define bfa_ioc_rx_bbcredit(__ioc)	((__ioc)->attr->rx_bbcredit)
241#define bfa_ioc_speed_sup(__ioc)	\
242	BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop)
243#define bfa_ioc_get_nports(__ioc)	\
244	BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
245
246#define bfa_ioc_stats(_ioc, _stats)	((_ioc)->stats._stats++)
247#define bfa_ioc_stats_hb_count(_ioc, _hb_count)	\
248	((_ioc)->stats.hb_count = (_hb_count))
249#define BFA_IOC_FWIMG_MINSZ	(16 * 1024)
250#define BFA_IOC_FW_SMEM_SIZE(__ioc)					\
251	((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB)			\
252	? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
253#define BFA_IOC_FLASH_CHUNK_NO(off)		(off / BFI_FLASH_CHUNK_SZ_WORDS)
254#define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off)	(off % BFI_FLASH_CHUNK_SZ_WORDS)
255#define BFA_IOC_FLASH_CHUNK_ADDR(chunkno)  (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
256
257/* IOC mailbox interface */
258bool bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc,
259			struct bfa_mbox_cmd *cmd,
260			bfa_mbox_cmd_cbfn_t cbfn, void *cbarg);
261void bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc);
262void bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
263		bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
264
265/* IOC interfaces */
266
267#define bfa_ioc_pll_init_asic(__ioc) \
268	((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
269			   (__ioc)->asic_mode))
270
271#define	bfa_ioc_isr_mode_set(__ioc, __msix) do {			\
272	if ((__ioc)->ioc_hwif->ioc_isr_mode_set)			\
273		((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix));	\
274} while (0)
275#define	bfa_ioc_ownership_reset(__ioc)				\
276			((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
277
278#define bfa_ioc_lpu_read_stat(__ioc) do {				\
279		if ((__ioc)->ioc_hwif->ioc_lpu_read_stat)		\
280			((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc));	\
281} while (0)
282
283void bfa_nw_ioc_set_ct_hwif(struct bfa_ioc *ioc);
284void bfa_nw_ioc_set_ct2_hwif(struct bfa_ioc *ioc);
285void bfa_nw_ioc_ct2_poweron(struct bfa_ioc *ioc);
286
287void bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa,
288		struct bfa_ioc_cbfn *cbfn);
289void bfa_nw_ioc_auto_recover(bool auto_recover);
290void bfa_nw_ioc_detach(struct bfa_ioc *ioc);
291void bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
292		enum bfi_pcifn_class clscode);
293u32 bfa_nw_ioc_meminfo(void);
294void bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc,  u8 *dm_kva, u64 dm_pa);
295void bfa_nw_ioc_enable(struct bfa_ioc *ioc);
296void bfa_nw_ioc_disable(struct bfa_ioc *ioc);
297
298void bfa_nw_ioc_error_isr(struct bfa_ioc *ioc);
299bool bfa_nw_ioc_is_disabled(struct bfa_ioc *ioc);
300bool bfa_nw_ioc_is_operational(struct bfa_ioc *ioc);
301void bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr);
302enum bfa_status bfa_nw_ioc_fwsig_invalidate(struct bfa_ioc *ioc);
303void bfa_nw_ioc_notify_register(struct bfa_ioc *ioc,
304	struct bfa_ioc_notify *notify);
305bool bfa_nw_ioc_sem_get(void __iomem *sem_reg);
306void bfa_nw_ioc_sem_release(void __iomem *sem_reg);
307void bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc);
308void bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc,
309			struct bfi_ioc_image_hdr *fwhdr);
310bool bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc,
311			struct bfi_ioc_image_hdr *fwhdr);
312mac_t bfa_nw_ioc_get_mac(struct bfa_ioc *ioc);
313void bfa_nw_ioc_debug_memclaim(struct bfa_ioc *ioc, void *dbg_fwsave);
314int bfa_nw_ioc_debug_fwtrc(struct bfa_ioc *ioc, void *trcdata, int *trclen);
315int bfa_nw_ioc_debug_fwsave(struct bfa_ioc *ioc, void *trcdata, int *trclen);
316
317/*
318 * Timeout APIs
319 */
320void bfa_nw_ioc_timeout(void *ioc);
321void bfa_nw_ioc_hb_check(void *ioc);
322void bfa_nw_iocpf_timeout(void *ioc);
323void bfa_nw_iocpf_sem_timeout(void *ioc);
324
325/*
326 * F/W Image Size & Chunk
327 */
328u32 *bfa_cb_image_get_chunk(enum bfi_asic_gen asic_gen, u32 off);
329u32 bfa_cb_image_get_size(enum bfi_asic_gen asic_gen);
330
331/*
332 *	Flash module specific
333 */
334typedef void	(*bfa_cb_flash) (void *cbarg, enum bfa_status status);
335
336struct bfa_flash {
337	struct bfa_ioc *ioc;		/* back pointer to ioc */
338	u32		type;		/* partition type */
339	u8		instance;	/* partition instance */
340	u8		rsv[3];
341	u32		op_busy;	/*  operation busy flag */
342	u32		residue;	/*  residual length */
343	u32		offset;		/*  offset */
344	enum bfa_status	status;		/*  status */
345	u8		*dbuf_kva;	/*  dma buf virtual address */
346	u64		dbuf_pa;	/*  dma buf physical address */
347	bfa_cb_flash	cbfn;		/*  user callback function */
348	void		*cbarg;		/*  user callback arg */
349	u8		*ubuf;		/*  user supplied buffer */
350	u32		addr_off;	/*  partition address offset */
351	struct bfa_mbox_cmd mb;		/*  mailbox */
352	struct bfa_ioc_notify ioc_notify; /*  ioc event notify */
353};
354
355enum bfa_status bfa_nw_flash_get_attr(struct bfa_flash *flash,
356			struct bfa_flash_attr *attr,
357			bfa_cb_flash cbfn, void *cbarg);
358enum bfa_status bfa_nw_flash_update_part(struct bfa_flash *flash,
359			u32 type, u8 instance, void *buf, u32 len, u32 offset,
360			bfa_cb_flash cbfn, void *cbarg);
361enum bfa_status bfa_nw_flash_read_part(struct bfa_flash *flash,
362			u32 type, u8 instance, void *buf, u32 len, u32 offset,
363			bfa_cb_flash cbfn, void *cbarg);
364u32	bfa_nw_flash_meminfo(void);
365void	bfa_nw_flash_attach(struct bfa_flash *flash,
366			    struct bfa_ioc *ioc, void *dev);
367void	bfa_nw_flash_memclaim(struct bfa_flash *flash, u8 *dm_kva, u64 dm_pa);
368
369#endif /* __BFA_IOC_H__ */
370