1/*
2 * Afatech AF9035 DVB USB driver
3 *
4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 *
7 *    This program is free software; you can redistribute it and/or modify
8 *    it under the terms of the GNU General Public License as published by
9 *    the Free Software Foundation; either version 2 of the License, or
10 *    (at your option) any later version.
11 *
12 *    This program is distributed in the hope that it will be useful,
13 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
14 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 *    GNU General Public License for more details.
16 *
17 *    You should have received a copy of the GNU General Public License along
18 *    with this program; if not, write to the Free Software Foundation, Inc.,
19 *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22#ifndef AF9035_H
23#define AF9035_H
24
25#include "dvb_usb.h"
26#include "af9033.h"
27#include "tua9001.h"
28#include "fc0011.h"
29#include "fc0012.h"
30#include "mxl5007t.h"
31#include "tda18218.h"
32#include "fc2580.h"
33#include "it913x.h"
34#include "si2168.h"
35#include "si2157.h"
36
37struct reg_val {
38	u32 reg;
39	u8  val;
40};
41
42struct reg_val_mask {
43	u32 reg;
44	u8  val;
45	u8  mask;
46};
47
48struct usb_req {
49	u8  cmd;
50	u8  mbox;
51	u8  wlen;
52	u8  *wbuf;
53	u8  rlen;
54	u8  *rbuf;
55};
56
57struct state {
58#define BUF_LEN 64
59	u8 buf[BUF_LEN];
60	u8 seq; /* packet sequence number */
61	u8 prechip_version;
62	u8 chip_version;
63	u16 chip_type;
64	u8 dual_mode:1;
65	u16 eeprom_addr;
66	u8 af9033_i2c_addr[2];
67	struct af9033_config af9033_config[2];
68	struct af9033_ops ops;
69	#define AF9035_I2C_CLIENT_MAX 4
70	struct i2c_client *i2c_client[AF9035_I2C_CLIENT_MAX];
71	struct i2c_adapter *i2c_adapter_demod;
72};
73
74static const u32 clock_lut_af9035[] = {
75	20480000, /*      FPGA */
76	16384000, /* 16.38 MHz */
77	20480000, /* 20.48 MHz */
78	36000000, /* 36.00 MHz */
79	30000000, /* 30.00 MHz */
80	26000000, /* 26.00 MHz */
81	28000000, /* 28.00 MHz */
82	32000000, /* 32.00 MHz */
83	34000000, /* 34.00 MHz */
84	24000000, /* 24.00 MHz */
85	22000000, /* 22.00 MHz */
86	12000000, /* 12.00 MHz */
87};
88
89static const u32 clock_lut_it9135[] = {
90	12000000, /* 12.00 MHz */
91	20480000, /* 20.48 MHz */
92	36000000, /* 36.00 MHz */
93	30000000, /* 30.00 MHz */
94	26000000, /* 26.00 MHz */
95	28000000, /* 28.00 MHz */
96	32000000, /* 32.00 MHz */
97	34000000, /* 34.00 MHz */
98	24000000, /* 24.00 MHz */
99	22000000, /* 22.00 MHz */
100};
101
102#define AF9035_FIRMWARE_AF9035 "dvb-usb-af9035-02.fw"
103#define AF9035_FIRMWARE_IT9135_V1 "dvb-usb-it9135-01.fw"
104#define AF9035_FIRMWARE_IT9135_V2 "dvb-usb-it9135-02.fw"
105#define AF9035_FIRMWARE_IT9303 "dvb-usb-it9303-01.fw"
106
107/*
108 * eeprom is memory mapped as read only. Writing that memory mapped address
109 * will not corrupt eeprom.
110 *
111 * TS mode:
112 * 0  TS
113 * 1  DCA + PIP
114 * 3  PIP
115 * n  DCA
116 *
117 * Values 0 and 3 are seen to this day. 0 for single TS and 3 for dual TS.
118 */
119
120#define EEPROM_BASE_AF9035        0x42fd
121#define EEPROM_BASE_IT9135        0x499c
122#define EEPROM_SHIFT                0x10
123
124#define EEPROM_IR_MODE              0x10
125#define EEPROM_TS_MODE              0x29
126#define EEPROM_2ND_DEMOD_ADDR       0x2a
127#define EEPROM_IR_TYPE              0x2c
128#define EEPROM_1_IF_L               0x30
129#define EEPROM_1_IF_H               0x31
130#define EEPROM_1_TUNER_ID           0x34
131#define EEPROM_2_IF_L               0x40
132#define EEPROM_2_IF_H               0x41
133#define EEPROM_2_TUNER_ID           0x44
134
135/* USB commands */
136#define CMD_MEM_RD                  0x00
137#define CMD_MEM_WR                  0x01
138#define CMD_I2C_RD                  0x02
139#define CMD_I2C_WR                  0x03
140#define CMD_IR_GET                  0x18
141#define CMD_FW_DL                   0x21
142#define CMD_FW_QUERYINFO            0x22
143#define CMD_FW_BOOT                 0x23
144#define CMD_FW_DL_BEGIN             0x24
145#define CMD_FW_DL_END               0x25
146#define CMD_FW_SCATTER_WR           0x29
147#define CMD_GENERIC_I2C_RD          0x2a
148#define CMD_GENERIC_I2C_WR          0x2b
149
150#endif
151