1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 *	     Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 *	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 *	Sakari Ailus <sakari.ailus@iki.fi>
15 *	David Cohen <dacohen@gmail.com>
16 *	Stanimir Varbanov <svarbanov@mm-sol.com>
17 *	Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 *	Tuukka Toivonen <tuukkat76@gmail.com>
19 *	Sergio Aguirre <saaguirre@ti.com>
20 *	Antti Koskipaa <akoskipa@gmail.com>
21 *	Ivan T. Ivanov <iivanov@mm-sol.com>
22 *	RaniSuneela <r-m@ti.com>
23 *	Atanas Filipov <afilipov@mm-sol.com>
24 *	Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 *	Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 *	Nayden Kanchev <nkanchev@mm-sol.com>
27 *	Phil Carmody <ext-phil.2.carmody@nokia.com>
28 *	Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 *	Dominic Curran <dcurran@ti.com>
30 *	Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 *	Pallavi Kulkarni <p-kulkarni@ti.com>
32 *	Vaibhav Hiremath <hvaibhav@ti.com>
33 *	Mohit Jalori <mjalori@ti.com>
34 *	Sameer Venkatraman <sameerv@ti.com>
35 *	Senthilvadivu Guruswamy <svadivu@ti.com>
36 *	Thara Gopinath <thara@ti.com>
37 *	Toni Leinonen <toni.leinonen@nokia.com>
38 *	Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 */
44
45#include <asm/cacheflush.h>
46
47#include <linux/clk.h>
48#include <linux/clkdev.h>
49#include <linux/delay.h>
50#include <linux/device.h>
51#include <linux/dma-mapping.h>
52#include <linux/i2c.h>
53#include <linux/interrupt.h>
54#include <linux/mfd/syscon.h>
55#include <linux/module.h>
56#include <linux/omap-iommu.h>
57#include <linux/platform_device.h>
58#include <linux/regulator/consumer.h>
59#include <linux/slab.h>
60#include <linux/sched.h>
61#include <linux/vmalloc.h>
62
63#include <asm/dma-iommu.h>
64
65#include <media/v4l2-common.h>
66#include <media/v4l2-device.h>
67#include <media/v4l2-of.h>
68
69#include "isp.h"
70#include "ispreg.h"
71#include "ispccdc.h"
72#include "isppreview.h"
73#include "ispresizer.h"
74#include "ispcsi2.h"
75#include "ispccp2.h"
76#include "isph3a.h"
77#include "isphist.h"
78
79static unsigned int autoidle;
80module_param(autoidle, int, 0444);
81MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
82
83static void isp_save_ctx(struct isp_device *isp);
84
85static void isp_restore_ctx(struct isp_device *isp);
86
87static const struct isp_res_mapping isp_res_maps[] = {
88	{
89		.isp_rev = ISP_REVISION_2_0,
90		.offset = {
91			/* first MMIO area */
92			0x0000, /* base, len 0x0070 */
93			0x0400, /* ccp2, len 0x01f0 */
94			0x0600, /* ccdc, len 0x00a8 */
95			0x0a00, /* hist, len 0x0048 */
96			0x0c00, /* h3a, len 0x0060 */
97			0x0e00, /* preview, len 0x00a0 */
98			0x1000, /* resizer, len 0x00ac */
99			0x1200, /* sbl, len 0x00fc */
100			/* second MMIO area */
101			0x0000, /* csi2a, len 0x0170 */
102			0x0170, /* csiphy2, len 0x000c */
103		},
104		.syscon_offset = 0xdc,
105		.phy_type = ISP_PHY_TYPE_3430,
106	},
107	{
108		.isp_rev = ISP_REVISION_15_0,
109		.offset = {
110			/* first MMIO area */
111			0x0000, /* base, len 0x0070 */
112			0x0400, /* ccp2, len 0x01f0 */
113			0x0600, /* ccdc, len 0x00a8 */
114			0x0a00, /* hist, len 0x0048 */
115			0x0c00, /* h3a, len 0x0060 */
116			0x0e00, /* preview, len 0x00a0 */
117			0x1000, /* resizer, len 0x00ac */
118			0x1200, /* sbl, len 0x00fc */
119			/* second MMIO area */
120			0x0000, /* csi2a, len 0x0170 (1st area) */
121			0x0170, /* csiphy2, len 0x000c */
122			0x01c0, /* csi2a, len 0x0040 (2nd area) */
123			0x0400, /* csi2c, len 0x0170 (1st area) */
124			0x0570, /* csiphy1, len 0x000c */
125			0x05c0, /* csi2c, len 0x0040 (2nd area) */
126		},
127		.syscon_offset = 0x2f0,
128		.phy_type = ISP_PHY_TYPE_3630,
129	},
130};
131
132/* Structure for saving/restoring ISP module registers */
133static struct isp_reg isp_reg_list[] = {
134	{OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
135	{OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
136	{OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
137	{0, ISP_TOK_TERM, 0}
138};
139
140/*
141 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
142 * @isp: OMAP3 ISP device
143 *
144 * In order to force posting of pending writes, we need to write and
145 * readback the same register, in this case the revision register.
146 *
147 * See this link for reference:
148 *   http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
149 */
150void omap3isp_flush(struct isp_device *isp)
151{
152	isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
153	isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
154}
155
156/* -----------------------------------------------------------------------------
157 * XCLK
158 */
159
160#define to_isp_xclk(_hw)	container_of(_hw, struct isp_xclk, hw)
161
162static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
163{
164	switch (xclk->id) {
165	case ISP_XCLK_A:
166		isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
167				ISPTCTRL_CTRL_DIVA_MASK,
168				divider << ISPTCTRL_CTRL_DIVA_SHIFT);
169		break;
170	case ISP_XCLK_B:
171		isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
172				ISPTCTRL_CTRL_DIVB_MASK,
173				divider << ISPTCTRL_CTRL_DIVB_SHIFT);
174		break;
175	}
176}
177
178static int isp_xclk_prepare(struct clk_hw *hw)
179{
180	struct isp_xclk *xclk = to_isp_xclk(hw);
181
182	omap3isp_get(xclk->isp);
183
184	return 0;
185}
186
187static void isp_xclk_unprepare(struct clk_hw *hw)
188{
189	struct isp_xclk *xclk = to_isp_xclk(hw);
190
191	omap3isp_put(xclk->isp);
192}
193
194static int isp_xclk_enable(struct clk_hw *hw)
195{
196	struct isp_xclk *xclk = to_isp_xclk(hw);
197	unsigned long flags;
198
199	spin_lock_irqsave(&xclk->lock, flags);
200	isp_xclk_update(xclk, xclk->divider);
201	xclk->enabled = true;
202	spin_unlock_irqrestore(&xclk->lock, flags);
203
204	return 0;
205}
206
207static void isp_xclk_disable(struct clk_hw *hw)
208{
209	struct isp_xclk *xclk = to_isp_xclk(hw);
210	unsigned long flags;
211
212	spin_lock_irqsave(&xclk->lock, flags);
213	isp_xclk_update(xclk, 0);
214	xclk->enabled = false;
215	spin_unlock_irqrestore(&xclk->lock, flags);
216}
217
218static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
219					  unsigned long parent_rate)
220{
221	struct isp_xclk *xclk = to_isp_xclk(hw);
222
223	return parent_rate / xclk->divider;
224}
225
226static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
227{
228	u32 divider;
229
230	if (*rate >= parent_rate) {
231		*rate = parent_rate;
232		return ISPTCTRL_CTRL_DIV_BYPASS;
233	}
234
235	if (*rate == 0)
236		*rate = 1;
237
238	divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
239	if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
240		divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
241
242	*rate = parent_rate / divider;
243	return divider;
244}
245
246static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
247				unsigned long *parent_rate)
248{
249	isp_xclk_calc_divider(&rate, *parent_rate);
250	return rate;
251}
252
253static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
254			     unsigned long parent_rate)
255{
256	struct isp_xclk *xclk = to_isp_xclk(hw);
257	unsigned long flags;
258	u32 divider;
259
260	divider = isp_xclk_calc_divider(&rate, parent_rate);
261
262	spin_lock_irqsave(&xclk->lock, flags);
263
264	xclk->divider = divider;
265	if (xclk->enabled)
266		isp_xclk_update(xclk, divider);
267
268	spin_unlock_irqrestore(&xclk->lock, flags);
269
270	dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
271		__func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
272	return 0;
273}
274
275static const struct clk_ops isp_xclk_ops = {
276	.prepare = isp_xclk_prepare,
277	.unprepare = isp_xclk_unprepare,
278	.enable = isp_xclk_enable,
279	.disable = isp_xclk_disable,
280	.recalc_rate = isp_xclk_recalc_rate,
281	.round_rate = isp_xclk_round_rate,
282	.set_rate = isp_xclk_set_rate,
283};
284
285static const char *isp_xclk_parent_name = "cam_mclk";
286
287static const struct clk_init_data isp_xclk_init_data = {
288	.name = "cam_xclk",
289	.ops = &isp_xclk_ops,
290	.parent_names = &isp_xclk_parent_name,
291	.num_parents = 1,
292};
293
294static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
295{
296	unsigned int idx = clkspec->args[0];
297	struct isp_device *isp = data;
298
299	if (idx >= ARRAY_SIZE(isp->xclks))
300		return ERR_PTR(-ENOENT);
301
302	return isp->xclks[idx].clk;
303}
304
305static int isp_xclk_init(struct isp_device *isp)
306{
307	struct device_node *np = isp->dev->of_node;
308	struct clk_init_data init;
309	unsigned int i;
310
311	for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
312		isp->xclks[i].clk = ERR_PTR(-EINVAL);
313
314	for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
315		struct isp_xclk *xclk = &isp->xclks[i];
316
317		xclk->isp = isp;
318		xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
319		xclk->divider = 1;
320		spin_lock_init(&xclk->lock);
321
322		init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
323		init.ops = &isp_xclk_ops;
324		init.parent_names = &isp_xclk_parent_name;
325		init.num_parents = 1;
326
327		xclk->hw.init = &init;
328		/*
329		 * The first argument is NULL in order to avoid circular
330		 * reference, as this driver takes reference on the
331		 * sensor subdevice modules and the sensors would take
332		 * reference on this module through clk_get().
333		 */
334		xclk->clk = clk_register(NULL, &xclk->hw);
335		if (IS_ERR(xclk->clk))
336			return PTR_ERR(xclk->clk);
337	}
338
339	if (np)
340		of_clk_add_provider(np, isp_xclk_src_get, isp);
341
342	return 0;
343}
344
345static void isp_xclk_cleanup(struct isp_device *isp)
346{
347	struct device_node *np = isp->dev->of_node;
348	unsigned int i;
349
350	if (np)
351		of_clk_del_provider(np);
352
353	for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
354		struct isp_xclk *xclk = &isp->xclks[i];
355
356		if (!IS_ERR(xclk->clk))
357			clk_unregister(xclk->clk);
358	}
359}
360
361/* -----------------------------------------------------------------------------
362 * Interrupts
363 */
364
365/*
366 * isp_enable_interrupts - Enable ISP interrupts.
367 * @isp: OMAP3 ISP device
368 */
369static void isp_enable_interrupts(struct isp_device *isp)
370{
371	static const u32 irq = IRQ0ENABLE_CSIA_IRQ
372			     | IRQ0ENABLE_CSIB_IRQ
373			     | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
374			     | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
375			     | IRQ0ENABLE_CCDC_VD0_IRQ
376			     | IRQ0ENABLE_CCDC_VD1_IRQ
377			     | IRQ0ENABLE_HS_VS_IRQ
378			     | IRQ0ENABLE_HIST_DONE_IRQ
379			     | IRQ0ENABLE_H3A_AWB_DONE_IRQ
380			     | IRQ0ENABLE_H3A_AF_DONE_IRQ
381			     | IRQ0ENABLE_PRV_DONE_IRQ
382			     | IRQ0ENABLE_RSZ_DONE_IRQ;
383
384	isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
385	isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
386}
387
388/*
389 * isp_disable_interrupts - Disable ISP interrupts.
390 * @isp: OMAP3 ISP device
391 */
392static void isp_disable_interrupts(struct isp_device *isp)
393{
394	isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
395}
396
397/*
398 * isp_core_init - ISP core settings
399 * @isp: OMAP3 ISP device
400 * @idle: Consider idle state.
401 *
402 * Set the power settings for the ISP and SBL bus and configure the HS/VS
403 * interrupt source.
404 *
405 * We need to configure the HS/VS interrupt source before interrupts get
406 * enabled, as the sensor might be free-running and the ISP default setting
407 * (HS edge) would put an unnecessary burden on the CPU.
408 */
409static void isp_core_init(struct isp_device *isp, int idle)
410{
411	isp_reg_writel(isp,
412		       ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
413				ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
414			ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
415			((isp->revision == ISP_REVISION_15_0) ?
416			  ISP_SYSCONFIG_AUTOIDLE : 0),
417		       OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
418
419	isp_reg_writel(isp,
420		       (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
421		       ISPCTRL_SYNC_DETECT_VSRISE,
422		       OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
423}
424
425/*
426 * Configure the bridge and lane shifter. Valid inputs are
427 *
428 * CCDC_INPUT_PARALLEL: Parallel interface
429 * CCDC_INPUT_CSI2A: CSI2a receiver
430 * CCDC_INPUT_CCP2B: CCP2b receiver
431 * CCDC_INPUT_CSI2C: CSI2c receiver
432 *
433 * The bridge and lane shifter are configured according to the selected input
434 * and the ISP platform data.
435 */
436void omap3isp_configure_bridge(struct isp_device *isp,
437			       enum ccdc_input_entity input,
438			       const struct isp_parallel_cfg *parcfg,
439			       unsigned int shift, unsigned int bridge)
440{
441	u32 ispctrl_val;
442
443	ispctrl_val  = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
444	ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
445	ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
446	ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
447	ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
448	ispctrl_val |= bridge;
449
450	switch (input) {
451	case CCDC_INPUT_PARALLEL:
452		ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
453		ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
454		shift += parcfg->data_lane_shift * 2;
455		break;
456
457	case CCDC_INPUT_CSI2A:
458		ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
459		break;
460
461	case CCDC_INPUT_CCP2B:
462		ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
463		break;
464
465	case CCDC_INPUT_CSI2C:
466		ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
467		break;
468
469	default:
470		return;
471	}
472
473	ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
474
475	isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
476}
477
478void omap3isp_hist_dma_done(struct isp_device *isp)
479{
480	if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
481	    omap3isp_stat_pcr_busy(&isp->isp_hist)) {
482		/* Histogram cannot be enabled in this frame anymore */
483		atomic_set(&isp->isp_hist.buf_err, 1);
484		dev_dbg(isp->dev, "hist: Out of synchronization with "
485				  "CCDC. Ignoring next buffer.\n");
486	}
487}
488
489static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
490{
491	static const char *name[] = {
492		"CSIA_IRQ",
493		"res1",
494		"res2",
495		"CSIB_LCM_IRQ",
496		"CSIB_IRQ",
497		"res5",
498		"res6",
499		"res7",
500		"CCDC_VD0_IRQ",
501		"CCDC_VD1_IRQ",
502		"CCDC_VD2_IRQ",
503		"CCDC_ERR_IRQ",
504		"H3A_AF_DONE_IRQ",
505		"H3A_AWB_DONE_IRQ",
506		"res14",
507		"res15",
508		"HIST_DONE_IRQ",
509		"CCDC_LSC_DONE",
510		"CCDC_LSC_PREFETCH_COMPLETED",
511		"CCDC_LSC_PREFETCH_ERROR",
512		"PRV_DONE_IRQ",
513		"CBUFF_IRQ",
514		"res22",
515		"res23",
516		"RSZ_DONE_IRQ",
517		"OVF_IRQ",
518		"res26",
519		"res27",
520		"MMU_ERR_IRQ",
521		"OCP_ERR_IRQ",
522		"SEC_ERR_IRQ",
523		"HS_VS_IRQ",
524	};
525	int i;
526
527	dev_dbg(isp->dev, "ISP IRQ: ");
528
529	for (i = 0; i < ARRAY_SIZE(name); i++) {
530		if ((1 << i) & irqstatus)
531			printk(KERN_CONT "%s ", name[i]);
532	}
533	printk(KERN_CONT "\n");
534}
535
536static void isp_isr_sbl(struct isp_device *isp)
537{
538	struct device *dev = isp->dev;
539	struct isp_pipeline *pipe;
540	u32 sbl_pcr;
541
542	/*
543	 * Handle shared buffer logic overflows for video buffers.
544	 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
545	 */
546	sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
547	isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
548	sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
549
550	if (sbl_pcr)
551		dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
552
553	if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
554		pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
555		if (pipe != NULL)
556			pipe->error = true;
557	}
558
559	if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
560		pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
561		if (pipe != NULL)
562			pipe->error = true;
563	}
564
565	if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
566		pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
567		if (pipe != NULL)
568			pipe->error = true;
569	}
570
571	if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
572		pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
573		if (pipe != NULL)
574			pipe->error = true;
575	}
576
577	if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
578		       | ISPSBL_PCR_RSZ2_WBL_OVF
579		       | ISPSBL_PCR_RSZ3_WBL_OVF
580		       | ISPSBL_PCR_RSZ4_WBL_OVF)) {
581		pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
582		if (pipe != NULL)
583			pipe->error = true;
584	}
585
586	if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
587		omap3isp_stat_sbl_overflow(&isp->isp_af);
588
589	if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
590		omap3isp_stat_sbl_overflow(&isp->isp_aewb);
591}
592
593/*
594 * isp_isr - Interrupt Service Routine for Camera ISP module.
595 * @irq: Not used currently.
596 * @_isp: Pointer to the OMAP3 ISP device
597 *
598 * Handles the corresponding callback if plugged in.
599 */
600static irqreturn_t isp_isr(int irq, void *_isp)
601{
602	static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
603				       IRQ0STATUS_CCDC_LSC_DONE_IRQ |
604				       IRQ0STATUS_CCDC_VD0_IRQ |
605				       IRQ0STATUS_CCDC_VD1_IRQ |
606				       IRQ0STATUS_HS_VS_IRQ;
607	struct isp_device *isp = _isp;
608	u32 irqstatus;
609
610	irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
611	isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
612
613	isp_isr_sbl(isp);
614
615	if (irqstatus & IRQ0STATUS_CSIA_IRQ)
616		omap3isp_csi2_isr(&isp->isp_csi2a);
617
618	if (irqstatus & IRQ0STATUS_CSIB_IRQ)
619		omap3isp_ccp2_isr(&isp->isp_ccp2);
620
621	if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
622		if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
623			omap3isp_preview_isr_frame_sync(&isp->isp_prev);
624		if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
625			omap3isp_resizer_isr_frame_sync(&isp->isp_res);
626		omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
627		omap3isp_stat_isr_frame_sync(&isp->isp_af);
628		omap3isp_stat_isr_frame_sync(&isp->isp_hist);
629	}
630
631	if (irqstatus & ccdc_events)
632		omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
633
634	if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
635		if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
636			omap3isp_resizer_isr_frame_sync(&isp->isp_res);
637		omap3isp_preview_isr(&isp->isp_prev);
638	}
639
640	if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
641		omap3isp_resizer_isr(&isp->isp_res);
642
643	if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
644		omap3isp_stat_isr(&isp->isp_aewb);
645
646	if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
647		omap3isp_stat_isr(&isp->isp_af);
648
649	if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
650		omap3isp_stat_isr(&isp->isp_hist);
651
652	omap3isp_flush(isp);
653
654#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
655	isp_isr_dbg(isp, irqstatus);
656#endif
657
658	return IRQ_HANDLED;
659}
660
661/* -----------------------------------------------------------------------------
662 * Pipeline power management
663 *
664 * Entities must be powered up when part of a pipeline that contains at least
665 * one open video device node.
666 *
667 * To achieve this use the entity use_count field to track the number of users.
668 * For entities corresponding to video device nodes the use_count field stores
669 * the users count of the node. For entities corresponding to subdevs the
670 * use_count field stores the total number of users of all video device nodes
671 * in the pipeline.
672 *
673 * The omap3isp_pipeline_pm_use() function must be called in the open() and
674 * close() handlers of video device nodes. It increments or decrements the use
675 * count of all subdev entities in the pipeline.
676 *
677 * To react to link management on powered pipelines, the link setup notification
678 * callback updates the use count of all entities in the source and sink sides
679 * of the link.
680 */
681
682/*
683 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
684 * @entity: The entity
685 *
686 * Return the total number of users of all video device nodes in the pipeline.
687 */
688static int isp_pipeline_pm_use_count(struct media_entity *entity)
689{
690	struct media_entity_graph graph;
691	int use = 0;
692
693	media_entity_graph_walk_start(&graph, entity);
694
695	while ((entity = media_entity_graph_walk_next(&graph))) {
696		if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
697			use += entity->use_count;
698	}
699
700	return use;
701}
702
703/*
704 * isp_pipeline_pm_power_one - Apply power change to an entity
705 * @entity: The entity
706 * @change: Use count change
707 *
708 * Change the entity use count by @change. If the entity is a subdev update its
709 * power state by calling the core::s_power operation when the use count goes
710 * from 0 to != 0 or from != 0 to 0.
711 *
712 * Return 0 on success or a negative error code on failure.
713 */
714static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
715{
716	struct v4l2_subdev *subdev;
717	int ret;
718
719	subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
720	       ? media_entity_to_v4l2_subdev(entity) : NULL;
721
722	if (entity->use_count == 0 && change > 0 && subdev != NULL) {
723		ret = v4l2_subdev_call(subdev, core, s_power, 1);
724		if (ret < 0 && ret != -ENOIOCTLCMD)
725			return ret;
726	}
727
728	entity->use_count += change;
729	WARN_ON(entity->use_count < 0);
730
731	if (entity->use_count == 0 && change < 0 && subdev != NULL)
732		v4l2_subdev_call(subdev, core, s_power, 0);
733
734	return 0;
735}
736
737/*
738 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
739 * @entity: The entity
740 * @change: Use count change
741 *
742 * Walk the pipeline to update the use count and the power state of all non-node
743 * entities.
744 *
745 * Return 0 on success or a negative error code on failure.
746 */
747static int isp_pipeline_pm_power(struct media_entity *entity, int change)
748{
749	struct media_entity_graph graph;
750	struct media_entity *first = entity;
751	int ret = 0;
752
753	if (!change)
754		return 0;
755
756	media_entity_graph_walk_start(&graph, entity);
757
758	while (!ret && (entity = media_entity_graph_walk_next(&graph)))
759		if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
760			ret = isp_pipeline_pm_power_one(entity, change);
761
762	if (!ret)
763		return 0;
764
765	media_entity_graph_walk_start(&graph, first);
766
767	while ((first = media_entity_graph_walk_next(&graph))
768	       && first != entity)
769		if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
770			isp_pipeline_pm_power_one(first, -change);
771
772	return ret;
773}
774
775/*
776 * omap3isp_pipeline_pm_use - Update the use count of an entity
777 * @entity: The entity
778 * @use: Use (1) or stop using (0) the entity
779 *
780 * Update the use count of all entities in the pipeline and power entities on or
781 * off accordingly.
782 *
783 * Return 0 on success or a negative error code on failure. Powering entities
784 * off is assumed to never fail. No failure can occur when the use parameter is
785 * set to 0.
786 */
787int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
788{
789	int change = use ? 1 : -1;
790	int ret;
791
792	mutex_lock(&entity->parent->graph_mutex);
793
794	/* Apply use count to node. */
795	entity->use_count += change;
796	WARN_ON(entity->use_count < 0);
797
798	/* Apply power change to connected non-nodes. */
799	ret = isp_pipeline_pm_power(entity, change);
800	if (ret < 0)
801		entity->use_count -= change;
802
803	mutex_unlock(&entity->parent->graph_mutex);
804
805	return ret;
806}
807
808/*
809 * isp_pipeline_link_notify - Link management notification callback
810 * @link: The link
811 * @flags: New link flags that will be applied
812 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
813 *
814 * React to link management on powered pipelines by updating the use count of
815 * all entities in the source and sink sides of the link. Entities are powered
816 * on or off accordingly.
817 *
818 * Return 0 on success or a negative error code on failure. Powering entities
819 * off is assumed to never fail. This function will not fail for disconnection
820 * events.
821 */
822static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
823				    unsigned int notification)
824{
825	struct media_entity *source = link->source->entity;
826	struct media_entity *sink = link->sink->entity;
827	int source_use = isp_pipeline_pm_use_count(source);
828	int sink_use = isp_pipeline_pm_use_count(sink);
829	int ret;
830
831	if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
832	    !(flags & MEDIA_LNK_FL_ENABLED)) {
833		/* Powering off entities is assumed to never fail. */
834		isp_pipeline_pm_power(source, -sink_use);
835		isp_pipeline_pm_power(sink, -source_use);
836		return 0;
837	}
838
839	if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH &&
840		(flags & MEDIA_LNK_FL_ENABLED)) {
841
842		ret = isp_pipeline_pm_power(source, sink_use);
843		if (ret < 0)
844			return ret;
845
846		ret = isp_pipeline_pm_power(sink, source_use);
847		if (ret < 0)
848			isp_pipeline_pm_power(source, -sink_use);
849
850		return ret;
851	}
852
853	return 0;
854}
855
856/* -----------------------------------------------------------------------------
857 * Pipeline stream management
858 */
859
860/*
861 * isp_pipeline_enable - Enable streaming on a pipeline
862 * @pipe: ISP pipeline
863 * @mode: Stream mode (single shot or continuous)
864 *
865 * Walk the entities chain starting at the pipeline output video node and start
866 * all modules in the chain in the given mode.
867 *
868 * Return 0 if successful, or the return value of the failed video::s_stream
869 * operation otherwise.
870 */
871static int isp_pipeline_enable(struct isp_pipeline *pipe,
872			       enum isp_pipeline_stream_state mode)
873{
874	struct isp_device *isp = pipe->output->isp;
875	struct media_entity *entity;
876	struct media_pad *pad;
877	struct v4l2_subdev *subdev;
878	unsigned long flags;
879	int ret;
880
881	/* Refuse to start streaming if an entity included in the pipeline has
882	 * crashed. This check must be performed before the loop below to avoid
883	 * starting entities if the pipeline won't start anyway (those entities
884	 * would then likely fail to stop, making the problem worse).
885	 */
886	if (pipe->entities & isp->crashed)
887		return -EIO;
888
889	spin_lock_irqsave(&pipe->lock, flags);
890	pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
891	spin_unlock_irqrestore(&pipe->lock, flags);
892
893	pipe->do_propagation = false;
894
895	entity = &pipe->output->video.entity;
896	while (1) {
897		pad = &entity->pads[0];
898		if (!(pad->flags & MEDIA_PAD_FL_SINK))
899			break;
900
901		pad = media_entity_remote_pad(pad);
902		if (pad == NULL ||
903		    media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
904			break;
905
906		entity = pad->entity;
907		subdev = media_entity_to_v4l2_subdev(entity);
908
909		ret = v4l2_subdev_call(subdev, video, s_stream, mode);
910		if (ret < 0 && ret != -ENOIOCTLCMD)
911			return ret;
912
913		if (subdev == &isp->isp_ccdc.subdev) {
914			v4l2_subdev_call(&isp->isp_aewb.subdev, video,
915					s_stream, mode);
916			v4l2_subdev_call(&isp->isp_af.subdev, video,
917					s_stream, mode);
918			v4l2_subdev_call(&isp->isp_hist.subdev, video,
919					s_stream, mode);
920			pipe->do_propagation = true;
921		}
922	}
923
924	return 0;
925}
926
927static int isp_pipeline_wait_resizer(struct isp_device *isp)
928{
929	return omap3isp_resizer_busy(&isp->isp_res);
930}
931
932static int isp_pipeline_wait_preview(struct isp_device *isp)
933{
934	return omap3isp_preview_busy(&isp->isp_prev);
935}
936
937static int isp_pipeline_wait_ccdc(struct isp_device *isp)
938{
939	return omap3isp_stat_busy(&isp->isp_af)
940	    || omap3isp_stat_busy(&isp->isp_aewb)
941	    || omap3isp_stat_busy(&isp->isp_hist)
942	    || omap3isp_ccdc_busy(&isp->isp_ccdc);
943}
944
945#define ISP_STOP_TIMEOUT	msecs_to_jiffies(1000)
946
947static int isp_pipeline_wait(struct isp_device *isp,
948			     int(*busy)(struct isp_device *isp))
949{
950	unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
951
952	while (!time_after(jiffies, timeout)) {
953		if (!busy(isp))
954			return 0;
955	}
956
957	return 1;
958}
959
960/*
961 * isp_pipeline_disable - Disable streaming on a pipeline
962 * @pipe: ISP pipeline
963 *
964 * Walk the entities chain starting at the pipeline output video node and stop
965 * all modules in the chain. Wait synchronously for the modules to be stopped if
966 * necessary.
967 *
968 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
969 * can't be stopped (in which case a software reset of the ISP is probably
970 * necessary).
971 */
972static int isp_pipeline_disable(struct isp_pipeline *pipe)
973{
974	struct isp_device *isp = pipe->output->isp;
975	struct media_entity *entity;
976	struct media_pad *pad;
977	struct v4l2_subdev *subdev;
978	int failure = 0;
979	int ret;
980
981	/*
982	 * We need to stop all the modules after CCDC first or they'll
983	 * never stop since they may not get a full frame from CCDC.
984	 */
985	entity = &pipe->output->video.entity;
986	while (1) {
987		pad = &entity->pads[0];
988		if (!(pad->flags & MEDIA_PAD_FL_SINK))
989			break;
990
991		pad = media_entity_remote_pad(pad);
992		if (pad == NULL ||
993		    media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
994			break;
995
996		entity = pad->entity;
997		subdev = media_entity_to_v4l2_subdev(entity);
998
999		if (subdev == &isp->isp_ccdc.subdev) {
1000			v4l2_subdev_call(&isp->isp_aewb.subdev,
1001					 video, s_stream, 0);
1002			v4l2_subdev_call(&isp->isp_af.subdev,
1003					 video, s_stream, 0);
1004			v4l2_subdev_call(&isp->isp_hist.subdev,
1005					 video, s_stream, 0);
1006		}
1007
1008		ret = v4l2_subdev_call(subdev, video, s_stream, 0);
1009
1010		if (subdev == &isp->isp_res.subdev)
1011			ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
1012		else if (subdev == &isp->isp_prev.subdev)
1013			ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
1014		else if (subdev == &isp->isp_ccdc.subdev)
1015			ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
1016
1017		/* Handle stop failures. An entity that fails to stop can
1018		 * usually just be restarted. Flag the stop failure nonetheless
1019		 * to trigger an ISP reset the next time the device is released,
1020		 * just in case.
1021		 *
1022		 * The preview engine is a special case. A failure to stop can
1023		 * mean a hardware crash. When that happens the preview engine
1024		 * won't respond to read/write operations on the L4 bus anymore,
1025		 * resulting in a bus fault and a kernel oops next time it gets
1026		 * accessed. Mark it as crashed to prevent pipelines including
1027		 * it from being started.
1028		 */
1029		if (ret) {
1030			dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1031			isp->stop_failure = true;
1032			if (subdev == &isp->isp_prev.subdev)
1033				isp->crashed |= 1U << subdev->entity.id;
1034			failure = -ETIMEDOUT;
1035		}
1036	}
1037
1038	return failure;
1039}
1040
1041/*
1042 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1043 * @pipe: ISP pipeline
1044 * @state: Stream state (stopped, single shot or continuous)
1045 *
1046 * Set the pipeline to the given stream state. Pipelines can be started in
1047 * single-shot or continuous mode.
1048 *
1049 * Return 0 if successful, or the return value of the failed video::s_stream
1050 * operation otherwise. The pipeline state is not updated when the operation
1051 * fails, except when stopping the pipeline.
1052 */
1053int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1054				 enum isp_pipeline_stream_state state)
1055{
1056	int ret;
1057
1058	if (state == ISP_PIPELINE_STREAM_STOPPED)
1059		ret = isp_pipeline_disable(pipe);
1060	else
1061		ret = isp_pipeline_enable(pipe, state);
1062
1063	if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1064		pipe->stream_state = state;
1065
1066	return ret;
1067}
1068
1069/*
1070 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1071 * @pipe: ISP pipeline
1072 *
1073 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1074 * erroneous and makes sure no new buffer can be queued. This function is called
1075 * when a fatal error that prevents any further operation on the pipeline
1076 * occurs.
1077 */
1078void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1079{
1080	if (pipe->input)
1081		omap3isp_video_cancel_stream(pipe->input);
1082	if (pipe->output)
1083		omap3isp_video_cancel_stream(pipe->output);
1084}
1085
1086/*
1087 * isp_pipeline_resume - Resume streaming on a pipeline
1088 * @pipe: ISP pipeline
1089 *
1090 * Resume video output and input and re-enable pipeline.
1091 */
1092static void isp_pipeline_resume(struct isp_pipeline *pipe)
1093{
1094	int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1095
1096	omap3isp_video_resume(pipe->output, !singleshot);
1097	if (singleshot)
1098		omap3isp_video_resume(pipe->input, 0);
1099	isp_pipeline_enable(pipe, pipe->stream_state);
1100}
1101
1102/*
1103 * isp_pipeline_suspend - Suspend streaming on a pipeline
1104 * @pipe: ISP pipeline
1105 *
1106 * Suspend pipeline.
1107 */
1108static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1109{
1110	isp_pipeline_disable(pipe);
1111}
1112
1113/*
1114 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1115 * 			  video node
1116 * @me: ISP module's media entity
1117 *
1118 * Returns 1 if the entity has an enabled link to the output video node or 0
1119 * otherwise. It's true only while pipeline can have no more than one output
1120 * node.
1121 */
1122static int isp_pipeline_is_last(struct media_entity *me)
1123{
1124	struct isp_pipeline *pipe;
1125	struct media_pad *pad;
1126
1127	if (!me->pipe)
1128		return 0;
1129	pipe = to_isp_pipeline(me);
1130	if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1131		return 0;
1132	pad = media_entity_remote_pad(&pipe->output->pad);
1133	return pad->entity == me;
1134}
1135
1136/*
1137 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1138 * @me: ISP module's media entity
1139 *
1140 * Suspend the whole pipeline if module's entity has an enabled link to the
1141 * output video node. It works only while pipeline can have no more than one
1142 * output node.
1143 */
1144static void isp_suspend_module_pipeline(struct media_entity *me)
1145{
1146	if (isp_pipeline_is_last(me))
1147		isp_pipeline_suspend(to_isp_pipeline(me));
1148}
1149
1150/*
1151 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1152 * @me: ISP module's media entity
1153 *
1154 * Resume the whole pipeline if module's entity has an enabled link to the
1155 * output video node. It works only while pipeline can have no more than one
1156 * output node.
1157 */
1158static void isp_resume_module_pipeline(struct media_entity *me)
1159{
1160	if (isp_pipeline_is_last(me))
1161		isp_pipeline_resume(to_isp_pipeline(me));
1162}
1163
1164/*
1165 * isp_suspend_modules - Suspend ISP submodules.
1166 * @isp: OMAP3 ISP device
1167 *
1168 * Returns 0 if suspend left in idle state all the submodules properly,
1169 * or returns 1 if a general Reset is required to suspend the submodules.
1170 */
1171static int isp_suspend_modules(struct isp_device *isp)
1172{
1173	unsigned long timeout;
1174
1175	omap3isp_stat_suspend(&isp->isp_aewb);
1176	omap3isp_stat_suspend(&isp->isp_af);
1177	omap3isp_stat_suspend(&isp->isp_hist);
1178	isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1179	isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1180	isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1181	isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1182	isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1183
1184	timeout = jiffies + ISP_STOP_TIMEOUT;
1185	while (omap3isp_stat_busy(&isp->isp_af)
1186	    || omap3isp_stat_busy(&isp->isp_aewb)
1187	    || omap3isp_stat_busy(&isp->isp_hist)
1188	    || omap3isp_preview_busy(&isp->isp_prev)
1189	    || omap3isp_resizer_busy(&isp->isp_res)
1190	    || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1191		if (time_after(jiffies, timeout)) {
1192			dev_info(isp->dev, "can't stop modules.\n");
1193			return 1;
1194		}
1195		msleep(1);
1196	}
1197
1198	return 0;
1199}
1200
1201/*
1202 * isp_resume_modules - Resume ISP submodules.
1203 * @isp: OMAP3 ISP device
1204 */
1205static void isp_resume_modules(struct isp_device *isp)
1206{
1207	omap3isp_stat_resume(&isp->isp_aewb);
1208	omap3isp_stat_resume(&isp->isp_af);
1209	omap3isp_stat_resume(&isp->isp_hist);
1210	isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1211	isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1212	isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1213	isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1214	isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1215}
1216
1217/*
1218 * isp_reset - Reset ISP with a timeout wait for idle.
1219 * @isp: OMAP3 ISP device
1220 */
1221static int isp_reset(struct isp_device *isp)
1222{
1223	unsigned long timeout = 0;
1224
1225	isp_reg_writel(isp,
1226		       isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1227		       | ISP_SYSCONFIG_SOFTRESET,
1228		       OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1229	while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1230			       ISP_SYSSTATUS) & 0x1)) {
1231		if (timeout++ > 10000) {
1232			dev_alert(isp->dev, "cannot reset ISP\n");
1233			return -ETIMEDOUT;
1234		}
1235		udelay(1);
1236	}
1237
1238	isp->stop_failure = false;
1239	isp->crashed = 0;
1240	return 0;
1241}
1242
1243/*
1244 * isp_save_context - Saves the values of the ISP module registers.
1245 * @isp: OMAP3 ISP device
1246 * @reg_list: Structure containing pairs of register address and value to
1247 *            modify on OMAP.
1248 */
1249static void
1250isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1251{
1252	struct isp_reg *next = reg_list;
1253
1254	for (; next->reg != ISP_TOK_TERM; next++)
1255		next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1256}
1257
1258/*
1259 * isp_restore_context - Restores the values of the ISP module registers.
1260 * @isp: OMAP3 ISP device
1261 * @reg_list: Structure containing pairs of register address and value to
1262 *            modify on OMAP.
1263 */
1264static void
1265isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1266{
1267	struct isp_reg *next = reg_list;
1268
1269	for (; next->reg != ISP_TOK_TERM; next++)
1270		isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1271}
1272
1273/*
1274 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1275 * @isp: OMAP3 ISP device
1276 *
1277 * Routine for saving the context of each module in the ISP.
1278 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1279 */
1280static void isp_save_ctx(struct isp_device *isp)
1281{
1282	isp_save_context(isp, isp_reg_list);
1283	omap_iommu_save_ctx(isp->dev);
1284}
1285
1286/*
1287 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1288 * @isp: OMAP3 ISP device
1289 *
1290 * Routine for restoring the context of each module in the ISP.
1291 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1292 */
1293static void isp_restore_ctx(struct isp_device *isp)
1294{
1295	isp_restore_context(isp, isp_reg_list);
1296	omap_iommu_restore_ctx(isp->dev);
1297	omap3isp_ccdc_restore_context(isp);
1298	omap3isp_preview_restore_context(isp);
1299}
1300
1301/* -----------------------------------------------------------------------------
1302 * SBL resources management
1303 */
1304#define OMAP3_ISP_SBL_READ	(OMAP3_ISP_SBL_CSI1_READ | \
1305				 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1306				 OMAP3_ISP_SBL_PREVIEW_READ | \
1307				 OMAP3_ISP_SBL_RESIZER_READ)
1308#define OMAP3_ISP_SBL_WRITE	(OMAP3_ISP_SBL_CSI1_WRITE | \
1309				 OMAP3_ISP_SBL_CSI2A_WRITE | \
1310				 OMAP3_ISP_SBL_CSI2C_WRITE | \
1311				 OMAP3_ISP_SBL_CCDC_WRITE | \
1312				 OMAP3_ISP_SBL_PREVIEW_WRITE)
1313
1314void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1315{
1316	u32 sbl = 0;
1317
1318	isp->sbl_resources |= res;
1319
1320	if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1321		sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1322
1323	if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1324		sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1325
1326	if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1327		sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1328
1329	if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1330		sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1331
1332	if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1333		sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1334
1335	if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1336		sbl |= ISPCTRL_SBL_RD_RAM_EN;
1337
1338	isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1339}
1340
1341void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1342{
1343	u32 sbl = 0;
1344
1345	isp->sbl_resources &= ~res;
1346
1347	if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1348		sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1349
1350	if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1351		sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1352
1353	if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1354		sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1355
1356	if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1357		sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1358
1359	if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1360		sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1361
1362	if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1363		sbl |= ISPCTRL_SBL_RD_RAM_EN;
1364
1365	isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1366}
1367
1368/*
1369 * isp_module_sync_idle - Helper to sync module with its idle state
1370 * @me: ISP submodule's media entity
1371 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1372 * @stopping: flag which tells module wants to stop
1373 *
1374 * This function checks if ISP submodule needs to wait for next interrupt. If
1375 * yes, makes the caller to sleep while waiting for such event.
1376 */
1377int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1378			      atomic_t *stopping)
1379{
1380	struct isp_pipeline *pipe = to_isp_pipeline(me);
1381
1382	if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1383	    (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1384	     !isp_pipeline_ready(pipe)))
1385		return 0;
1386
1387	/*
1388	 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1389	 * scenario. We'll call it here to avoid race conditions.
1390	 */
1391	atomic_set(stopping, 1);
1392	smp_mb();
1393
1394	/*
1395	 * If module is the last one, it's writing to memory. In this case,
1396	 * it's necessary to check if the module is already paused due to
1397	 * DMA queue underrun or if it has to wait for next interrupt to be
1398	 * idle.
1399	 * If it isn't the last one, the function won't sleep but *stopping
1400	 * will still be set to warn next submodule caller's interrupt the
1401	 * module wants to be idle.
1402	 */
1403	if (isp_pipeline_is_last(me)) {
1404		struct isp_video *video = pipe->output;
1405		unsigned long flags;
1406		spin_lock_irqsave(&video->irqlock, flags);
1407		if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1408			spin_unlock_irqrestore(&video->irqlock, flags);
1409			atomic_set(stopping, 0);
1410			smp_mb();
1411			return 0;
1412		}
1413		spin_unlock_irqrestore(&video->irqlock, flags);
1414		if (!wait_event_timeout(*wait, !atomic_read(stopping),
1415					msecs_to_jiffies(1000))) {
1416			atomic_set(stopping, 0);
1417			smp_mb();
1418			return -ETIMEDOUT;
1419		}
1420	}
1421
1422	return 0;
1423}
1424
1425/*
1426 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1427 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1428 * @stopping: flag which tells module wants to stop
1429 *
1430 * This function checks if ISP submodule was stopping. In case of yes, it
1431 * notices the caller by setting stopping to 0 and waking up the wait queue.
1432 * Returns 1 if it was stopping or 0 otherwise.
1433 */
1434int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1435				     atomic_t *stopping)
1436{
1437	if (atomic_cmpxchg(stopping, 1, 0)) {
1438		wake_up(wait);
1439		return 1;
1440	}
1441
1442	return 0;
1443}
1444
1445/* --------------------------------------------------------------------------
1446 * Clock management
1447 */
1448
1449#define ISPCTRL_CLKS_MASK	(ISPCTRL_H3A_CLK_EN | \
1450				 ISPCTRL_HIST_CLK_EN | \
1451				 ISPCTRL_RSZ_CLK_EN | \
1452				 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1453				 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1454
1455static void __isp_subclk_update(struct isp_device *isp)
1456{
1457	u32 clk = 0;
1458
1459	/* AEWB and AF share the same clock. */
1460	if (isp->subclk_resources &
1461	    (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1462		clk |= ISPCTRL_H3A_CLK_EN;
1463
1464	if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1465		clk |= ISPCTRL_HIST_CLK_EN;
1466
1467	if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1468		clk |= ISPCTRL_RSZ_CLK_EN;
1469
1470	/* NOTE: For CCDC & Preview submodules, we need to affect internal
1471	 *       RAM as well.
1472	 */
1473	if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1474		clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1475
1476	if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1477		clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1478
1479	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1480			ISPCTRL_CLKS_MASK, clk);
1481}
1482
1483void omap3isp_subclk_enable(struct isp_device *isp,
1484			    enum isp_subclk_resource res)
1485{
1486	isp->subclk_resources |= res;
1487
1488	__isp_subclk_update(isp);
1489}
1490
1491void omap3isp_subclk_disable(struct isp_device *isp,
1492			     enum isp_subclk_resource res)
1493{
1494	isp->subclk_resources &= ~res;
1495
1496	__isp_subclk_update(isp);
1497}
1498
1499/*
1500 * isp_enable_clocks - Enable ISP clocks
1501 * @isp: OMAP3 ISP device
1502 *
1503 * Return 0 if successful, or clk_prepare_enable return value if any of them
1504 * fails.
1505 */
1506static int isp_enable_clocks(struct isp_device *isp)
1507{
1508	int r;
1509	unsigned long rate;
1510
1511	r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1512	if (r) {
1513		dev_err(isp->dev, "failed to enable cam_ick clock\n");
1514		goto out_clk_enable_ick;
1515	}
1516	r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1517	if (r) {
1518		dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1519		goto out_clk_enable_mclk;
1520	}
1521	r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1522	if (r) {
1523		dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1524		goto out_clk_enable_mclk;
1525	}
1526	rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1527	if (rate != CM_CAM_MCLK_HZ)
1528		dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1529				   " expected : %d\n"
1530				   " actual   : %ld\n", CM_CAM_MCLK_HZ, rate);
1531	r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1532	if (r) {
1533		dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1534		goto out_clk_enable_csi2_fclk;
1535	}
1536	return 0;
1537
1538out_clk_enable_csi2_fclk:
1539	clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1540out_clk_enable_mclk:
1541	clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1542out_clk_enable_ick:
1543	return r;
1544}
1545
1546/*
1547 * isp_disable_clocks - Disable ISP clocks
1548 * @isp: OMAP3 ISP device
1549 */
1550static void isp_disable_clocks(struct isp_device *isp)
1551{
1552	clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1553	clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1554	clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1555}
1556
1557static const char *isp_clocks[] = {
1558	"cam_ick",
1559	"cam_mclk",
1560	"csi2_96m_fck",
1561	"l3_ick",
1562};
1563
1564static int isp_get_clocks(struct isp_device *isp)
1565{
1566	struct clk *clk;
1567	unsigned int i;
1568
1569	for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1570		clk = devm_clk_get(isp->dev, isp_clocks[i]);
1571		if (IS_ERR(clk)) {
1572			dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1573			return PTR_ERR(clk);
1574		}
1575
1576		isp->clock[i] = clk;
1577	}
1578
1579	return 0;
1580}
1581
1582/*
1583 * omap3isp_get - Acquire the ISP resource.
1584 *
1585 * Initializes the clocks for the first acquire.
1586 *
1587 * Increment the reference count on the ISP. If the first reference is taken,
1588 * enable clocks and power-up all submodules.
1589 *
1590 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1591 */
1592static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1593{
1594	struct isp_device *__isp = isp;
1595
1596	if (isp == NULL)
1597		return NULL;
1598
1599	mutex_lock(&isp->isp_mutex);
1600	if (isp->ref_count > 0)
1601		goto out;
1602
1603	if (isp_enable_clocks(isp) < 0) {
1604		__isp = NULL;
1605		goto out;
1606	}
1607
1608	/* We don't want to restore context before saving it! */
1609	if (isp->has_context)
1610		isp_restore_ctx(isp);
1611
1612	if (irq)
1613		isp_enable_interrupts(isp);
1614
1615out:
1616	if (__isp != NULL)
1617		isp->ref_count++;
1618	mutex_unlock(&isp->isp_mutex);
1619
1620	return __isp;
1621}
1622
1623struct isp_device *omap3isp_get(struct isp_device *isp)
1624{
1625	return __omap3isp_get(isp, true);
1626}
1627
1628/*
1629 * omap3isp_put - Release the ISP
1630 *
1631 * Decrement the reference count on the ISP. If the last reference is released,
1632 * power-down all submodules, disable clocks and free temporary buffers.
1633 */
1634static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
1635{
1636	if (isp == NULL)
1637		return;
1638
1639	mutex_lock(&isp->isp_mutex);
1640	BUG_ON(isp->ref_count == 0);
1641	if (--isp->ref_count == 0) {
1642		isp_disable_interrupts(isp);
1643		if (save_ctx) {
1644			isp_save_ctx(isp);
1645			isp->has_context = 1;
1646		}
1647		/* Reset the ISP if an entity has failed to stop. This is the
1648		 * only way to recover from such conditions.
1649		 */
1650		if (isp->crashed || isp->stop_failure)
1651			isp_reset(isp);
1652		isp_disable_clocks(isp);
1653	}
1654	mutex_unlock(&isp->isp_mutex);
1655}
1656
1657void omap3isp_put(struct isp_device *isp)
1658{
1659	__omap3isp_put(isp, true);
1660}
1661
1662/* --------------------------------------------------------------------------
1663 * Platform device driver
1664 */
1665
1666/*
1667 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1668 * @isp: OMAP3 ISP device
1669 */
1670#define ISP_PRINT_REGISTER(isp, name)\
1671	dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1672		isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1673#define SBL_PRINT_REGISTER(isp, name)\
1674	dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1675		isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1676
1677void omap3isp_print_status(struct isp_device *isp)
1678{
1679	dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1680
1681	ISP_PRINT_REGISTER(isp, SYSCONFIG);
1682	ISP_PRINT_REGISTER(isp, SYSSTATUS);
1683	ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1684	ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1685	ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1686	ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1687	ISP_PRINT_REGISTER(isp, CTRL);
1688	ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1689	ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1690	ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1691	ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1692	ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1693	ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1694	ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1695	ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1696
1697	SBL_PRINT_REGISTER(isp, PCR);
1698	SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1699
1700	dev_dbg(isp->dev, "--------------------------------------------\n");
1701}
1702
1703#ifdef CONFIG_PM
1704
1705/*
1706 * Power management support.
1707 *
1708 * As the ISP can't properly handle an input video stream interruption on a non
1709 * frame boundary, the ISP pipelines need to be stopped before sensors get
1710 * suspended. However, as suspending the sensors can require a running clock,
1711 * which can be provided by the ISP, the ISP can't be completely suspended
1712 * before the sensor.
1713 *
1714 * To solve this problem power management support is split into prepare/complete
1715 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1716 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1717 * resume(), and the the pipelines are restarted in complete().
1718 *
1719 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1720 * yet.
1721 */
1722static int isp_pm_prepare(struct device *dev)
1723{
1724	struct isp_device *isp = dev_get_drvdata(dev);
1725	int reset;
1726
1727	WARN_ON(mutex_is_locked(&isp->isp_mutex));
1728
1729	if (isp->ref_count == 0)
1730		return 0;
1731
1732	reset = isp_suspend_modules(isp);
1733	isp_disable_interrupts(isp);
1734	isp_save_ctx(isp);
1735	if (reset)
1736		isp_reset(isp);
1737
1738	return 0;
1739}
1740
1741static int isp_pm_suspend(struct device *dev)
1742{
1743	struct isp_device *isp = dev_get_drvdata(dev);
1744
1745	WARN_ON(mutex_is_locked(&isp->isp_mutex));
1746
1747	if (isp->ref_count)
1748		isp_disable_clocks(isp);
1749
1750	return 0;
1751}
1752
1753static int isp_pm_resume(struct device *dev)
1754{
1755	struct isp_device *isp = dev_get_drvdata(dev);
1756
1757	if (isp->ref_count == 0)
1758		return 0;
1759
1760	return isp_enable_clocks(isp);
1761}
1762
1763static void isp_pm_complete(struct device *dev)
1764{
1765	struct isp_device *isp = dev_get_drvdata(dev);
1766
1767	if (isp->ref_count == 0)
1768		return;
1769
1770	isp_restore_ctx(isp);
1771	isp_enable_interrupts(isp);
1772	isp_resume_modules(isp);
1773}
1774
1775#else
1776
1777#define isp_pm_prepare	NULL
1778#define isp_pm_suspend	NULL
1779#define isp_pm_resume	NULL
1780#define isp_pm_complete	NULL
1781
1782#endif /* CONFIG_PM */
1783
1784static void isp_unregister_entities(struct isp_device *isp)
1785{
1786	omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1787	omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1788	omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1789	omap3isp_preview_unregister_entities(&isp->isp_prev);
1790	omap3isp_resizer_unregister_entities(&isp->isp_res);
1791	omap3isp_stat_unregister_entities(&isp->isp_aewb);
1792	omap3isp_stat_unregister_entities(&isp->isp_af);
1793	omap3isp_stat_unregister_entities(&isp->isp_hist);
1794
1795	v4l2_device_unregister(&isp->v4l2_dev);
1796	media_device_unregister(&isp->media_dev);
1797}
1798
1799/*
1800 * isp_register_subdev - Register a sub-device
1801 * @isp: OMAP3 ISP device
1802 * @isp_subdev: platform data related to a sub-device
1803 *
1804 * Register an I2C sub-device which has not been registered by other
1805 * means (such as the Device Tree).
1806 *
1807 * Return a pointer to the sub-device if it has been successfully
1808 * registered, or NULL otherwise.
1809 */
1810static struct v4l2_subdev *
1811isp_register_subdev(struct isp_device *isp,
1812		    struct isp_platform_subdev *isp_subdev)
1813{
1814	struct i2c_adapter *adapter;
1815	struct v4l2_subdev *sd;
1816
1817	if (isp_subdev->board_info == NULL)
1818		return NULL;
1819
1820	adapter = i2c_get_adapter(isp_subdev->i2c_adapter_id);
1821	if (adapter == NULL) {
1822		dev_err(isp->dev,
1823			"%s: Unable to get I2C adapter %d for device %s\n",
1824			__func__, isp_subdev->i2c_adapter_id,
1825			isp_subdev->board_info->type);
1826		return NULL;
1827	}
1828
1829	sd = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1830				       isp_subdev->board_info, NULL);
1831	if (sd == NULL) {
1832		dev_err(isp->dev, "%s: Unable to register subdev %s\n",
1833			__func__, isp_subdev->board_info->type);
1834		return NULL;
1835	}
1836
1837	return sd;
1838}
1839
1840static int isp_link_entity(
1841	struct isp_device *isp, struct media_entity *entity,
1842	enum isp_interface_type interface)
1843{
1844	struct media_entity *input;
1845	unsigned int flags;
1846	unsigned int pad;
1847	unsigned int i;
1848
1849	/* Connect the sensor to the correct interface module.
1850	 * Parallel sensors are connected directly to the CCDC, while
1851	 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1852	 * receiver through CSIPHY1 or CSIPHY2.
1853	 */
1854	switch (interface) {
1855	case ISP_INTERFACE_PARALLEL:
1856		input = &isp->isp_ccdc.subdev.entity;
1857		pad = CCDC_PAD_SINK;
1858		flags = 0;
1859		break;
1860
1861	case ISP_INTERFACE_CSI2A_PHY2:
1862		input = &isp->isp_csi2a.subdev.entity;
1863		pad = CSI2_PAD_SINK;
1864		flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1865		break;
1866
1867	case ISP_INTERFACE_CCP2B_PHY1:
1868	case ISP_INTERFACE_CCP2B_PHY2:
1869		input = &isp->isp_ccp2.subdev.entity;
1870		pad = CCP2_PAD_SINK;
1871		flags = 0;
1872		break;
1873
1874	case ISP_INTERFACE_CSI2C_PHY1:
1875		input = &isp->isp_csi2c.subdev.entity;
1876		pad = CSI2_PAD_SINK;
1877		flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1878		break;
1879
1880	default:
1881		dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1882			interface);
1883		return -EINVAL;
1884	}
1885
1886	/*
1887	 * Not all interfaces are available on all revisions of the
1888	 * ISP. The sub-devices of those interfaces aren't initialised
1889	 * in such a case. Check this by ensuring the num_pads is
1890	 * non-zero.
1891	 */
1892	if (!input->num_pads) {
1893		dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1894			interface);
1895		return -EINVAL;
1896	}
1897
1898	for (i = 0; i < entity->num_pads; i++) {
1899		if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1900			break;
1901	}
1902	if (i == entity->num_pads) {
1903		dev_err(isp->dev, "%s: no source pad in external entity\n",
1904			__func__);
1905		return -EINVAL;
1906	}
1907
1908	return media_entity_create_link(entity, i, input, pad, flags);
1909}
1910
1911static int isp_register_entities(struct isp_device *isp)
1912{
1913	struct isp_platform_data *pdata = isp->pdata;
1914	struct isp_platform_subdev *isp_subdev;
1915	int ret;
1916
1917	isp->media_dev.dev = isp->dev;
1918	strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1919		sizeof(isp->media_dev.model));
1920	isp->media_dev.hw_revision = isp->revision;
1921	isp->media_dev.link_notify = isp_pipeline_link_notify;
1922	ret = media_device_register(&isp->media_dev);
1923	if (ret < 0) {
1924		dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
1925			__func__, ret);
1926		return ret;
1927	}
1928
1929	isp->v4l2_dev.mdev = &isp->media_dev;
1930	ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1931	if (ret < 0) {
1932		dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1933			__func__, ret);
1934		goto done;
1935	}
1936
1937	/* Register internal entities */
1938	ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1939	if (ret < 0)
1940		goto done;
1941
1942	ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1943	if (ret < 0)
1944		goto done;
1945
1946	ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1947	if (ret < 0)
1948		goto done;
1949
1950	ret = omap3isp_preview_register_entities(&isp->isp_prev,
1951						 &isp->v4l2_dev);
1952	if (ret < 0)
1953		goto done;
1954
1955	ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1956	if (ret < 0)
1957		goto done;
1958
1959	ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1960	if (ret < 0)
1961		goto done;
1962
1963	ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1964	if (ret < 0)
1965		goto done;
1966
1967	ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1968	if (ret < 0)
1969		goto done;
1970
1971	/*
1972	 * Device Tree --- the external sub-devices will be registered
1973	 * later. The same goes for the sub-device node registration.
1974	 */
1975	if (isp->dev->of_node)
1976		return 0;
1977
1978	/* Register external entities */
1979	for (isp_subdev = pdata ? pdata->subdevs : NULL;
1980	     isp_subdev && isp_subdev->board_info; isp_subdev++) {
1981		struct v4l2_subdev *sd;
1982
1983		sd = isp_register_subdev(isp, isp_subdev);
1984
1985		/*
1986		 * No bus information --- this is either a flash or a
1987		 * lens subdev.
1988		 */
1989		if (!sd || !isp_subdev->bus)
1990			continue;
1991
1992		sd->host_priv = isp_subdev->bus;
1993
1994		ret = isp_link_entity(isp, &sd->entity,
1995				      isp_subdev->bus->interface);
1996		if (ret < 0)
1997			goto done;
1998	}
1999
2000	ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2001
2002done:
2003	if (ret < 0) {
2004		isp_unregister_entities(isp);
2005		v4l2_async_notifier_unregister(&isp->notifier);
2006	}
2007
2008	return ret;
2009}
2010
2011static void isp_cleanup_modules(struct isp_device *isp)
2012{
2013	omap3isp_h3a_aewb_cleanup(isp);
2014	omap3isp_h3a_af_cleanup(isp);
2015	omap3isp_hist_cleanup(isp);
2016	omap3isp_resizer_cleanup(isp);
2017	omap3isp_preview_cleanup(isp);
2018	omap3isp_ccdc_cleanup(isp);
2019	omap3isp_ccp2_cleanup(isp);
2020	omap3isp_csi2_cleanup(isp);
2021}
2022
2023static int isp_initialize_modules(struct isp_device *isp)
2024{
2025	int ret;
2026
2027	ret = omap3isp_csiphy_init(isp);
2028	if (ret < 0) {
2029		dev_err(isp->dev, "CSI PHY initialization failed\n");
2030		goto error_csiphy;
2031	}
2032
2033	ret = omap3isp_csi2_init(isp);
2034	if (ret < 0) {
2035		dev_err(isp->dev, "CSI2 initialization failed\n");
2036		goto error_csi2;
2037	}
2038
2039	ret = omap3isp_ccp2_init(isp);
2040	if (ret < 0) {
2041		dev_err(isp->dev, "CCP2 initialization failed\n");
2042		goto error_ccp2;
2043	}
2044
2045	ret = omap3isp_ccdc_init(isp);
2046	if (ret < 0) {
2047		dev_err(isp->dev, "CCDC initialization failed\n");
2048		goto error_ccdc;
2049	}
2050
2051	ret = omap3isp_preview_init(isp);
2052	if (ret < 0) {
2053		dev_err(isp->dev, "Preview initialization failed\n");
2054		goto error_preview;
2055	}
2056
2057	ret = omap3isp_resizer_init(isp);
2058	if (ret < 0) {
2059		dev_err(isp->dev, "Resizer initialization failed\n");
2060		goto error_resizer;
2061	}
2062
2063	ret = omap3isp_hist_init(isp);
2064	if (ret < 0) {
2065		dev_err(isp->dev, "Histogram initialization failed\n");
2066		goto error_hist;
2067	}
2068
2069	ret = omap3isp_h3a_aewb_init(isp);
2070	if (ret < 0) {
2071		dev_err(isp->dev, "H3A AEWB initialization failed\n");
2072		goto error_h3a_aewb;
2073	}
2074
2075	ret = omap3isp_h3a_af_init(isp);
2076	if (ret < 0) {
2077		dev_err(isp->dev, "H3A AF initialization failed\n");
2078		goto error_h3a_af;
2079	}
2080
2081	/* Connect the submodules. */
2082	ret = media_entity_create_link(
2083			&isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2084			&isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2085	if (ret < 0)
2086		goto error_link;
2087
2088	ret = media_entity_create_link(
2089			&isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2090			&isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2091	if (ret < 0)
2092		goto error_link;
2093
2094	ret = media_entity_create_link(
2095			&isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2096			&isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2097	if (ret < 0)
2098		goto error_link;
2099
2100	ret = media_entity_create_link(
2101			&isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2102			&isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2103	if (ret < 0)
2104		goto error_link;
2105
2106	ret = media_entity_create_link(
2107			&isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2108			&isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2109	if (ret < 0)
2110		goto error_link;
2111
2112	ret = media_entity_create_link(
2113			&isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2114			&isp->isp_aewb.subdev.entity, 0,
2115			MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2116	if (ret < 0)
2117		goto error_link;
2118
2119	ret = media_entity_create_link(
2120			&isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2121			&isp->isp_af.subdev.entity, 0,
2122			MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2123	if (ret < 0)
2124		goto error_link;
2125
2126	ret = media_entity_create_link(
2127			&isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2128			&isp->isp_hist.subdev.entity, 0,
2129			MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2130	if (ret < 0)
2131		goto error_link;
2132
2133	return 0;
2134
2135error_link:
2136	omap3isp_h3a_af_cleanup(isp);
2137error_h3a_af:
2138	omap3isp_h3a_aewb_cleanup(isp);
2139error_h3a_aewb:
2140	omap3isp_hist_cleanup(isp);
2141error_hist:
2142	omap3isp_resizer_cleanup(isp);
2143error_resizer:
2144	omap3isp_preview_cleanup(isp);
2145error_preview:
2146	omap3isp_ccdc_cleanup(isp);
2147error_ccdc:
2148	omap3isp_ccp2_cleanup(isp);
2149error_ccp2:
2150	omap3isp_csi2_cleanup(isp);
2151error_csi2:
2152error_csiphy:
2153	return ret;
2154}
2155
2156static void isp_detach_iommu(struct isp_device *isp)
2157{
2158	arm_iommu_release_mapping(isp->mapping);
2159	isp->mapping = NULL;
2160	iommu_group_remove_device(isp->dev);
2161}
2162
2163static int isp_attach_iommu(struct isp_device *isp)
2164{
2165	struct dma_iommu_mapping *mapping;
2166	struct iommu_group *group;
2167	int ret;
2168
2169	/* Create a device group and add the device to it. */
2170	group = iommu_group_alloc();
2171	if (IS_ERR(group)) {
2172		dev_err(isp->dev, "failed to allocate IOMMU group\n");
2173		return PTR_ERR(group);
2174	}
2175
2176	ret = iommu_group_add_device(group, isp->dev);
2177	iommu_group_put(group);
2178
2179	if (ret < 0) {
2180		dev_err(isp->dev, "failed to add device to IPMMU group\n");
2181		return ret;
2182	}
2183
2184	/*
2185	 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2186	 * VAs. This will allocate a corresponding IOMMU domain.
2187	 */
2188	mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2189	if (IS_ERR(mapping)) {
2190		dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2191		ret = PTR_ERR(mapping);
2192		goto error;
2193	}
2194
2195	isp->mapping = mapping;
2196
2197	/* Attach the ARM VA mapping to the device. */
2198	ret = arm_iommu_attach_device(isp->dev, mapping);
2199	if (ret < 0) {
2200		dev_err(isp->dev, "failed to attach device to VA mapping\n");
2201		goto error;
2202	}
2203
2204	return 0;
2205
2206error:
2207	isp_detach_iommu(isp);
2208	return ret;
2209}
2210
2211/*
2212 * isp_remove - Remove ISP platform device
2213 * @pdev: Pointer to ISP platform device
2214 *
2215 * Always returns 0.
2216 */
2217static int isp_remove(struct platform_device *pdev)
2218{
2219	struct isp_device *isp = platform_get_drvdata(pdev);
2220
2221	v4l2_async_notifier_unregister(&isp->notifier);
2222	isp_unregister_entities(isp);
2223	isp_cleanup_modules(isp);
2224	isp_xclk_cleanup(isp);
2225
2226	__omap3isp_get(isp, false);
2227	isp_detach_iommu(isp);
2228	__omap3isp_put(isp, false);
2229
2230	return 0;
2231}
2232
2233enum isp_of_phy {
2234	ISP_OF_PHY_PARALLEL = 0,
2235	ISP_OF_PHY_CSIPHY1,
2236	ISP_OF_PHY_CSIPHY2,
2237};
2238
2239static int isp_of_parse_node(struct device *dev, struct device_node *node,
2240			     struct isp_async_subdev *isd)
2241{
2242	struct isp_bus_cfg *buscfg = &isd->bus;
2243	struct v4l2_of_endpoint vep;
2244	unsigned int i;
2245
2246	v4l2_of_parse_endpoint(node, &vep);
2247
2248	dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
2249		vep.base.port);
2250
2251	switch (vep.base.port) {
2252	case ISP_OF_PHY_PARALLEL:
2253		buscfg->interface = ISP_INTERFACE_PARALLEL;
2254		buscfg->bus.parallel.data_lane_shift =
2255			vep.bus.parallel.data_shift;
2256		buscfg->bus.parallel.clk_pol =
2257			!!(vep.bus.parallel.flags
2258			   & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2259		buscfg->bus.parallel.hs_pol =
2260			!!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2261		buscfg->bus.parallel.vs_pol =
2262			!!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2263		buscfg->bus.parallel.fld_pol =
2264			!!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2265		buscfg->bus.parallel.data_pol =
2266			!!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2267		break;
2268
2269	case ISP_OF_PHY_CSIPHY1:
2270	case ISP_OF_PHY_CSIPHY2:
2271		/* FIXME: always assume CSI-2 for now. */
2272		switch (vep.base.port) {
2273		case ISP_OF_PHY_CSIPHY1:
2274			buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
2275			break;
2276		case ISP_OF_PHY_CSIPHY2:
2277			buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
2278			break;
2279		}
2280		buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
2281		buscfg->bus.csi2.lanecfg.clk.pol =
2282			vep.bus.mipi_csi2.lane_polarities[0];
2283		dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2284			buscfg->bus.csi2.lanecfg.clk.pol,
2285			buscfg->bus.csi2.lanecfg.clk.pos);
2286
2287		for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
2288			buscfg->bus.csi2.lanecfg.data[i].pos =
2289				vep.bus.mipi_csi2.data_lanes[i];
2290			buscfg->bus.csi2.lanecfg.data[i].pol =
2291				vep.bus.mipi_csi2.lane_polarities[i + 1];
2292			dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
2293				buscfg->bus.csi2.lanecfg.data[i].pol,
2294				buscfg->bus.csi2.lanecfg.data[i].pos);
2295		}
2296
2297		/*
2298		 * FIXME: now we assume the CRC is always there.
2299		 * Implement a way to obtain this information from the
2300		 * sensor. Frame descriptors, perhaps?
2301		 */
2302		buscfg->bus.csi2.crc = 1;
2303		break;
2304
2305	default:
2306		dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
2307			 vep.base.port);
2308		break;
2309	}
2310
2311	return 0;
2312}
2313
2314static int isp_of_parse_nodes(struct device *dev,
2315			      struct v4l2_async_notifier *notifier)
2316{
2317	struct device_node *node = NULL;
2318
2319	notifier->subdevs = devm_kcalloc(
2320		dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
2321	if (!notifier->subdevs)
2322		return -ENOMEM;
2323
2324	while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
2325	       (node = of_graph_get_next_endpoint(dev->of_node, node))) {
2326		struct isp_async_subdev *isd;
2327
2328		isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
2329		if (!isd) {
2330			of_node_put(node);
2331			return -ENOMEM;
2332		}
2333
2334		notifier->subdevs[notifier->num_subdevs] = &isd->asd;
2335
2336		if (isp_of_parse_node(dev, node, isd)) {
2337			of_node_put(node);
2338			return -EINVAL;
2339		}
2340
2341		isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
2342		of_node_put(node);
2343		if (!isd->asd.match.of.node) {
2344			dev_warn(dev, "bad remote port parent\n");
2345			return -EINVAL;
2346		}
2347
2348		isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
2349		notifier->num_subdevs++;
2350	}
2351
2352	return notifier->num_subdevs;
2353}
2354
2355static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
2356				     struct v4l2_subdev *subdev,
2357				     struct v4l2_async_subdev *asd)
2358{
2359	struct isp_device *isp = container_of(async, struct isp_device,
2360					      notifier);
2361	struct isp_async_subdev *isd =
2362		container_of(asd, struct isp_async_subdev, asd);
2363	int ret;
2364
2365	ret = isp_link_entity(isp, &subdev->entity, isd->bus.interface);
2366	if (ret < 0)
2367		return ret;
2368
2369	isd->sd = subdev;
2370	isd->sd->host_priv = &isd->bus;
2371
2372	return ret;
2373}
2374
2375static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2376{
2377	struct isp_device *isp = container_of(async, struct isp_device,
2378					      notifier);
2379
2380	return v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2381}
2382
2383/*
2384 * isp_probe - Probe ISP platform device
2385 * @pdev: Pointer to ISP platform device
2386 *
2387 * Returns 0 if successful,
2388 *   -ENOMEM if no memory available,
2389 *   -ENODEV if no platform device resources found
2390 *     or no space for remapping registers,
2391 *   -EINVAL if couldn't install ISR,
2392 *   or clk_get return error value.
2393 */
2394static int isp_probe(struct platform_device *pdev)
2395{
2396	struct isp_device *isp;
2397	struct resource *mem;
2398	int ret;
2399	int i, m;
2400
2401	isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
2402	if (!isp) {
2403		dev_err(&pdev->dev, "could not allocate memory\n");
2404		return -ENOMEM;
2405	}
2406
2407	if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
2408		ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
2409					   &isp->phy_type);
2410		if (ret)
2411			return ret;
2412
2413		isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2414							      "syscon");
2415		if (IS_ERR(isp->syscon))
2416			return PTR_ERR(isp->syscon);
2417
2418		ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
2419						 &isp->syscon_offset);
2420		if (ret)
2421			return ret;
2422
2423		ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
2424		if (ret < 0)
2425			return ret;
2426		ret = v4l2_async_notifier_register(&isp->v4l2_dev,
2427						   &isp->notifier);
2428		if (ret)
2429			return ret;
2430	} else {
2431		isp->pdata = pdev->dev.platform_data;
2432		isp->syscon = syscon_regmap_lookup_by_pdevname("syscon.0");
2433		if (IS_ERR(isp->syscon))
2434			return PTR_ERR(isp->syscon);
2435		dev_warn(&pdev->dev,
2436			 "Platform data support is deprecated! Please move to DT now!\n");
2437	}
2438
2439	isp->autoidle = autoidle;
2440
2441	mutex_init(&isp->isp_mutex);
2442	spin_lock_init(&isp->stat_lock);
2443
2444	isp->dev = &pdev->dev;
2445	isp->ref_count = 0;
2446
2447	ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2448	if (ret)
2449		goto error;
2450
2451	platform_set_drvdata(pdev, isp);
2452
2453	/* Regulators */
2454	isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2455	isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
2456
2457	/* Clocks
2458	 *
2459	 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2460	 * manually to read the revision before calling __omap3isp_get().
2461	 *
2462	 * Start by mapping the ISP MMIO area, which is in two pieces.
2463	 * The ISP IOMMU is in between. Map both now, and fill in the
2464	 * ISP revision specific portions a little later in the
2465	 * function.
2466	 */
2467	for (i = 0; i < 2; i++) {
2468		unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2469
2470		mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2471		isp->mmio_base[map_idx] =
2472			devm_ioremap_resource(isp->dev, mem);
2473		if (IS_ERR(isp->mmio_base[map_idx]))
2474			return PTR_ERR(isp->mmio_base[map_idx]);
2475	}
2476
2477	ret = isp_get_clocks(isp);
2478	if (ret < 0)
2479		goto error;
2480
2481	ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2482	if (ret < 0)
2483		goto error;
2484
2485	isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2486	dev_info(isp->dev, "Revision %d.%d found\n",
2487		 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2488
2489	clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2490
2491	if (__omap3isp_get(isp, false) == NULL) {
2492		ret = -ENODEV;
2493		goto error;
2494	}
2495
2496	ret = isp_reset(isp);
2497	if (ret < 0)
2498		goto error_isp;
2499
2500	ret = isp_xclk_init(isp);
2501	if (ret < 0)
2502		goto error_isp;
2503
2504	/* Memory resources */
2505	for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2506		if (isp->revision == isp_res_maps[m].isp_rev)
2507			break;
2508
2509	if (m == ARRAY_SIZE(isp_res_maps)) {
2510		dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2511			(isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2512		ret = -ENODEV;
2513		goto error_isp;
2514	}
2515
2516	if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node) {
2517		isp->syscon_offset = isp_res_maps[m].syscon_offset;
2518		isp->phy_type = isp_res_maps[m].phy_type;
2519	}
2520
2521	for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2522		isp->mmio_base[i] =
2523			isp->mmio_base[0] + isp_res_maps[m].offset[i];
2524
2525	for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2526		isp->mmio_base[i] =
2527			isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2528			+ isp_res_maps[m].offset[i];
2529
2530	isp->mmio_hist_base_phys =
2531		mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
2532
2533	/* IOMMU */
2534	ret = isp_attach_iommu(isp);
2535	if (ret < 0) {
2536		dev_err(&pdev->dev, "unable to attach to IOMMU\n");
2537		goto error_isp;
2538	}
2539
2540	/* Interrupt */
2541	isp->irq_num = platform_get_irq(pdev, 0);
2542	if (isp->irq_num <= 0) {
2543		dev_err(isp->dev, "No IRQ resource\n");
2544		ret = -ENODEV;
2545		goto error_iommu;
2546	}
2547
2548	if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2549			     "OMAP3 ISP", isp)) {
2550		dev_err(isp->dev, "Unable to request IRQ\n");
2551		ret = -EINVAL;
2552		goto error_iommu;
2553	}
2554
2555	/* Entities */
2556	ret = isp_initialize_modules(isp);
2557	if (ret < 0)
2558		goto error_iommu;
2559
2560	isp->notifier.bound = isp_subdev_notifier_bound;
2561	isp->notifier.complete = isp_subdev_notifier_complete;
2562
2563	ret = isp_register_entities(isp);
2564	if (ret < 0)
2565		goto error_modules;
2566
2567	isp_core_init(isp, 1);
2568	omap3isp_put(isp);
2569
2570	return 0;
2571
2572error_modules:
2573	isp_cleanup_modules(isp);
2574error_iommu:
2575	isp_detach_iommu(isp);
2576error_isp:
2577	isp_xclk_cleanup(isp);
2578	__omap3isp_put(isp, false);
2579error:
2580	mutex_destroy(&isp->isp_mutex);
2581
2582	return ret;
2583}
2584
2585static const struct dev_pm_ops omap3isp_pm_ops = {
2586	.prepare = isp_pm_prepare,
2587	.suspend = isp_pm_suspend,
2588	.resume = isp_pm_resume,
2589	.complete = isp_pm_complete,
2590};
2591
2592static struct platform_device_id omap3isp_id_table[] = {
2593	{ "omap3isp", 0 },
2594	{ },
2595};
2596MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2597
2598static const struct of_device_id omap3isp_of_table[] = {
2599	{ .compatible = "ti,omap3-isp" },
2600	{ },
2601};
2602
2603static struct platform_driver omap3isp_driver = {
2604	.probe = isp_probe,
2605	.remove = isp_remove,
2606	.id_table = omap3isp_id_table,
2607	.driver = {
2608		.name = "omap3isp",
2609		.pm	= &omap3isp_pm_ops,
2610		.of_match_table = omap3isp_of_table,
2611	},
2612};
2613
2614module_platform_driver(omap3isp_driver);
2615
2616MODULE_AUTHOR("Nokia Corporation");
2617MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2618MODULE_LICENSE("GPL");
2619MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
2620