1/*
2 * iio/adc/ad799x.c
3 * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
4 *
5 * based on iio/adc/max1363
6 * Copyright (C) 2008-2010 Jonathan Cameron
7 *
8 * based on linux/drivers/i2c/chips/max123x
9 * Copyright (C) 2002-2004 Stefan Eletzhofer
10 *
11 * based on linux/drivers/acron/char/pcf8583.c
12 * Copyright (C) 2000 Russell King
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 * ad799x.c
19 *
20 * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
21 * ad7998 and similar chips.
22 *
23 */
24
25#include <linux/interrupt.h>
26#include <linux/device.h>
27#include <linux/kernel.h>
28#include <linux/sysfs.h>
29#include <linux/i2c.h>
30#include <linux/regulator/consumer.h>
31#include <linux/slab.h>
32#include <linux/types.h>
33#include <linux/err.h>
34#include <linux/module.h>
35#include <linux/bitops.h>
36
37#include <linux/iio/iio.h>
38#include <linux/iio/sysfs.h>
39#include <linux/iio/events.h>
40#include <linux/iio/buffer.h>
41#include <linux/iio/trigger_consumer.h>
42#include <linux/iio/triggered_buffer.h>
43
44#define AD799X_CHANNEL_SHIFT			4
45
46/*
47 * AD7991, AD7995 and AD7999 defines
48 */
49
50#define AD7991_REF_SEL				0x08
51#define AD7991_FLTR				0x04
52#define AD7991_BIT_TRIAL_DELAY			0x02
53#define AD7991_SAMPLE_DELAY			0x01
54
55/*
56 * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
57 */
58
59#define AD7998_FLTR				BIT(3)
60#define AD7998_ALERT_EN				BIT(2)
61#define AD7998_BUSY_ALERT			BIT(1)
62#define AD7998_BUSY_ALERT_POL			BIT(0)
63
64#define AD7998_CONV_RES_REG			0x0
65#define AD7998_ALERT_STAT_REG			0x1
66#define AD7998_CONF_REG				0x2
67#define AD7998_CYCLE_TMR_REG			0x3
68
69#define AD7998_DATALOW_REG(x)			((x) * 3 + 0x4)
70#define AD7998_DATAHIGH_REG(x)			((x) * 3 + 0x5)
71#define AD7998_HYST_REG(x)			((x) * 3 + 0x6)
72
73#define AD7998_CYC_MASK				GENMASK(2, 0)
74#define AD7998_CYC_DIS				0x0
75#define AD7998_CYC_TCONF_32			0x1
76#define AD7998_CYC_TCONF_64			0x2
77#define AD7998_CYC_TCONF_128			0x3
78#define AD7998_CYC_TCONF_256			0x4
79#define AD7998_CYC_TCONF_512			0x5
80#define AD7998_CYC_TCONF_1024			0x6
81#define AD7998_CYC_TCONF_2048			0x7
82
83#define AD7998_ALERT_STAT_CLEAR			0xFF
84
85/*
86 * AD7997 and AD7997 defines
87 */
88
89#define AD7997_8_READ_SINGLE			BIT(7)
90#define AD7997_8_READ_SEQUENCE			(BIT(6) | BIT(5) | BIT(4))
91
92enum {
93	ad7991,
94	ad7995,
95	ad7999,
96	ad7992,
97	ad7993,
98	ad7994,
99	ad7997,
100	ad7998
101};
102
103/**
104 * struct ad799x_chip_config - chip specific information
105 * @channel:		channel specification
106 * @default_config:	device default configuration
107 * @info:		pointer to iio_info struct
108 */
109struct ad799x_chip_config {
110	const struct iio_chan_spec	channel[9];
111	u16				default_config;
112	const struct iio_info		*info;
113};
114
115/**
116 * struct ad799x_chip_info - chip specific information
117 * @num_channels:	number of channels
118 * @noirq_config:	device configuration w/o IRQ
119 * @irq_config:		device configuration w/IRQ
120 */
121struct ad799x_chip_info {
122	int				num_channels;
123	const struct ad799x_chip_config	noirq_config;
124	const struct ad799x_chip_config	irq_config;
125};
126
127struct ad799x_state {
128	struct i2c_client		*client;
129	const struct ad799x_chip_config	*chip_config;
130	struct regulator		*reg;
131	struct regulator		*vref;
132	unsigned			id;
133	u16				config;
134
135	u8				*rx_buf;
136	unsigned int			transfer_size;
137};
138
139static int ad799x_write_config(struct ad799x_state *st, u16 val)
140{
141	switch (st->id) {
142	case ad7997:
143	case ad7998:
144		return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
145			val);
146	case ad7992:
147	case ad7993:
148	case ad7994:
149		return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
150			val);
151	default:
152		/* Will be written when doing a conversion */
153		st->config = val;
154		return 0;
155	}
156}
157
158static int ad799x_read_config(struct ad799x_state *st)
159{
160	switch (st->id) {
161	case ad7997:
162	case ad7998:
163		return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
164	case ad7992:
165	case ad7993:
166	case ad7994:
167		return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
168	default:
169		/* No readback support */
170		return st->config;
171	}
172}
173
174/**
175 * ad799x_trigger_handler() bh of trigger launched polling to ring buffer
176 *
177 * Currently there is no option in this driver to disable the saving of
178 * timestamps within the ring.
179 **/
180static irqreturn_t ad799x_trigger_handler(int irq, void *p)
181{
182	struct iio_poll_func *pf = p;
183	struct iio_dev *indio_dev = pf->indio_dev;
184	struct ad799x_state *st = iio_priv(indio_dev);
185	int b_sent;
186	u8 cmd;
187
188	switch (st->id) {
189	case ad7991:
190	case ad7995:
191	case ad7999:
192		cmd = st->config |
193			(*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
194		break;
195	case ad7992:
196	case ad7993:
197	case ad7994:
198		cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
199			AD7998_CONV_RES_REG;
200		break;
201	case ad7997:
202	case ad7998:
203		cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
204		break;
205	default:
206		cmd = 0;
207	}
208
209	b_sent = i2c_smbus_read_i2c_block_data(st->client,
210			cmd, st->transfer_size, st->rx_buf);
211	if (b_sent < 0)
212		goto out;
213
214	iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
215			iio_get_time_ns());
216out:
217	iio_trigger_notify_done(indio_dev->trig);
218
219	return IRQ_HANDLED;
220}
221
222static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
223	const unsigned long *scan_mask)
224{
225	struct ad799x_state *st = iio_priv(indio_dev);
226
227	kfree(st->rx_buf);
228	st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
229	if (!st->rx_buf)
230		return -ENOMEM;
231
232	st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
233
234	switch (st->id) {
235	case ad7992:
236	case ad7993:
237	case ad7994:
238	case ad7997:
239	case ad7998:
240		st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
241		st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
242		return ad799x_write_config(st, st->config);
243	default:
244		return 0;
245	}
246}
247
248static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
249{
250	u8 cmd;
251
252	switch (st->id) {
253	case ad7991:
254	case ad7995:
255	case ad7999:
256		cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
257		break;
258	case ad7992:
259	case ad7993:
260	case ad7994:
261		cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
262		break;
263	case ad7997:
264	case ad7998:
265		cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
266		break;
267	default:
268		return -EINVAL;
269	}
270
271	return i2c_smbus_read_word_swapped(st->client, cmd);
272}
273
274static int ad799x_read_raw(struct iio_dev *indio_dev,
275			   struct iio_chan_spec const *chan,
276			   int *val,
277			   int *val2,
278			   long m)
279{
280	int ret;
281	struct ad799x_state *st = iio_priv(indio_dev);
282
283	switch (m) {
284	case IIO_CHAN_INFO_RAW:
285		mutex_lock(&indio_dev->mlock);
286		if (iio_buffer_enabled(indio_dev))
287			ret = -EBUSY;
288		else
289			ret = ad799x_scan_direct(st, chan->scan_index);
290		mutex_unlock(&indio_dev->mlock);
291
292		if (ret < 0)
293			return ret;
294		*val = (ret >> chan->scan_type.shift) &
295			GENMASK(chan->scan_type.realbits - 1, 0);
296		return IIO_VAL_INT;
297	case IIO_CHAN_INFO_SCALE:
298		ret = regulator_get_voltage(st->vref);
299		if (ret < 0)
300			return ret;
301		*val = ret / 1000;
302		*val2 = chan->scan_type.realbits;
303		return IIO_VAL_FRACTIONAL_LOG2;
304	}
305	return -EINVAL;
306}
307static const unsigned int ad7998_frequencies[] = {
308	[AD7998_CYC_DIS]	= 0,
309	[AD7998_CYC_TCONF_32]	= 15625,
310	[AD7998_CYC_TCONF_64]	= 7812,
311	[AD7998_CYC_TCONF_128]	= 3906,
312	[AD7998_CYC_TCONF_512]	= 976,
313	[AD7998_CYC_TCONF_1024]	= 488,
314	[AD7998_CYC_TCONF_2048]	= 244,
315};
316
317static ssize_t ad799x_read_frequency(struct device *dev,
318					struct device_attribute *attr,
319					char *buf)
320{
321	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
322	struct ad799x_state *st = iio_priv(indio_dev);
323
324	int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
325	if (ret < 0)
326		return ret;
327
328	return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
329}
330
331static ssize_t ad799x_write_frequency(struct device *dev,
332					 struct device_attribute *attr,
333					 const char *buf,
334					 size_t len)
335{
336	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
337	struct ad799x_state *st = iio_priv(indio_dev);
338
339	long val;
340	int ret, i;
341
342	ret = kstrtol(buf, 10, &val);
343	if (ret)
344		return ret;
345
346	mutex_lock(&indio_dev->mlock);
347	ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
348	if (ret < 0)
349		goto error_ret_mutex;
350	/* Wipe the bits clean */
351	ret &= ~AD7998_CYC_MASK;
352
353	for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
354		if (val == ad7998_frequencies[i])
355			break;
356	if (i == ARRAY_SIZE(ad7998_frequencies)) {
357		ret = -EINVAL;
358		goto error_ret_mutex;
359	}
360
361	ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
362		ret | i);
363	if (ret < 0)
364		goto error_ret_mutex;
365	ret = len;
366
367error_ret_mutex:
368	mutex_unlock(&indio_dev->mlock);
369
370	return ret;
371}
372
373static int ad799x_read_event_config(struct iio_dev *indio_dev,
374				    const struct iio_chan_spec *chan,
375				    enum iio_event_type type,
376				    enum iio_event_direction dir)
377{
378	struct ad799x_state *st = iio_priv(indio_dev);
379
380	if (!(st->config & AD7998_ALERT_EN))
381		return 0;
382
383	if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
384		return 1;
385
386	return 0;
387}
388
389static int ad799x_write_event_config(struct iio_dev *indio_dev,
390				     const struct iio_chan_spec *chan,
391				     enum iio_event_type type,
392				     enum iio_event_direction dir,
393				     int state)
394{
395	struct ad799x_state *st = iio_priv(indio_dev);
396	int ret;
397
398	mutex_lock(&indio_dev->mlock);
399	if (iio_buffer_enabled(indio_dev)) {
400		ret = -EBUSY;
401		goto done;
402	}
403
404	if (state)
405		st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
406	else
407		st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
408
409	if (st->config >> AD799X_CHANNEL_SHIFT)
410		st->config |= AD7998_ALERT_EN;
411	else
412		st->config &= ~AD7998_ALERT_EN;
413
414	ret = ad799x_write_config(st, st->config);
415
416done:
417	mutex_unlock(&indio_dev->mlock);
418
419	return ret;
420}
421
422static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
423					 enum iio_event_direction dir,
424					 enum iio_event_info info)
425{
426	switch (info) {
427	case IIO_EV_INFO_VALUE:
428		if (dir == IIO_EV_DIR_FALLING)
429			return AD7998_DATALOW_REG(chan->channel);
430		else
431			return AD7998_DATAHIGH_REG(chan->channel);
432	case IIO_EV_INFO_HYSTERESIS:
433		return AD7998_HYST_REG(chan->channel);
434	default:
435		return -EINVAL;
436	}
437
438	return 0;
439}
440
441static int ad799x_write_event_value(struct iio_dev *indio_dev,
442				    const struct iio_chan_spec *chan,
443				    enum iio_event_type type,
444				    enum iio_event_direction dir,
445				    enum iio_event_info info,
446				    int val, int val2)
447{
448	int ret;
449	struct ad799x_state *st = iio_priv(indio_dev);
450
451	if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
452		return -EINVAL;
453
454	mutex_lock(&indio_dev->mlock);
455	ret = i2c_smbus_write_word_swapped(st->client,
456		ad799x_threshold_reg(chan, dir, info),
457		val << chan->scan_type.shift);
458	mutex_unlock(&indio_dev->mlock);
459
460	return ret;
461}
462
463static int ad799x_read_event_value(struct iio_dev *indio_dev,
464				    const struct iio_chan_spec *chan,
465				    enum iio_event_type type,
466				    enum iio_event_direction dir,
467				    enum iio_event_info info,
468				    int *val, int *val2)
469{
470	int ret;
471	struct ad799x_state *st = iio_priv(indio_dev);
472
473	mutex_lock(&indio_dev->mlock);
474	ret = i2c_smbus_read_word_swapped(st->client,
475		ad799x_threshold_reg(chan, dir, info));
476	mutex_unlock(&indio_dev->mlock);
477	if (ret < 0)
478		return ret;
479	*val = (ret >> chan->scan_type.shift) &
480		GENMASK(chan->scan_type.realbits - 1 , 0);
481
482	return IIO_VAL_INT;
483}
484
485static irqreturn_t ad799x_event_handler(int irq, void *private)
486{
487	struct iio_dev *indio_dev = private;
488	struct ad799x_state *st = iio_priv(private);
489	int i, ret;
490
491	ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
492	if (ret <= 0)
493		goto done;
494
495	if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
496		AD7998_ALERT_STAT_CLEAR) < 0)
497		goto done;
498
499	for (i = 0; i < 8; i++) {
500		if (ret & BIT(i))
501			iio_push_event(indio_dev,
502				       i & 0x1 ?
503				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
504							    (i >> 1),
505							    IIO_EV_TYPE_THRESH,
506							    IIO_EV_DIR_RISING) :
507				       IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
508							    (i >> 1),
509							    IIO_EV_TYPE_THRESH,
510							    IIO_EV_DIR_FALLING),
511				       iio_get_time_ns());
512	}
513
514done:
515	return IRQ_HANDLED;
516}
517
518static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
519			      ad799x_read_frequency,
520			      ad799x_write_frequency);
521static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
522
523static struct attribute *ad799x_event_attributes[] = {
524	&iio_dev_attr_sampling_frequency.dev_attr.attr,
525	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
526	NULL,
527};
528
529static struct attribute_group ad799x_event_attrs_group = {
530	.attrs = ad799x_event_attributes,
531	.name = "events",
532};
533
534static const struct iio_info ad7991_info = {
535	.read_raw = &ad799x_read_raw,
536	.driver_module = THIS_MODULE,
537};
538
539static const struct iio_info ad7993_4_7_8_noirq_info = {
540	.read_raw = &ad799x_read_raw,
541	.driver_module = THIS_MODULE,
542	.update_scan_mode = ad799x_update_scan_mode,
543};
544
545static const struct iio_info ad7993_4_7_8_irq_info = {
546	.read_raw = &ad799x_read_raw,
547	.event_attrs = &ad799x_event_attrs_group,
548	.read_event_config = &ad799x_read_event_config,
549	.write_event_config = &ad799x_write_event_config,
550	.read_event_value = &ad799x_read_event_value,
551	.write_event_value = &ad799x_write_event_value,
552	.driver_module = THIS_MODULE,
553	.update_scan_mode = ad799x_update_scan_mode,
554};
555
556static const struct iio_event_spec ad799x_events[] = {
557	{
558		.type = IIO_EV_TYPE_THRESH,
559		.dir = IIO_EV_DIR_RISING,
560		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
561			BIT(IIO_EV_INFO_ENABLE),
562	}, {
563		.type = IIO_EV_TYPE_THRESH,
564		.dir = IIO_EV_DIR_FALLING,
565		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
566			BIT(IIO_EV_INFO_ENABLE),
567	}, {
568		.type = IIO_EV_TYPE_THRESH,
569		.dir = IIO_EV_DIR_EITHER,
570		.mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
571	},
572};
573
574#define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
575	.type = IIO_VOLTAGE, \
576	.indexed = 1, \
577	.channel = (_index), \
578	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
579	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
580	.scan_index = (_index), \
581	.scan_type = { \
582		.sign = 'u', \
583		.realbits = (_realbits), \
584		.storagebits = 16, \
585		.shift = 12 - (_realbits), \
586		.endianness = IIO_BE, \
587	}, \
588	.event_spec = _ev_spec, \
589	.num_event_specs = _num_ev_spec, \
590}
591
592#define AD799X_CHANNEL(_index, _realbits) \
593	_AD799X_CHANNEL(_index, _realbits, NULL, 0)
594
595#define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
596	_AD799X_CHANNEL(_index, _realbits, ad799x_events, \
597		ARRAY_SIZE(ad799x_events))
598
599static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
600	[ad7991] = {
601		.num_channels = 5,
602		.noirq_config = {
603			.channel = {
604				AD799X_CHANNEL(0, 12),
605				AD799X_CHANNEL(1, 12),
606				AD799X_CHANNEL(2, 12),
607				AD799X_CHANNEL(3, 12),
608				IIO_CHAN_SOFT_TIMESTAMP(4),
609			},
610			.info = &ad7991_info,
611		},
612	},
613	[ad7995] = {
614		.num_channels = 5,
615		.noirq_config = {
616			.channel = {
617				AD799X_CHANNEL(0, 10),
618				AD799X_CHANNEL(1, 10),
619				AD799X_CHANNEL(2, 10),
620				AD799X_CHANNEL(3, 10),
621				IIO_CHAN_SOFT_TIMESTAMP(4),
622			},
623			.info = &ad7991_info,
624		},
625	},
626	[ad7999] = {
627		.num_channels = 5,
628		.noirq_config = {
629			.channel = {
630				AD799X_CHANNEL(0, 8),
631				AD799X_CHANNEL(1, 8),
632				AD799X_CHANNEL(2, 8),
633				AD799X_CHANNEL(3, 8),
634				IIO_CHAN_SOFT_TIMESTAMP(4),
635			},
636			.info = &ad7991_info,
637		},
638	},
639	[ad7992] = {
640		.num_channels = 3,
641		.noirq_config = {
642			.channel = {
643				AD799X_CHANNEL(0, 12),
644				AD799X_CHANNEL(1, 12),
645				IIO_CHAN_SOFT_TIMESTAMP(3),
646			},
647			.info = &ad7993_4_7_8_noirq_info,
648		},
649		.irq_config = {
650			.channel = {
651				AD799X_CHANNEL_WITH_EVENTS(0, 12),
652				AD799X_CHANNEL_WITH_EVENTS(1, 12),
653				IIO_CHAN_SOFT_TIMESTAMP(3),
654			},
655			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
656			.info = &ad7993_4_7_8_irq_info,
657		},
658	},
659	[ad7993] = {
660		.num_channels = 5,
661		.noirq_config = {
662			.channel = {
663				AD799X_CHANNEL(0, 10),
664				AD799X_CHANNEL(1, 10),
665				AD799X_CHANNEL(2, 10),
666				AD799X_CHANNEL(3, 10),
667				IIO_CHAN_SOFT_TIMESTAMP(4),
668			},
669			.info = &ad7993_4_7_8_noirq_info,
670		},
671		.irq_config = {
672			.channel = {
673				AD799X_CHANNEL_WITH_EVENTS(0, 10),
674				AD799X_CHANNEL_WITH_EVENTS(1, 10),
675				AD799X_CHANNEL_WITH_EVENTS(2, 10),
676				AD799X_CHANNEL_WITH_EVENTS(3, 10),
677				IIO_CHAN_SOFT_TIMESTAMP(4),
678			},
679			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
680			.info = &ad7993_4_7_8_irq_info,
681		},
682	},
683	[ad7994] = {
684		.num_channels = 5,
685		.noirq_config = {
686			.channel = {
687				AD799X_CHANNEL(0, 12),
688				AD799X_CHANNEL(1, 12),
689				AD799X_CHANNEL(2, 12),
690				AD799X_CHANNEL(3, 12),
691				IIO_CHAN_SOFT_TIMESTAMP(4),
692			},
693			.info = &ad7993_4_7_8_noirq_info,
694		},
695		.irq_config = {
696			.channel = {
697				AD799X_CHANNEL_WITH_EVENTS(0, 12),
698				AD799X_CHANNEL_WITH_EVENTS(1, 12),
699				AD799X_CHANNEL_WITH_EVENTS(2, 12),
700				AD799X_CHANNEL_WITH_EVENTS(3, 12),
701				IIO_CHAN_SOFT_TIMESTAMP(4),
702			},
703			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
704			.info = &ad7993_4_7_8_irq_info,
705		},
706	},
707	[ad7997] = {
708		.num_channels = 9,
709		.noirq_config = {
710			.channel = {
711				AD799X_CHANNEL(0, 10),
712				AD799X_CHANNEL(1, 10),
713				AD799X_CHANNEL(2, 10),
714				AD799X_CHANNEL(3, 10),
715				AD799X_CHANNEL(4, 10),
716				AD799X_CHANNEL(5, 10),
717				AD799X_CHANNEL(6, 10),
718				AD799X_CHANNEL(7, 10),
719				IIO_CHAN_SOFT_TIMESTAMP(8),
720			},
721			.info = &ad7993_4_7_8_noirq_info,
722		},
723		.irq_config = {
724			.channel = {
725				AD799X_CHANNEL_WITH_EVENTS(0, 10),
726				AD799X_CHANNEL_WITH_EVENTS(1, 10),
727				AD799X_CHANNEL_WITH_EVENTS(2, 10),
728				AD799X_CHANNEL_WITH_EVENTS(3, 10),
729				AD799X_CHANNEL(4, 10),
730				AD799X_CHANNEL(5, 10),
731				AD799X_CHANNEL(6, 10),
732				AD799X_CHANNEL(7, 10),
733				IIO_CHAN_SOFT_TIMESTAMP(8),
734			},
735			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
736			.info = &ad7993_4_7_8_irq_info,
737		},
738	},
739	[ad7998] = {
740		.num_channels = 9,
741		.noirq_config = {
742			.channel = {
743				AD799X_CHANNEL(0, 12),
744				AD799X_CHANNEL(1, 12),
745				AD799X_CHANNEL(2, 12),
746				AD799X_CHANNEL(3, 12),
747				AD799X_CHANNEL(4, 12),
748				AD799X_CHANNEL(5, 12),
749				AD799X_CHANNEL(6, 12),
750				AD799X_CHANNEL(7, 12),
751				IIO_CHAN_SOFT_TIMESTAMP(8),
752			},
753			.info = &ad7993_4_7_8_noirq_info,
754		},
755		.irq_config = {
756			.channel = {
757				AD799X_CHANNEL_WITH_EVENTS(0, 12),
758				AD799X_CHANNEL_WITH_EVENTS(1, 12),
759				AD799X_CHANNEL_WITH_EVENTS(2, 12),
760				AD799X_CHANNEL_WITH_EVENTS(3, 12),
761				AD799X_CHANNEL(4, 12),
762				AD799X_CHANNEL(5, 12),
763				AD799X_CHANNEL(6, 12),
764				AD799X_CHANNEL(7, 12),
765				IIO_CHAN_SOFT_TIMESTAMP(8),
766			},
767			.default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
768			.info = &ad7993_4_7_8_irq_info,
769		},
770	},
771};
772
773static int ad799x_probe(struct i2c_client *client,
774				   const struct i2c_device_id *id)
775{
776	int ret;
777	struct ad799x_state *st;
778	struct iio_dev *indio_dev;
779	const struct ad799x_chip_info *chip_info =
780		&ad799x_chip_info_tbl[id->driver_data];
781
782	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
783	if (indio_dev == NULL)
784		return -ENOMEM;
785
786	st = iio_priv(indio_dev);
787	/* this is only used for device removal purposes */
788	i2c_set_clientdata(client, indio_dev);
789
790	st->id = id->driver_data;
791	if (client->irq > 0 && chip_info->irq_config.info)
792		st->chip_config = &chip_info->irq_config;
793	else
794		st->chip_config = &chip_info->noirq_config;
795
796	/* TODO: Add pdata options for filtering and bit delay */
797
798	st->reg = devm_regulator_get(&client->dev, "vcc");
799	if (IS_ERR(st->reg))
800		return PTR_ERR(st->reg);
801	ret = regulator_enable(st->reg);
802	if (ret)
803		return ret;
804	st->vref = devm_regulator_get(&client->dev, "vref");
805	if (IS_ERR(st->vref)) {
806		ret = PTR_ERR(st->vref);
807		goto error_disable_reg;
808	}
809	ret = regulator_enable(st->vref);
810	if (ret)
811		goto error_disable_reg;
812
813	st->client = client;
814
815	indio_dev->dev.parent = &client->dev;
816	indio_dev->name = id->name;
817	indio_dev->info = st->chip_config->info;
818
819	indio_dev->modes = INDIO_DIRECT_MODE;
820	indio_dev->channels = st->chip_config->channel;
821	indio_dev->num_channels = chip_info->num_channels;
822
823	ret = ad799x_write_config(st, st->chip_config->default_config);
824	if (ret < 0)
825		goto error_disable_reg;
826	ret = ad799x_read_config(st);
827	if (ret < 0)
828		goto error_disable_reg;
829	st->config = ret;
830
831	ret = iio_triggered_buffer_setup(indio_dev, NULL,
832		&ad799x_trigger_handler, NULL);
833	if (ret)
834		goto error_disable_vref;
835
836	if (client->irq > 0) {
837		ret = devm_request_threaded_irq(&client->dev,
838						client->irq,
839						NULL,
840						ad799x_event_handler,
841						IRQF_TRIGGER_FALLING |
842						IRQF_ONESHOT,
843						client->name,
844						indio_dev);
845		if (ret)
846			goto error_cleanup_ring;
847	}
848	ret = iio_device_register(indio_dev);
849	if (ret)
850		goto error_cleanup_ring;
851
852	return 0;
853
854error_cleanup_ring:
855	iio_triggered_buffer_cleanup(indio_dev);
856error_disable_vref:
857	regulator_disable(st->vref);
858error_disable_reg:
859	regulator_disable(st->reg);
860
861	return ret;
862}
863
864static int ad799x_remove(struct i2c_client *client)
865{
866	struct iio_dev *indio_dev = i2c_get_clientdata(client);
867	struct ad799x_state *st = iio_priv(indio_dev);
868
869	iio_device_unregister(indio_dev);
870
871	iio_triggered_buffer_cleanup(indio_dev);
872	regulator_disable(st->vref);
873	regulator_disable(st->reg);
874	kfree(st->rx_buf);
875
876	return 0;
877}
878
879static const struct i2c_device_id ad799x_id[] = {
880	{ "ad7991", ad7991 },
881	{ "ad7995", ad7995 },
882	{ "ad7999", ad7999 },
883	{ "ad7992", ad7992 },
884	{ "ad7993", ad7993 },
885	{ "ad7994", ad7994 },
886	{ "ad7997", ad7997 },
887	{ "ad7998", ad7998 },
888	{}
889};
890
891MODULE_DEVICE_TABLE(i2c, ad799x_id);
892
893static struct i2c_driver ad799x_driver = {
894	.driver = {
895		.name = "ad799x",
896	},
897	.probe = ad799x_probe,
898	.remove = ad799x_remove,
899	.id_table = ad799x_id,
900};
901module_i2c_driver(ad799x_driver);
902
903MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
904MODULE_DESCRIPTION("Analog Devices AD799x ADC");
905MODULE_LICENSE("GPL v2");
906